Revision: 79832 http://trac.macports.org/changeset/79832 Author: and.damore@macports.org Date: 2011-06-27 14:41:42 -0700 (Mon, 27 Jun 2011) Log Message: ----------- port veriwell: version bumped, edited description, added file to docs Modified Paths: -------------- trunk/dports/science/veriwell/Portfile Modified: trunk/dports/science/veriwell/Portfile =================================================================== --- trunk/dports/science/veriwell/Portfile 2011-06-27 21:37:45 UTC (rev 79831) +++ trunk/dports/science/veriwell/Portfile 2011-06-27 21:41:42 UTC (rev 79832) @@ -3,23 +3,23 @@ PortSystem 1.0 name veriwell -version 2.8.6 +version 2.8.7 categories science maintainers nomaintainer description VeriWell Verilog Simulator long_description \ VeriWell is a full Verilog simulator. It supports nearly all of the \ - IEEE1364-1995 standard, as well as PLI 1.0. Yes, VeriWell *is* the \ + IEEE1364-1995 standard, as well as PLI 1.0. VeriWell is the \ same simulator that was sold by Wellspring Solutions in the mid-1990 \ and was included with the Thomas and Moorby book homepage http://sourceforge.net/projects/veriwell platforms darwin master_sites sourceforge -checksums md5 adffd9b8e2b461d75ab01db2bdb1563b \ - sha1 f98b11ca09fe1fc38b9c9be33d2bf127e0fee42d \ - rmd160 9ca3ad3b71a8de4f50108738317be244aa350461 +checksums md5 bf686d4f96d3ff8fb08616da157888fb \ + sha1 9ef4e6a25a4fd65db325a89ed89b199547fabbd6 \ + rmd160 3d86c40b353f701d61cab301e0f7c3ec136c88e7 depends_build port:help2man depends_lib port:bzip2 \ @@ -35,12 +35,10 @@ configure.args --includedir=${prefix}/include/veriwell post-destroot { - set docdir ${destroot}${prefix}/share/doc/${name}-${version} + set docdir ${destroot}${prefix}/share/doc/${name} xinstall -d ${docdir} xinstall -W ${worksrcpath} \ - ChangeLog \ - README \ - TODO \ + ChangeLog AUTHORS COPYING NEWS README TODO \ ${docdir} }