[Xquartz-changes] mesa: Changes to 'refs/tags/mesa-7.9-rc2'
Jeremy Huddleston
jeremyhu at freedesktop.org
Thu Jan 1 01:05:41 PST 2015
Tag 'mesa-7.9-rc2' created by Ian Romanick <ian.d.romanick at intel.com> at 2010-09-29 03:42 -0700
Mesa 7.9 release candidate 2
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Changes since mesa-7.9-rc1:
Dave Airlie (1):
mesa/mipmap: fix warning since 1acadebd6270d3604b026842b8a21360968618a0
Eric Anholt (10):
glsl: Rework assignments with write_masks to have LHS chan count match RHS.
glsl: Fix copy'n'wasted ir_noop_swizzle conditions.
mesa: Fix type typo in glGenerateMipmap handling of GL_UNSIGNED_INT data.
glsl: Fix broadcast_index of lower_variable_index_to_cond_assign.
i965: Add support for attribute interpolation on Sandybridge.
i965: Set up inputs to the fragment shader according to FP InputsRead.
i965: Add support for POW in gen6 FS.
i965: Fix all non-snb regression in the snb attribute interpolation commit.
i965: Fix up part of my Sandybridge attributes support patch.
glsl: Also update implicit sizes of varyings at link time.
Ian Romanick (3):
Add 7.9-rc1 md5sums
dri: Ensure that DRI driver cpp files are in tarballs
mesa: set version string to 7.9-rc2
Kristian Høgsberg (1):
glx: Invalidate buffers after binding a drawable
Marek Olšák (6):
r300/compiler: fix projective mapping of 2D NPOT textures
r300/compiler: do not use copy propagation if SaturateMode is used
r300/compiler: fix shadow sampling with swizzled coords
r300g: fix swizzling of texture border color
configure.ac: look for libdrm_radeon before building gallium/r300,r600
configure.ac: do not build xorg-r300g by default
Zhenyu Wang (23):
i965: disasm quarter and write enable instruction control on sandybridge
i965: new state dump for sandybridge
i965: enable accumulator update in PS kernel too on sandybridge
i965: Fix color interpolation on sandybridge
i965: force zero in clipper to ignore RTAIndex on sandybridge
i965: fix point size setting in header on sandybridge
i965: ff sync message change for sandybridge
i965: ignore quads for GS kernel on sandybridge
i965: add sandybridge viewport state bo into validation list
i965: VS use SPF mode on sandybridge for now
i965: fix jump count on sandybridge
i965: Fix sampler on sandybridge
i965: fix const register count for sandybridge
i965: Add all device ids for sandybridge
i965: sandybridge pipe control workaround before write cache flush
i965: only allow SIMD8 kernel on sandybridge now
i965: don't do calculation for delta_xy on sandybridge
i965: fix pixel w interpolation on sandybridge
i965: enable polygon offset on sandybridge
i965: fix scissor state on sandybridge
i965: fix point sprite on sandybridge
i965: fix occlusion query on sandybridge
i965: fallback bitmap operation on sandybridge
---
Makefile | 3
configure.ac | 38 ++-
docs/relnotes-7.9.html | 7
src/gallium/drivers/r300/r300_state_derived.c | 41 ---
src/glsl/ast_function.cpp | 43 ++-
src/glsl/builtin_function.cpp | 74 +++---
src/glsl/builtins/ir/noise2 | 16 -
src/glsl/builtins/ir/noise3 | 24 +-
src/glsl/builtins/ir/noise4 | 34 +--
src/glsl/ir.cpp | 29 ++
src/glsl/ir.h | 8
src/glsl/ir_constant_propagation.cpp | 16 +
src/glsl/ir_mat_op_to_vec.cpp | 5
src/glsl/ir_noop_swizzle.cpp | 4
src/glsl/ir_validate.cpp | 16 -
src/glsl/linker.cpp | 11 -
src/glsl/lower_variable_index_to_cond_assign.cpp | 2
src/glx/dri2_glx.c | 19 +
src/mesa/drivers/dri/i965/brw_defines.h | 1
src/mesa/drivers/dri/i965/brw_disasm.c | 70 +++++-
src/mesa/drivers/dri/i965/brw_eu.h | 6
src/mesa/drivers/dri/i965/brw_eu_emit.c | 80 ++++++-
src/mesa/drivers/dri/i965/brw_gs.c | 9
src/mesa/drivers/dri/i965/brw_queryobj.c | 161 ++++++++++----
src/mesa/drivers/dri/i965/brw_state.h | 1
src/mesa/drivers/dri/i965/brw_state_dump.c | 140 ++++++++++++
src/mesa/drivers/dri/i965/brw_state_upload.c | 1
src/mesa/drivers/dri/i965/brw_structs.h | 22 +-
src/mesa/drivers/dri/i965/brw_tex_layout.c | 2
src/mesa/drivers/dri/i965/brw_vs_emit.c | 16 +
src/mesa/drivers/dri/i965/brw_wm.c | 51 ++++
src/mesa/drivers/dri/i965/brw_wm.h | 9
src/mesa/drivers/dri/i965/brw_wm_emit.c | 173 ++++++++++++----
src/mesa/drivers/dri/i965/brw_wm_fp.c | 24 ++
src/mesa/drivers/dri/i965/brw_wm_glsl.c | 57 +++--
src/mesa/drivers/dri/i965/brw_wm_sampler_state.c | 11 -
src/mesa/drivers/dri/i965/gen6_clip_state.c | 1
src/mesa/drivers/dri/i965/gen6_scissor_state.c | 3
src/mesa/drivers/dri/i965/gen6_sf_state.c | 46 ++--
src/mesa/drivers/dri/i965/gen6_viewport_state.c | 4
src/mesa/drivers/dri/i965/gen6_vs_state.c | 2
src/mesa/drivers/dri/i965/gen6_wm_state.c | 5
src/mesa/drivers/dri/intel/intel_batchbuffer.c | 10
src/mesa/drivers/dri/intel/intel_chipset.h | 20 +
src/mesa/drivers/dri/intel/intel_context.c | 5
src/mesa/drivers/dri/intel/intel_pixel_bitmap.c | 6
src/mesa/drivers/dri/intel/intel_reg.h | 12 +
src/mesa/drivers/dri/r300/compiler/radeon_optimize.c | 3
src/mesa/drivers/dri/r300/compiler/radeon_program_tex.c | 48 ++++
src/mesa/main/mipmap.c | 2
src/mesa/main/version.h | 2
src/mesa/program/ir_to_mesa.cpp | 28 ++
52 files changed, 1065 insertions(+), 356 deletions(-)
---
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