[Xquartz-changes] mesa: Branch '10.5-darwin-build-fixes' - 311 commits
Jeremy Huddleston
jeremyhu at freedesktop.org
Wed Oct 7 15:42:44 PDT 2015
Rebased ref, commits from common ancestor:
commit 987e162c61b28192e575bd9742c84a67472d415c
Author: Jon TURNEY <jon.turney at dronecode.org.uk>
Date: Mon May 12 16:30:26 2014 +0100
applegl: Provide requirements of _SET_DrawBuffers
_SET_DrawBuffers requires driDispatchRemapTable, so we need to link with libmesa
for remap.c. libmesa requires the C++ linker.
Also need to arrange to call _mesa_init_remap_table() to initialize the remap
table.
XXX: There has to be a better way fixing this.
Signed-off-by: Jon TURNEY <jon.turney at dronecode.org.uk>
(cherry picked from commit 9800301a312ac06e0ce0af20e5817ee1e44ed4a5)
diff --git a/src/glx/Makefile.am b/src/glx/Makefile.am
index 3ea1b30..3f82285 100644
--- a/src/glx/Makefile.am
+++ b/src/glx/Makefile.am
@@ -138,7 +138,10 @@ libglx_la_SOURCES += \
applegl_glx.c
SUBDIRS += apple
-libglx_la_LIBADD += $(builddir)/apple/libappleglx.la
+libglx_la_LIBADD += \
+ $(builddir)/apple/libappleglx.la \
+ $(top_builddir)/src/mesa/libmesa.la
+nodist_EXTRA_lib at GL_LIB@_la_SOURCES = dummy.cpp
endif
GL_LIBS = \
diff --git a/src/glx/apple/apple_glapi.c b/src/glx/apple/apple_glapi.c
index 4d19f7f..849044b 100644
--- a/src/glx/apple/apple_glapi.c
+++ b/src/glx/apple/apple_glapi.c
@@ -39,6 +39,7 @@
#include <GL/gl.h>
#include "main/glheader.h"
+#include "main/remap.h"
#include "glapi.h"
#include "glapitable.h"
#include "main/dispatch.h"
@@ -54,6 +55,8 @@ static void _apple_glapi_create_table(void) {
if (__applegl_api)
return;
+ _mesa_init_remap_table();
+
__ogl_framework_api = _glapi_create_table_from_handle(apple_cgl_get_dl_handle(), "gl");
assert(__ogl_framework_api);
commit 945b0070642ac6256a22c7b23c20e022e2444f88
Author: Jon TURNEY <jon.turney at dronecode.org.uk>
Date: Sun May 11 14:40:07 2014 +0100
darwin: Suppress type conversion warnings for GLhandleARB
On darwin, GLhandleARB is defined as a void *, not the unsigned int it is on
linux.
For the moment, apply a cast to supress the warning
Possibly this is safe, as for the mesa software renderer the shader program
handle is not a real pointer, but a integer handle
Probably this is not the right thing to do, and we should pay closer attention
to how the GLhandlerARB type is used.
main/shader_query.cpp:49:7: error: no matching function for call to '_mesa_lookup_shader_program_err'
_mesa_lookup_shader_program_err(ctx, program, "glBindAttribLocation");
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
../../src/mesa/main/shaderobj.h:81:1: note: candidate function not viable: cannot convert argument of incomplete type 'GLhandleARB' (aka 'void *') to 'GLuint' (aka 'unsigned int')
_mesa_lookup_shader_program_err(struct gl_context *ctx, GLuint name,
^
main/shader_query.cpp:111:13: error: no matching function for call to '_mesa_lookup_shader_program_err'
shProg = _mesa_lookup_shader_program_err(ctx, program, "glGetActiveAttrib");
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
../../src/mesa/main/shaderobj.h:81:1: note: candidate function not viable: cannot convert argument of incomplete type 'GLhandleARB' (aka 'void *') to 'GLuint' (aka 'unsigned int')
_mesa_lookup_shader_program_err(struct gl_context *ctx, GLuint name,
^
main/shader_query.cpp:218:7: error: no matching function for call to '_mesa_lookup_shader_program_err'
_mesa_lookup_shader_program_err(ctx, program, "glGetAttribLocation");
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
../../src/mesa/main/shaderobj.h:81:1: note: candidate function not viable: cannot convert argument of incomplete type 'GLhandleARB' (aka 'void *') to 'GLuint' (aka 'unsigned int')
_mesa_lookup_shader_program_err(struct gl_context *ctx, GLuint name,
Signed-off-by: Jon TURNEY <jon.turney at dronecode.org.uk>
(cherry picked from commit 24eefbd4ca271f22400549dd44ccd409263089e1)
diff --git a/src/mesa/main/shader_query.cpp b/src/mesa/main/shader_query.cpp
index df9081b..b2d2f54 100644
--- a/src/mesa/main/shader_query.cpp
+++ b/src/mesa/main/shader_query.cpp
@@ -46,7 +46,7 @@ _mesa_BindAttribLocation(GLhandleARB program, GLuint index,
GET_CURRENT_CONTEXT(ctx);
struct gl_shader_program *const shProg =
- _mesa_lookup_shader_program_err(ctx, program, "glBindAttribLocation");
+ _mesa_lookup_shader_program_err(ctx, (uintptr_t)program, "glBindAttribLocation");
if (!shProg)
return;
@@ -114,7 +114,7 @@ _mesa_GetActiveAttrib(GLhandleARB program, GLuint desired_index,
return;
}
- shProg = _mesa_lookup_shader_program_err(ctx, program, "glGetActiveAttrib");
+ shProg = _mesa_lookup_shader_program_err(ctx, (uintptr_t)program, "glGetActiveAttrib");
if (!shProg)
return;
@@ -232,7 +232,7 @@ _mesa_GetAttribLocation(GLhandleARB program, const GLcharARB * name)
{
GET_CURRENT_CONTEXT(ctx);
struct gl_shader_program *const shProg =
- _mesa_lookup_shader_program_err(ctx, program, "glGetAttribLocation");
+ _mesa_lookup_shader_program_err(ctx, (uintptr_t)program, "glGetAttribLocation");
if (!shProg) {
return -1;
commit 32e797544db668ccafbddc65e91c6fe1c79fb802
Author: Jeremy Huddleston Sequoia <jeremyhu at apple.com>
Date: Wed Feb 11 12:32:56 2015 -0800
glext.h: Add missing include of stddef.h for ptrdiff_t
Signed-off-by: Jeremy Huddleston Sequoia <jeremyhu at apple.com>
(cherry picked from commit 8ea9fa778a04d1535f994e39dcfdae7ee1add37e)
diff --git a/include/GL/glext.h b/include/GL/glext.h
index a3873a6..dded95b 100644
--- a/include/GL/glext.h
+++ b/include/GL/glext.h
@@ -4477,6 +4477,7 @@ GLAPI void APIENTRY glVertexBlendARB (GLint count);
#ifndef GL_ARB_vertex_buffer_object
#define GL_ARB_vertex_buffer_object 1
+#include <stddef.h>
typedef ptrdiff_t GLsizeiptrARB;
typedef ptrdiff_t GLintptrARB;
#define GL_BUFFER_SIZE_ARB 0x8764
commit 4a0bd3dcff3c07965828e648e14d89314d262169
Author: Emil Velikov <emil.l.velikov at gmail.com>
Date: Sat Jul 4 12:48:39 2015 +0100
docs: Add sha256sums for the 10.5.9 release
Signed-off-by: Emil Velikov <emil.l.velikov at gmail.com>
diff --git a/docs/relnotes/10.5.9.html b/docs/relnotes/10.5.9.html
index dd71fed..a1d11c3 100644
--- a/docs/relnotes/10.5.9.html
+++ b/docs/relnotes/10.5.9.html
@@ -31,7 +31,8 @@ because compatibility contexts are not supported.
<h2>SHA256 checksums</h2>
<pre>
-TBD
+0c081b59572ee9732e7438d34adc3817fe8cc8d4b58abc0e71fd4b4c904945cb mesa-10.5.9.tar.gz
+71c69f31d3dbc35cfa79950e58a01d27030378d8c7ef1259a0b31d4d0487f4ec mesa-10.5.9.tar.xz
</pre>
commit 7f40d083748f3a8276e08a2fa0ae7149269ea379
Author: Emil Velikov <emil.l.velikov at gmail.com>
Date: Sat Jul 4 12:09:10 2015 +0100
Add release notes for the 10.5.9 release
Signed-off-by: Emil Velikov <emil.l.velikov at gmail.com>
diff --git a/docs/relnotes/10.5.9.html b/docs/relnotes/10.5.9.html
new file mode 100644
index 0000000..dd71fed
--- /dev/null
+++ b/docs/relnotes/10.5.9.html
@@ -0,0 +1,139 @@
+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
+<html lang="en">
+<head>
+ <meta http-equiv="content-type" content="text/html; charset=utf-8">
+ <title>Mesa Release Notes</title>
+ <link rel="stylesheet" type="text/css" href="../mesa.css">
+</head>
+<body>
+
+<div class="header">
+ <h1>The Mesa 3D Graphics Library</h1>
+</div>
+
+<iframe src="../contents.html"></iframe>
+<div class="content">
+
+<h1>Mesa 10.5.9 Release Notes / July 04, 2015</h1>
+
+<p>
+Mesa 10.5.9 is a bug fix release which fixes bugs found since the 10.5.8 release.
+</p>
+<p>
+Mesa 10.5.9 implements the OpenGL 3.3 API, but the version reported by
+glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
+glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
+Some drivers don't support all the features required in OpenGL 3.3. OpenGL
+3.3 is <strong>only</strong> available if requested at context creation
+because compatibility contexts are not supported.
+</p>
+
+
+<h2>SHA256 checksums</h2>
+<pre>
+TBD
+</pre>
+
+
+<h2>New features</h2>
+<p>None</p>
+
+<h2>Bug fixes</h2>
+
+<p>This list is likely incomplete.</p>
+
+<ul>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=84225">Bug 84225</a> - Allow constant-index-expression sampler array indexing with GLSL-ES < 300</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=88999">Bug 88999</a> - [SKL] Compiz crashes after opening unity dash</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89118">Bug 89118</a> - [SKL Bisected]many Ogles3conform cases core dumped</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=90537">Bug 90537</a> - radeonsi bo/va conflict on RADEON_GEM_VA (rscreen->ws->buffer_from_handle returns NULL)</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=90839">Bug 90839</a> - [10.5.5/10.6 regression, bisected] PBO glDrawPixels no longer using blit fastpath</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=90873">Bug 90873</a> - Kernel hang, TearFree On, Mate desktop environment</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=91056">Bug 91056</a> - The Bard's Tale (2005, native) has rendering issues</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=91117">Bug 91117</a> - Nimbus (running in wine) has rendering issues, objects are semi-transparent</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=91124">Bug 91124</a> - Civilization V (in Wine) has rendering issues: text missing, menu bar corrupted</li>
+
+</ul>
+
+
+<h2>Changes</h2>
+
+<p>Ben Widawsky (2):</p>
+<ul>
+ <li>i965/gen9: Implement Push Constant Buffer workaround</li>
+ <li>i965/skl: Use 1 register for uniform pull constant payload</li>
+</ul>
+
+<p>Boyan Ding (1):</p>
+<ul>
+ <li>egl/x11: Remove duplicate call to dri2_x11_add_configs_for_visuals</li>
+</ul>
+
+<p>Chris Wilson (3):</p>
+<ul>
+ <li>i965: Fix HW blitter pitch limits</li>
+ <li>i915: Blit RGBX<->RGBA drawpixels</li>
+ <li>i965: Export format comparison for blitting between miptrees</li>
+</ul>
+
+<p>Emil Velikov (6):</p>
+<ul>
+ <li>docs: Add sha256sums for the 10.5.8 release</li>
+ <li>configure: warn about shared_glapi & xlib-glx only when both are set</li>
+ <li>configure: error out when building backend-less libEGL</li>
+ <li>configure: error out when building libEGL without shared-glapi</li>
+ <li>gbm: do not (over)link against libglapi.so</li>
+ <li>Update version to 10.5.9</li>
+</ul>
+
+<p>Frank Henigman (1):</p>
+<ul>
+ <li>gbm: dlopen libglapi so gbm_create_device works</li>
+</ul>
+
+<p>Ilia Mirkin (8):</p>
+<ul>
+ <li>glsl: add version checks to conditionals for builtin variable enablement</li>
+ <li>mesa: add GL_PROGRAM_PIPELINE support in KHR_debug calls</li>
+ <li>glsl: binding point is a texture unit, which is a combined space</li>
+ <li>nvc0: always put all tfb bufs into bufctx</li>
+ <li>nv50,nvc0: make sure to pushbuf_refn before putting bo into pushbuf_data</li>
+ <li>nv50/ir: propagate modifier to right arg when const-folding mad</li>
+ <li>nv50/ir: fix emission of address reg in 3rd source</li>
+ <li>nv50/ir: copy joinAt when splitting both before and after</li>
+</ul>
+
+<p>Mario Kleiner (2):</p>
+<ul>
+ <li>nouveau: Use dup fd as key in drm-winsys hash table to fix ZaphodHeads.</li>
+ <li>winsys/radeon: Use dup fd as key in drm-winsys hash table to fix ZaphodHeads.</li>
+</ul>
+
+<p>Michel Dänzer (1):</p>
+<ul>
+ <li>winsys/radeon: Unmap GPU VM address range when destroying BO</li>
+</ul>
+
+<p>Tapani Pälli (6):</p>
+<ul>
+ <li>glsl: Allow dynamic sampler array indexing with GLSL ES < 3.00</li>
+ <li>mesa/glsl: new compiler option EmitNoIndirectSampler</li>
+ <li>i915: use EmitNoIndirectSampler</li>
+ <li>mesa/st: use EmitNoIndirectSampler if !ARB_gpu_shader5</li>
+ <li>i965: use EmitNoIndirectSampler for gen < 7</li>
+ <li>glsl: validate sampler array indexing for 'constant-index-expression'</li>
+</ul>
+
+
+</div>
+</body>
+</html>
commit 8c8006099f859cc11c2882f2f3361428c45e64ac
Author: Emil Velikov <emil.l.velikov at gmail.com>
Date: Sat Jul 4 12:04:06 2015 +0100
Update version to 10.5.9
Signed-off-by: Emil Velikov <emil.l.velikov at gmail.com>
diff --git a/VERSION b/VERSION
index 0b09579..bd81dd8 100644
--- a/VERSION
+++ b/VERSION
@@ -1 +1 @@
-10.5.8
+10.5.9
commit 81a0920c3a1600d45a7a315de3ef654116bbbce0
Author: Mario Kleiner <mario.kleiner.de at gmail.com>
Date: Sun Jun 28 03:02:31 2015 +0200
winsys/radeon: Use dup fd as key in drm-winsys hash table to fix ZaphodHeads.
Same problem and fix as for nouveau's ZaphodHeads trouble.
See patch ...
"nouveau: Use dup fd as key in drm-winsys hash table to fix ZaphodHeads."
... for reference.
Cc: "10.3 10.4 10.5 10.6" <mesa-stable at lists.freedesktop.org>
Signed-off-by: Mario Kleiner <mario.kleiner.de at gmail.com>
Reviewed-by: Marek Olšák <marek.olsak at amd.com>
(cherry picked from commit 28dda47ae4d974e3e032d60e8e0965c8c068c6d8)
diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c b/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
index 12c351d..674c60a 100644
--- a/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
+++ b/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
@@ -465,6 +465,10 @@ static void radeon_winsys_destroy(struct radeon_winsys *rws)
if (ws->gen >= DRV_R600) {
radeon_surface_manager_free(ws->surf_man);
}
+
+ if (ws->fd)
+ close(ws->fd);
+
FREE(rws);
}
@@ -666,7 +670,7 @@ radeon_drm_winsys_create(int fd, radeon_screen_create_t screen_create)
return NULL;
}
- ws->fd = fd;
+ ws->fd = dup(fd);
if (!do_winsys_init(ws))
goto fail;
@@ -682,7 +686,7 @@ radeon_drm_winsys_create(int fd, radeon_screen_create_t screen_create)
goto fail;
if (ws->gen >= DRV_R600) {
- ws->surf_man = radeon_surface_manager_new(fd);
+ ws->surf_man = radeon_surface_manager_new(ws->fd);
if (!ws->surf_man)
goto fail;
}
@@ -723,7 +727,7 @@ radeon_drm_winsys_create(int fd, radeon_screen_create_t screen_create)
return NULL;
}
- util_hash_table_set(fd_tab, intptr_to_pointer(fd), ws);
+ util_hash_table_set(fd_tab, intptr_to_pointer(ws->fd), ws);
/* We must unlock the mutex once the winsys is fully initialized, so that
* other threads attempting to create the winsys from the same fd will
@@ -740,6 +744,9 @@ fail:
ws->kman->destroy(ws->kman);
if (ws->surf_man)
radeon_surface_manager_free(ws->surf_man);
+ if (ws->fd)
+ close(ws->fd);
+
FREE(ws);
return NULL;
}
commit 80e283b0539f284563482e9bf901924ac134c0a5
Author: Ben Widawsky <benjamin.widawsky at intel.com>
Date: Mon Jun 22 17:18:02 2015 -0700
i965/skl: Use 1 register for uniform pull constant payload
When under dispatch_width=16 the previous code would allocate 2 registers for
the payload when only one is needed. This manifested itself through bugs on SKL
which needs to mess with this instruction.
Ken thought this might impact shader-db, but apparently it doesn't
Backported to 10.5.8 from (upstream uses alloc.allocate()):
commit 6e62a52865787362ae1deb9dee80140d3a66c519
Author: Ben Widawsky <benjamin.widawsky at intel.com>
Date: Thu Feb 19 15:49:34 2015 -0800
i965/skl: Use 1 register for uniform pull constant payload
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89118
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=88999
Signed-off-by: Ben Widawsky <ben at bwidawsk.net>
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
Tested-by: Timo Aaltonen <timo.aaltonen at canonical.com>
Cc: "10.5" <mesa-stable at lists.freedesktop.org>
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp
index f72d13d..b54e4d7 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
@@ -3039,7 +3039,7 @@ fs_visitor::lower_uniform_pull_constant_loads()
assert(const_offset_reg.file == IMM &&
const_offset_reg.type == BRW_REGISTER_TYPE_UD);
const_offset_reg.fixed_hw_reg.dw1.ud /= 4;
- fs_reg payload = vgrf(glsl_type::uint_type);
+ fs_reg payload = fs_reg(GRF, virtual_grf_alloc(1));
/* We have to use a message header on Skylake to get SIMD4x2 mode.
* Reserve space for the register.
commit 999b2b27168c85f2895c6574de28c31114fc5b7b
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date: Wed Jul 1 02:11:39 2015 -0400
nv50/ir: copy joinAt when splitting both before and after
The current implementation only moves the joinAt when splitting after
the given instruction, not before it. So if you have a BB with
foo
instr
bar
joinat
and thus with joinAt set, we end up first splitting before instr, at
which point the instr's bb is updated to the new bb. Since that bb
doesn't have a joinAt set (despite containing one), when splitting after
the instr, there is nothing to copy over. Since the joinat will be in
the "split" bb irrespective of whether we're splitting before or after
the instruction, move it over in either case.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91124
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
Cc: "10.5 10.6" <mesa-stable at lists.freedesktop.org>
(cherry picked from commit 5dcb28c3d26828ed1b0e2bd5a0589c5baab04b85)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_bb.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_bb.cpp
index 51b9225..fa8ee07 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_bb.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_bb.cpp
@@ -332,6 +332,9 @@ BasicBlock::splitBefore(Instruction *insn, bool attach)
BasicBlock *bb = new BasicBlock(func);
assert(!insn || insn->op != OP_PHI);
+ bb->joinAt = joinAt;
+ joinAt = NULL;
+
splitCommon(insn, bb, attach);
return bb;
}
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp
index d26cde6..e1872c9 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp
@@ -1612,6 +1612,7 @@ Converter::insertConvergenceOps(BasicBlock *conv, BasicBlock *fork)
join->fixed = 1;
conv->insertHead(join);
+ assert(!fork->joinAt);
fork->joinAt = new_FlowInstruction(func, OP_JOINAT, conv);
fork->insertBefore(fork->getExit(), fork->joinAt);
}
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nv50.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nv50.cpp
index 0d7612e..b0ed75f 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nv50.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nv50.cpp
@@ -871,6 +871,7 @@ NV50LoweringPreSSA::handleTXL(TexInstruction *i)
BasicBlock *joinBB = i->bb->splitAfter(i);
bld.setPosition(currBB, true);
+ assert(!currBB->joinAt);
currBB->joinAt = bld.mkFlow(OP_JOINAT, joinBB, CC_ALWAYS, NULL);
for (int l = 0; l <= 3; ++l) {
commit 81ac47605f887c9cbf5d2f3a77e7a71a28fbe37f
Author: Tapani Pälli <tapani.palli at intel.com>
Date: Tue May 19 15:01:49 2015 +0300
glsl: validate sampler array indexing for 'constant-index-expression'
Desktop GLSL < 130 and GLSL ES < 300 allow sampler array indexing where
index can contain a loop induction variable. This extra check will warn
during linking if some of the indexes could not be turned in to constant
expressions.
v2: warning instead of error for backends that did not enable
EmitNoIndirectSampler option (have dynamic indexing)
Signed-off-by: Tapani Pälli <tapani.palli at intel.com>
Reviewed-by: Francisco Jerez <currojerez at riseup.net>
Cc: "10.5" and "10.6" <mesa-stable at lists.freedesktop.org>
(cherry picked from commit 9350ea6979c48772e1fb55d4f1c7c5a3cfa987b0)
Signed-off-by: Emil Velikov <emil.l.velikov at gmail.com>
Conflicts:
src/glsl/linker.cpp
diff --git a/src/glsl/linker.cpp b/src/glsl/linker.cpp
index ef815ae..d8f08b9 100644
--- a/src/glsl/linker.cpp
+++ b/src/glsl/linker.cpp
@@ -345,6 +345,39 @@ private:
bool uses_non_zero_stream;
};
+/* Class that finds array derefs and check if indexes are dynamic. */
+class dynamic_sampler_array_indexing_visitor : public ir_hierarchical_visitor
+{
+public:
+ dynamic_sampler_array_indexing_visitor() :
+ dynamic_sampler_array_indexing(false)
+ {
+ }
+
+ ir_visitor_status visit_enter(ir_dereference_array *ir)
+ {
+ if (!ir->variable_referenced())
+ return visit_continue;
+
+ if (!ir->variable_referenced()->type->contains_sampler())
+ return visit_continue;
+
+ if (!ir->array_index->constant_expression_value()) {
+ dynamic_sampler_array_indexing = true;
+ return visit_stop;
+ }
+ return visit_continue;
+ }
+
+ bool uses_dynamic_sampler_array_indexing()
+ {
+ return dynamic_sampler_array_indexing;
+ }
+
+private:
+ bool dynamic_sampler_array_indexing;
+};
+
} /* anonymous namespace */
void
@@ -2479,6 +2512,41 @@ check_explicit_uniform_locations(struct gl_context *ctx,
delete uniform_map;
}
+/**
+ * This check is done to make sure we allow only constant expression
+ * indexing and "constant-index-expression" (indexing with an expression
+ * that includes loop induction variable).
+ */
+static bool
+validate_sampler_array_indexing(struct gl_context *ctx,
+ struct gl_shader_program *prog)
+{
+ dynamic_sampler_array_indexing_visitor v;
+ for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) {
+ if (prog->_LinkedShaders[i] == NULL)
+ continue;
+
+ bool no_dynamic_indexing =
+ ctx->Const.ShaderCompilerOptions[i].EmitNoIndirectSampler;
+
+ /* Search for array derefs in shader. */
+ v.run(prog->_LinkedShaders[i]->ir);
+ if (v.uses_dynamic_sampler_array_indexing()) {
+ const char *msg = "sampler arrays indexed with non-constant "
+ "expressions is forbidden in GLSL %s %u";
+ /* Backend has indicated that it has no dynamic indexing support. */
+ if (no_dynamic_indexing) {
+ linker_error(prog, msg, prog->IsES ? "ES" : "", prog->Version);
+ return false;
+ } else {
+ linker_warning(prog, msg, prog->IsES ? "ES" : "", prog->Version);
+ }
+ }
+ }
+ return true;
+}
+
+
void
link_shaders(struct gl_context *ctx, struct gl_shader_program *prog)
{
@@ -2695,6 +2763,16 @@ link_shaders(struct gl_context *ctx, struct gl_shader_program *prog)
lower_const_arrays_to_uniforms(prog->_LinkedShaders[i]->ir);
}
+ /* Validation for special cases where we allow sampler array indexing
+ * with loop induction variable. This check emits a warning or error
+ * depending if backend can handle dynamic indexing.
+ */
+ if ((!prog->IsES && prog->Version < 130) ||
+ (prog->IsES && prog->Version < 300)) {
+ if (!validate_sampler_array_indexing(ctx, prog))
+ goto done;
+ }
+
/* Check and validate stream emissions in geometry shaders */
validate_geometry_shader_emissions(ctx, prog);
commit f8ea1430ae0bbaf68f73aa3a706d9112402e396d
Author: Tapani Pälli <tapani.palli at intel.com>
Date: Wed Jun 24 13:22:43 2015 +0300
i965: use EmitNoIndirectSampler for gen < 7
Signed-off-by: Tapani Pälli <tapani.palli at intel.com>
Reviewed-by: Francisco Jerez <currojerez at riseup.net>
Cc: "10.5" and "10.6" <mesa-stable at lists.freedesktop.org>
(cherry picked from commit 8852e26e93af1fc4b72bf9d57e847f53e1a1371b)
[Emil Velikov: move the hunk to brw_initialize_context_constants()]
Signed-off-by: Emil Velikov <emil.l.velikov at gmail.com>
Conflicts:
src/mesa/drivers/dri/i965/brw_shader.cpp
diff --git a/src/mesa/drivers/dri/i965/brw_context.c b/src/mesa/drivers/dri/i965/brw_context.c
index e20da0b..ac9157c 100644
--- a/src/mesa/drivers/dri/i965/brw_context.c
+++ b/src/mesa/drivers/dri/i965/brw_context.c
@@ -562,6 +562,10 @@ brw_initialize_context_constants(struct brw_context *brw)
(i == MESA_SHADER_FRAGMENT);
ctx->Const.ShaderCompilerOptions[i].EmitNoIndirectUniform = false;
ctx->Const.ShaderCompilerOptions[i].LowerClipDistance = true;
+
+ /* !ARB_gpu_shader5 */
+ if (brw->gen < 7)
+ ctx->Const.ShaderCompilerOptions[i].EmitNoIndirectSampler = true;
}
ctx->Const.ShaderCompilerOptions[MESA_SHADER_VERTEX].OptimizeForAOS = true;
commit c11a8c1c33512538433a04295c2c7327c6a85a64
Author: Tapani Pälli <tapani.palli at intel.com>
Date: Mon Jun 29 09:48:52 2015 +0300
mesa/st: use EmitNoIndirectSampler if !ARB_gpu_shader5
Signed-off-by: Tapani Pälli <tapani.palli at intel.com>
Reviewed-by: Francisco Jerez <currojerez at riseup.net>
Reviewed-by: Marek Olšák <marek.olsak at amd.com>
Cc: "10.5" and "10.6" <mesa-stable at lists.freedesktop.org>
(cherry picked from commit f17c8c287f3581fccb52714fbd4b2ea09a58e3d3)
diff --git a/src/mesa/state_tracker/st_context.c b/src/mesa/state_tracker/st_context.c
index 9fd6cae..a49e321 100644
--- a/src/mesa/state_tracker/st_context.c
+++ b/src/mesa/state_tracker/st_context.c
@@ -276,6 +276,11 @@ st_create_context_priv( struct gl_context *ctx, struct pipe_context *pipe,
/* For vertex shaders, make sure not to emit saturate when SM 3.0 is not supported */
ctx->Const.ShaderCompilerOptions[MESA_SHADER_VERTEX].EmitNoSat = !st->has_shader_model3;
+ if (!ctx->Extensions.ARB_gpu_shader5) {
+ for (i = 0; i < MESA_SHADER_STAGES; i++)
+ ctx->Const.ShaderCompilerOptions[i].EmitNoIndirectSampler = true;
+ }
+
_mesa_compute_version(ctx);
if (ctx->Version == 0) {
commit 4c80d44311cac8bbf61119c46454f212fb42fb40
Author: Tapani Pälli <tapani.palli at intel.com>
Date: Mon Jun 29 09:53:45 2015 +0300
i915: use EmitNoIndirectSampler
Signed-off-by: Tapani Pälli <tapani.palli at intel.com>
Reviewed-by: Francisco Jerez <currojerez at riseup.net>
Cc: "10.5" and "10.6" <mesa-stable at lists.freedesktop.org>
(cherry picked from commit 2dc2b12ed15abb84c7e2b3c2726dcc1b735abcda)
diff --git a/src/mesa/drivers/dri/i915/i915_context.c b/src/mesa/drivers/dri/i915/i915_context.c
index 42ea54e..57b033c 100644
--- a/src/mesa/drivers/dri/i915/i915_context.c
+++ b/src/mesa/drivers/dri/i915/i915_context.c
@@ -255,6 +255,8 @@ i915CreateContext(int api,
* FINISHME: vertex shaders?
*/
ctx->Const.ShaderCompilerOptions[MESA_SHADER_VERTEX].EmitCondCodes = true;
+ ctx->Const.ShaderCompilerOptions[MESA_SHADER_VERTEX].EmitNoIndirectSampler =
+ true;
struct gl_shader_compiler_options *const fs_options =
& ctx->Const.ShaderCompilerOptions[MESA_SHADER_FRAGMENT];
@@ -266,6 +268,7 @@ i915CreateContext(int api,
fs_options->EmitNoIndirectOutput = true;
fs_options->EmitNoIndirectUniform = true;
fs_options->EmitNoIndirectTemp = true;
+ fs_options->EmitNoIndirectSampler = true;
ctx->Const.MaxDrawBuffers = 1;
ctx->Const.QueryCounterBits.SamplesPassed = 0;
commit 8e79cf6ba05539b990a40861ca3a2c1e32fef369
Author: Tapani Pälli <tapani.palli at intel.com>
Date: Tue Jun 9 13:33:39 2015 +0300
mesa/glsl: new compiler option EmitNoIndirectSampler
Patch provides new compiler option for backend to force unroll loops
that have non-constant expression indexing on sampler arrays.
This makes sure that we can never end up with a shader that uses loop
induction variable as sampler array index but does not unroll because
of having too much instructions. This would not work without dynamic
indexing support.
v2: change option name as EmitNoIndirectSampler
Signed-off-by: Tapani Pälli <tapani.palli at intel.com>
Reviewed-by: Francisco Jerez <currojerez at riseup.net>
Cc: "10.5" and "10.6" <mesa-stable at lists.freedesktop.org>
(cherry picked from commit e4512e1581cf90f56d13cfa6a809832ef3517283)
diff --git a/src/glsl/loop_unroll.cpp b/src/glsl/loop_unroll.cpp
index 635e1dd..7a00fb8 100644
--- a/src/glsl/loop_unroll.cpp
+++ b/src/glsl/loop_unroll.cpp
@@ -100,6 +100,18 @@ public:
virtual ir_visitor_status visit_enter(ir_dereference_array *ir)
{
+ /* Force unroll in case of dynamic indexing with sampler arrays
+ * when EmitNoIndirectSampler is set.
+ */
+ if (options->EmitNoIndirectSampler) {
+ if ((ir->array->type->is_array() &&
+ ir->array->type->contains_sampler()) &&
+ !ir->array_index->constant_expression_value()) {
+ unsupported_variable_indexing = true;
+ return visit_continue;
+ }
+ }
+
/* Check for arrays variably-indexed by a loop induction variable.
* Unrolling the loop may convert that access into constant-indexing.
*
diff --git a/src/mesa/main/mtypes.h b/src/mesa/main/mtypes.h
index 9918541..4f1701c 100644
--- a/src/mesa/main/mtypes.h
+++ b/src/mesa/main/mtypes.h
@@ -3021,6 +3021,7 @@ struct gl_shader_compiler_options
GLboolean EmitNoIndirectOutput; /**< No indirect addressing of outputs */
GLboolean EmitNoIndirectTemp; /**< No indirect addressing of temps */
GLboolean EmitNoIndirectUniform; /**< No indirect addressing of constants */
+ GLboolean EmitNoIndirectSampler; /**< No indirect addressing of samplers */
/*@}*/
GLuint MaxIfDepth; /**< Maximum nested IF blocks */
commit 5bec73364111907dc0a32c38b7d5f9b11c19626a
Author: Tapani Pälli <tapani.palli at intel.com>
Date: Tue Jun 9 13:28:44 2015 +0300
glsl: Allow dynamic sampler array indexing with GLSL ES < 3.00
Dynamic indexing of sampler arrays is prohibited by GLSL ES 3.00.
Earlier versions allow 'constant-index-expression' indexing, where
index can contain a loop induction variable.
Patch allows dynamic indexing for sampler arrays when GLSL ES < 3.00.
This change makes 'sampler-array-index.frag' parser test in Piglit
pass + fishgl.com works when running Chrome on OpenGL ES 2.0 backend
v2: small change and some more commit message (Tapani)
v3: refactor checks to make it more readable (Ian Romanick)
v4: change warning comment in GLSL ES case (Curro)
Signed-off-by: Tapani Pälli <tapani.palli at intel.com>
Signed-off-by: Kalyan Kondapally <kalyan.kondapally at intel.com>
Reviewed-by: Francisco Jerez <currojerez at riseup.net>
Cc: "10.5" and "10.6" <mesa-stable at lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=84225
(cherry picked from commit edb8383c98ee23385731d0fc23a6b6673528a8ec)
Signed-off-by: Emil Velikov <emil.l.velikov at gmail.com>
Conflicts:
src/glsl/ast_array_index.cpp
diff --git a/src/glsl/ast_array_index.cpp b/src/glsl/ast_array_index.cpp
index ff0c757..460e6e0 100644
--- a/src/glsl/ast_array_index.cpp
+++ b/src/glsl/ast_array_index.cpp
@@ -228,24 +228,26 @@ _mesa_ast_array_index_to_hir(void *mem_ctx,
* dynamically uniform expression is undefined.
*/
if (array->type->element_type()->is_sampler()) {
- if (!state->is_version(130, 100)) {
- if (state->es_shader) {
- _mesa_glsl_warning(&loc, state,
- "sampler arrays indexed with non-constant "
- "expressions is optional in %s",
- state->get_version_string());
- } else {
- _mesa_glsl_warning(&loc, state,
- "sampler arrays indexed with non-constant "
- "expressions will be forbidden in GLSL 1.30 "
- "and later");
- }
- } else if (!state->is_version(400, 0) && !state->ARB_gpu_shader5_enable) {
- _mesa_glsl_error(&loc, state,
- "sampler arrays indexed with non-constant "
- "expressions is forbidden in GLSL 1.30 and "
- "later");
- }
+ if (!state->is_version(400, 0) && !state->ARB_gpu_shader5_enable) {
+ if (!state->is_version(130, 100)) {
+ if (state->es_shader) {
+ _mesa_glsl_warning(&loc, state,
+ "sampler arrays indexed with non-constant "
+ "expressions is optional in %s",
+ state->get_version_string());
+ } else {
+ _mesa_glsl_warning(&loc, state,
+ "sampler arrays indexed with non-constant "
+ "expressions will be forbidden in GLSL 1.30 "
+ "and later");
+ }
+ } else if (!state->is_version(400, 0) && !state->ARB_gpu_shader5_enable) {
+ _mesa_glsl_error(&loc, state,
+ "sampler arrays indexed with non-constant "
+ "expressions is forbidden in GLSL 1.30 and "
+ "later");
+ }
+ }
}
}
commit 5985de6f1a9e7b01aef99d75d9564f7b2c40688b
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date: Tue Jun 30 02:46:26 2015 -0400
nv50/ir: fix emission of address reg in 3rd source
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91056
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
Cc: "10.5 10.6" <mesa-stable at lists.freedesktop.org>
(cherry picked from commit d5f1253b0c4637ad996fd0da45095165006d61d3)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nv50.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nv50.cpp
index 2077388..268166f 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nv50.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nv50.cpp
@@ -499,10 +499,14 @@ CodeEmitterNV50::emitForm_MAD(const Instruction *i)
setSrc(i, 2, 2);
if (i->getIndirect(0, 0)) {
- assert(!i->getIndirect(1, 0));
+ assert(!i->srcExists(1) || !i->getIndirect(1, 0));
+ assert(!i->srcExists(2) || !i->getIndirect(2, 0));
setAReg16(i, 0);
- } else {
+ } else if (i->srcExists(1) && i->getIndirect(1, 0)) {
+ assert(!i->srcExists(2) || !i->getIndirect(2, 0));
setAReg16(i, 1);
+ } else {
+ setAReg16(i, 2);
}
}
commit cdc7aa10386a9526960d6a1121c89d1e2eb17b2b
Author: Mario Kleiner <mario.kleiner.de at gmail.com>
Date: Fri Jun 5 15:36:52 2015 +0200
nouveau: Use dup fd as key in drm-winsys hash table to fix ZaphodHeads.
The dup'ed fd owned by the nouveau_screen for a device node
must also be used as key for the winsys hash table, instead
of using the original fd passed in for a screen, to make
multi-x-screen ZaphodHeads configurations work on nouveau.
The original fd's lifetime differs from that of the nouveau_screen stored
in the hash. The hash key is the fd, and in order to compare hash entries
we fstat them, so the fd must be around for as long as the screen is.
This is an extension of the fix in commit a59f2bb1 (nouveau: dup fd
before passing it to device).
Cc: "10.3 10.4 10.5 10.6" <mesa-stable at lists.freedesktop.org>
Signed-off-by: Mario Kleiner <mario.kleiner.de at gmail.com>
Reviewed-by: Ilia Mirkin <imirkin at alum.mit.edu>
(cherry picked from commit a98600b0ebdfc8481c168aae6c5670071e22fc29)
diff --git a/src/gallium/winsys/nouveau/drm/nouveau_drm_winsys.c b/src/gallium/winsys/nouveau/drm/nouveau_drm_winsys.c
index 0635246..5a4c256 100644
--- a/src/gallium/winsys/nouveau/drm/nouveau_drm_winsys.c
+++ b/src/gallium/winsys/nouveau/drm/nouveau_drm_winsys.c
@@ -120,7 +120,11 @@ nouveau_drm_screen_create(int fd)
if (!screen)
goto err;
- util_hash_table_set(fd_tab, intptr_to_pointer(fd), screen);
+ /* Use dupfd in hash table, to avoid errors if the original fd gets
+ * closed by its owner. The hash key needs to live at least as long as
+ * the screen.
+ */
+ util_hash_table_set(fd_tab, intptr_to_pointer(dupfd), screen);
screen->refcount = 1;
pipe_mutex_unlock(nouveau_screen_mutex);
return &screen->base;
commit 16b6fa972d35b1c4047a98bb6aefbd41f1ac2f78
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date: Fri Jun 26 15:01:22 2015 -0400
nv50/ir: propagate modifier to right arg when const-folding mad
An immediate has to be the second arg of an ADD operation. However we
were mistakenly propagating the modifier of the non-folded value to the
folded immediate argument.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91117
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
Cc: "10.5 10.6" <mesa-stable at lists.freedesktop.org>
(cherry picked from commit ad62ec8316a926682958e7ab52639992867c3755)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
index 6643d96..a5c23a4 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
@@ -572,9 +572,12 @@ ConstantFolding::expr(Instruction *i,
case OP_FMA: {
i->op = OP_ADD;
+ /* Move the immediate to the second arg, otherwise the ADD operation
+ * won't be emittable
+ */
i->setSrc(1, i->getSrc(0));
- i->src(1).mod = i->src(2).mod;
i->setSrc(0, i->getSrc(2));
+ i->src(0).mod = i->src(2).mod;
i->setSrc(2, NULL);
ImmediateValue src0;
commit 3c4570e3fc283f81b5cf4b3b05a9bb66cf47ae2f
Author: Michel Dänzer <michel.daenzer at amd.com>
Date: Thu May 21 10:49:05 2015 +0900
winsys/radeon: Unmap GPU VM address range when destroying BO
But only when doing so is safe according to the
RADEON_INFO_VA_UNMAP_WORKING kernel query.
This avoids kernel GPU VM address range conflicts when the BO has other
references than the GEM handle being closed, e.g. when the BO is shared.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90537
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90873
Cc: "10.5 10.6" <mesa-stable at lists.freedesktop.org>
Reviewed-by: Christian König <christian.koenig at amd.com>
(cherry picked from commit 7796e8889a9a2cc1b454dc32d8da3d756404339a)
Signed-off-by: Emil Velikov <emil.l.velikov at gmail.com>
Conflicts:
src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_bo.c b/src/gallium/winsys/radeon/drm/radeon_drm_bo.c
index 1ebec10..7b78550 100644
--- a/src/gallium/winsys/radeon/drm/radeon_drm_bo.c
+++ b/src/gallium/winsys/radeon/drm/radeon_drm_bo.c
@@ -305,14 +305,34 @@ static void radeon_bo_destroy(struct pb_buffer *_buf)
if (bo->ptr)
os_munmap(bo->ptr, bo->base.size);
+ if (mgr->va) {
+ if (bo->rws->va_unmap_working) {
+ struct drm_radeon_gem_va va;
+
+ va.handle = bo->handle;
+ va.vm_id = 0;
+ va.operation = RADEON_VA_UNMAP;
+ va.flags = RADEON_VM_PAGE_READABLE |
+ RADEON_VM_PAGE_WRITEABLE |
+ RADEON_VM_PAGE_SNOOPED;
+ va.offset = bo->va;
+
+ if (drmCommandWriteRead(bo->rws->fd, DRM_RADEON_GEM_VA, &va,
+ sizeof(va)) != 0 &&
+ va.operation == RADEON_VA_RESULT_ERROR) {
+ fprintf(stderr, "radeon: Failed to deallocate virtual address for buffer:\n");
+ fprintf(stderr, "radeon: size : %d bytes\n", bo->base.size);
+ fprintf(stderr, "radeon: va : 0x%016llx\n", (unsigned long long)bo->va);
+ }
+ }
+
+ radeon_bomgr_free_va(mgr, bo->va, bo->base.size);
+ }
+
/* Close object. */
args.handle = bo->handle;
drmIoctl(bo->rws->fd, DRM_IOCTL_GEM_CLOSE, &args);
- if (mgr->va) {
- radeon_bomgr_free_va(mgr, bo->va, bo->base.size);
- }
-
pipe_mutex_destroy(bo->map_mutex);
if (bo->initial_domain & RADEON_DOMAIN_VRAM)
diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c b/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
index 72b7931..12c351d 100644
--- a/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
+++ b/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
@@ -49,6 +49,8 @@
#define RADEON_INFO_ACTIVE_CU_COUNT 0x20
#endif
+#define RADEON_INFO_VA_UNMAP_WORKING 0x25
+
static struct util_hash_table *fd_tab = NULL;
pipe_static_mutex(fd_tab_mutex);
@@ -376,6 +378,8 @@ static boolean do_winsys_init(struct radeon_drm_winsys *ws)
if (!radeon_get_drm_value(ws->fd, RADEON_INFO_IB_VM_MAX_SIZE, NULL,
&ib_vm_max_size))
ws->info.r600_virtual_address = FALSE;
+ radeon_get_drm_value(ws->fd, RADEON_INFO_VA_UNMAP_WORKING, NULL,
+ &ws->va_unmap_working);
}
if (ws->gen == DRV_R600 && !debug_get_bool_option("RADEON_VA", FALSE))
ws->info.r600_virtual_address = FALSE;
diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_winsys.h b/src/gallium/winsys/radeon/drm/radeon_drm_winsys.h
index 1e0c632..ca192be 100644
--- a/src/gallium/winsys/radeon/drm/radeon_drm_winsys.h
+++ b/src/gallium/winsys/radeon/drm/radeon_drm_winsys.h
@@ -55,6 +55,7 @@ struct radeon_drm_winsys {
enum radeon_generation gen;
struct radeon_info info;
uint32_t va_start;
+ uint32_t va_unmap_working;
uint32_t accel_working2;
struct pb_manager *kman;
commit 2843e2a5c846c40cf2932be3963af381e595cbfa
Author: Boyan Ding <boyan.j.ding at gmail.com>
Date: Sat Jun 13 15:33:20 2015 +0800
egl/x11: Remove duplicate call to dri2_x11_add_configs_for_visuals
The call to dri2_x11_add_configs_for_visuals (previously
dri2_add_configs_for_visuals) was moved downwards in commit f8c5b8a1,
but appeared again in its original position after its rename in
d019cd81. Remove it.
Cc: "10.5 10.6" <mesa-stable at lists.freedesktop.org>
Signed-off-by: Boyan Ding <boyan.j.ding at gmail.com>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias at igalia.com>
Reviewed-by: Emil Velikov <emil.l.velikov at gmail.com>
Reviewed-by: Chad Versace <chad.versace at intel.com>
(cherry picked from commit 3fa9bb81ec8b21f472de32e08d0caf917239da08)
diff --git a/src/egl/drivers/dri2/platform_x11.c b/src/egl/drivers/dri2/platform_x11.c
index e79785f..5ab5f39 100644
--- a/src/egl/drivers/dri2/platform_x11.c
+++ b/src/egl/drivers/dri2/platform_x11.c
@@ -1291,11 +1291,6 @@ dri2_initialize_x11_dri2(_EGLDriver *drv, _EGLDisplay *disp)
dri2_x11_setup_swap_interval(dri2_dpy);
- if (dri2_dpy->conn) {
- if (!dri2_x11_add_configs_for_visuals(dri2_dpy, disp))
- goto cleanup_configs;
- }
-
disp->Extensions.KHR_image_pixmap = EGL_TRUE;
disp->Extensions.NOK_swap_region = EGL_TRUE;
disp->Extensions.NOK_texture_from_pixmap = EGL_TRUE;
commit 36250def23c31b02b7bf55785fab2c2644d0a52f
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date: Sun Jun 21 19:03:35 2015 -0400
nv50,nvc0: make sure to pushbuf_refn before putting bo into pushbuf_data
Without first running the bo through pushbuf_refn, the nouveau drm
library will have uninitialized structures regarding this bo, and will
insert incorrect data.
This fixes supertuxkart 0.9 crash on start (where it ends up doing a lot
of indirect draws).
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
Cc: "10.5 10.6" <mesa-stable at lists.freedesktop.org>
(cherry picked from commit 78d58e642549fbf340fdb4fca06720d2891216a8)
diff --git a/src/gallium/drivers/nouveau/nv50/nv50_query.c b/src/gallium/drivers/nouveau/nv50/nv50_query.c
index c867bca..67a36e1 100644
--- a/src/gallium/drivers/nouveau/nv50/nv50_query.c
+++ b/src/gallium/drivers/nouveau/nv50/nv50_query.c
@@ -406,6 +406,7 @@ nv50_query_pushbuf_submit(struct nouveau_pushbuf *push,
/* XXX: does this exist ? */
#define NV50_IB_ENTRY_1_NO_PREFETCH (0 << (31 - 8))
+ PUSH_REFN(push, q->bo, NOUVEAU_BO_RD | NOUVEAU_BO_GART);
nouveau_pushbuf_space(push, 0, 0, 1);
nouveau_pushbuf_data(push, q->bo, q->offset + result_offset, 4 |
NV50_IB_ENTRY_1_NO_PREFETCH);
diff --git a/src/gallium/drivers/nouveau/nv50/nv50_vbo.c b/src/gallium/drivers/nouveau/nv50/nv50_vbo.c
index c1590ee..1fd33b8 100644
--- a/src/gallium/drivers/nouveau/nv50/nv50_vbo.c
+++ b/src/gallium/drivers/nouveau/nv50/nv50_vbo.c
@@ -628,6 +628,7 @@ nv50_draw_elements(struct nv50_context *nv50, boolean shorten,
BEGIN_NV04(push, NV50_3D(VERTEX_BEGIN_GL), 1);
PUSH_DATA (push, prim);
+ PUSH_REFN(push, buf->bo, NOUVEAU_BO_RD | buf->domain);
nouveau_pushbuf_space(push, 8, 0, 1);
switch (index_size) {
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_query.c b/src/gallium/drivers/nouveau/nvc0/nvc0_query.c
index 3a6df9d..8a87b00 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_query.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_query.c
@@ -610,6 +610,7 @@ nvc0_query_pushbuf_submit(struct nouveau_pushbuf *push,
#define NVC0_IB_ENTRY_1_NO_PREFETCH (1 << (31 - 8))
+ PUSH_REFN(push, q->bo, NOUVEAU_BO_RD | NOUVEAU_BO_GART);
nouveau_pushbuf_space(push, 0, 0, 1);
nouveau_pushbuf_data(push, q->bo, q->offset + result_offset, 4 |
NVC0_IB_ENTRY_1_NO_PREFETCH);
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_vbo.c b/src/gallium/drivers/nouveau/nvc0/nvc0_vbo.c
index 657b8c0..8cf2584 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_vbo.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_vbo.c
@@ -829,6 +829,7 @@ nvc0_draw_indirect(struct nvc0_context *nvc0, const struct pipe_draw_info *info)
}
PUSH_DATA(push, nvc0_prim_gl(info->mode));
#define NVC0_IB_ENTRY_1_NO_PREFETCH (1 << (31 - 8))
+ PUSH_REFN(push, buf->bo, NOUVEAU_BO_RD | buf->domain);
nouveau_pushbuf_space(push, 0, 0, 1);
nouveau_pushbuf_data(push,
buf->bo, offset, NVC0_IB_ENTRY_1_NO_PREFETCH | size);
commit 8bcc8f4b480a7eb261e950af5c76f74c34c59abf
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date: Sun Jun 21 15:00:16 2015 -0400
nvc0: always put all tfb bufs into bufctx
Since we clear the TFB bufctx binding point above, we need to put all of
the active tfb's back in, even if they haven't changed since last time.
Otherwise the tfb may get moved into sysmem and the underlying mapping
will generate write errors.
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
Cc: "10.5 10.6" <mesa-stable at lists.freedesktop.org>
(cherry picked from commit 9fcbf515b431a92e0289f234ab77a796cf2a5612)
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_shader_state.c b/src/gallium/drivers/nouveau/nvc0/nvc0_shader_state.c
index 516b33b..7fe050c 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_shader_state.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_shader_state.c
@@ -262,11 +262,13 @@ nvc0_tfb_validate(struct nvc0_context *nvc0)
if (tfb)
targ->stride = tfb->stride[b];
+ buf = nv04_resource(targ->pipe.buffer);
+
+ BCTX_REFN(nvc0->bufctx_3d, TFB, buf, WR);
+
if (!(nvc0->tfbbuf_dirty & (1 << b)))
continue;
- buf = nv04_resource(targ->pipe.buffer);
-
if (!targ->clean)
nvc0_query_fifo_wait(push, targ->pq);
BEGIN_NVC0(push, NVC0_3D(TFB_BUFFER_ENABLE(b)), 5);
@@ -280,7 +282,6 @@ nvc0_tfb_validate(struct nvc0_context *nvc0)
PUSH_DATA(push, 0); /* TFB_BUFFER_OFFSET */
targ->clean = FALSE;
}
- BCTX_REFN(nvc0->bufctx_3d, TFB, buf, WR);
}
for (; b < 4; ++b)
IMMED_NVC0(push, NVC0_3D(TFB_BUFFER_ENABLE(b)), 0);
commit 54ac5920094806def6a8f9a4d13231020daf639b
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date: Tue Jun 23 00:16:59 2015 -0400
glsl: binding point is a texture unit, which is a combined space
This fixes compilation failures in Dota 2 Reborn where a texture unit
binding point was used that was numerically higher than the max
per stage.
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
Reviewed-by: Chris Forbes <chrisf at ijw.co.nz>
Reviewed-by: Timothy Arceri <t_arceri at yahoo.com.au>
Tested-by: Nick Sarnie <commendsarnex at gmail.com>
Cc: "10.5 10.6" <mesa-stable at lists.freedesktop.org>
(cherry picked from commit fccf012adc0d3aad877de095244324aa1d2d046a)
diff --git a/src/glsl/ast_to_hir.cpp b/src/glsl/ast_to_hir.cpp
index 1dcb924..31a9dba 100644
--- a/src/glsl/ast_to_hir.cpp
+++ b/src/glsl/ast_to_hir.cpp
@@ -2108,7 +2108,7 @@ validate_binding_qualifier(struct _mesa_glsl_parse_state *state,
* with an array of size N, all elements of the array from binding
* through binding + N - 1 must be within this range."
*/
- unsigned limit = ctx->Const.Program[state->stage].MaxTextureImageUnits;
+ unsigned limit = ctx->Const.MaxCombinedTextureImageUnits;
if (max_index >= limit) {
_mesa_glsl_error(loc, state, "layout(binding = %d) for %d samplers "
commit 7b528f0d78ef88f0b90b11c7b3b17ee127a9a391
Author: Emil Velikov <emil.l.velikov at gmail.com>
Date: Fri Jun 19 19:22:38 2015 +0100
gbm: do not (over)link against libglapi.so
The whole of GBM does not rely on even a single symbol from the GL
dispatch library, unsuprisingly. The only need for it comes from the
unresolved symbols in the DRI modules, which are now correctly handled
with Frank's commit.
Cc: "10.5 10.6" <mesa-stable at lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov at gmail.com>
(cherry picked from commit a0dc6b7824d3b9095919e29393a379ea7f9c1318)
diff --git a/src/gbm/Makefile.am b/src/gbm/Makefile.am
index dbd4f83..918fdf7 100644
--- a/src/gbm/Makefile.am
+++ b/src/gbm/Makefile.am
@@ -52,7 +52,8 @@ libgbm_dri_la_CFLAGS = \
$(LIBDRM_CFLAGS)
libgbm_la_LIBADD += \
- libgbm_dri.la $(top_builddir)/src/mapi/shared-glapi/libglapi.la $(LIBDRM_LIBS)
+ libgbm_dri.la \
+ $(LIBDRM_LIBS)
endif
TESTS = gbm-symbols-check
commit 8c748fa1259773e9f05c0074ea4a33191a651550
Author: Frank Henigman <fjhenigman at chromium.org>
Date: Thu Nov 6 16:29:26 2014 -0500
gbm: dlopen libglapi so gbm_create_device works
Dri driver libs are not linked to pull in libglapi so gbm_create_device()
fails when it tries to dlopen them (unless the application is linked
with something that does pull in libglapi, like libGL).
Until dri drivers can be fixed properly, dlopen libglapi before trying
to dlopen them.
Cc: "10.5 10.6" <mesa-stable at lists.freedesktop.org>
Signed-off-by: Frank Henigman <fjhenigman at google.com>
[Emil Velikov: Drop misleading bugzilla link, mention that libname differs]
Reviewed-by: Emil Velikov <emil.l.velikov at gmail.com>
(cherry picked from commit 828f13330c9384f2b55c8b0f962d93a74ecd0601)
diff --git a/src/gbm/backends/dri/gbm_dri.c b/src/gbm/backends/dri/gbm_dri.c
index c513672..74d518a 100644
--- a/src/gbm/backends/dri/gbm_dri.c
+++ b/src/gbm/backends/dri/gbm_dri.c
@@ -311,6 +311,14 @@ dri_open_driver(struct gbm_dri_device *dri)
if (search_paths == NULL)
search_paths = DEFAULT_DRIVER_DIR;
+ /* Temporarily work around dri driver libs that need symbols in libglapi
+ * but don't automatically link it in.
+ */
+ /* XXX: Library name differs on per platforms basis. Update this as
+ * osx/cygwin/windows/bsd gets support for GBM..
+ */
+ dlopen("libglapi.so.0", RTLD_LAZY | RTLD_GLOBAL);
+
dri->driver = NULL;
end = search_paths + strlen(search_paths);
for (p = search_paths; p < end && dri->driver == NULL; p = next + 1) {
commit 6bb51be01884e5d1b58897277226a93f200b6759
Author: Emil Velikov <emil.l.velikov at gmail.com>
Date: Fri Jun 19 17:46:41 2015 +0100
configure: error out when building libEGL without shared-glapi
The latter is a hard requirement and without it we'll error out later
on in the build.
Cc: "10.5 10.6" <mesa-stable at lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov at gmail.com>
Reviewed-by: Eric Anholt <eric at anholt.net>
(cherry picked from commit 994be5143a097ae2cf504ba344362edfee388ac3)
diff --git a/configure.ac b/configure.ac
index 7b1c444..3e1f080 100644
--- a/configure.ac
+++ b/configure.ac
@@ -1380,6 +1380,9 @@ if test "x$enable_egl" = xyes; then
if test "$enable_static" != yes; then
if test "x$enable_dri" = xyes; then
HAVE_EGL_DRIVER_DRI2=1
+ if test "x$enable_shared_glapi" = xno; then
+ AC_MSG_ERROR([egl_dri2 requires --enable-shared-glapi])
+ fi
else
# Avoid building an "empty" libEGL. Drop/update this
# when other backends (haiku?) come along.
commit a939a4b9a686d11e12f461b6feacb9e74e2d5d1f
Author: Emil Velikov <emil.l.velikov at gmail.com>
Date: Fri Jun 19 17:44:02 2015 +0100
configure: error out when building backend-less libEGL
Cc: "10.5 10.6" <mesa-stable at lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov at gmail.com>
Reviewed-by: Eric Anholt <eric at anholt.net>
(cherry picked from commit ddc886b5bfe5976fa2e5f49eeefa918736f1aa97)
diff --git a/configure.ac b/configure.ac
index a165bd6..7b1c444 100644
--- a/configure.ac
+++ b/configure.ac
@@ -1379,8 +1379,12 @@ if test "x$enable_egl" = xyes; then
if test "$enable_static" != yes; then
if test "x$enable_dri" = xyes; then
- HAVE_EGL_DRIVER_DRI2=1
- fi
+ HAVE_EGL_DRIVER_DRI2=1
+ else
+ # Avoid building an "empty" libEGL. Drop/update this
+ # when other backends (haiku?) come along.
+ AC_MSG_ERROR([egl requires --enable-dri])
+ fi
fi
fi
commit e724322f39e7c50ec09c15c391dffb82df4c4895
Author: Emil Velikov <emil.l.velikov at gmail.com>
Date: Fri Jun 19 17:19:46 2015 +0100
configure: warn about shared_glapi & xlib-glx only when both are set
Printing out the message when shared_glapi is disabled only leads to
confusion.
Cc: "10.5 10.6" <mesa-stable at lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov at gmail.com>
Reviewed-by: Eric Anholt <eric at anholt.net>
(cherry picked from commit 6d744aaf4e427b6b0b3d8d35d756592a50abbb97)
diff --git a/configure.ac b/configure.ac
index 98c6b8a..a165bd6 100644
--- a/configure.ac
+++ b/configure.ac
@@ -911,7 +911,7 @@ x*yes*yes*)
esac
# Building Xlib-GLX requires shared glapi to be disabled.
-if test "x$enable_xlib_glx" = xyes; then
+if test "x$enable_shared_glapi$enable_xlib_glx" = xyesyes; then
AC_MSG_NOTICE([Shared GLAPI should not used with Xlib-GLX, disabling])
enable_shared_glapi=no
fi
commit 9df2ae3305ed616012710ebd3f6722501518480b
Author: Ben Widawsky <benjamin.widawsky at intel.com>
Date: Wed Jun 3 21:35:51 2015 -0700
i965/gen9: Implement Push Constant Buffer workaround
This implements a workaround (exact excerpt as a comment in the code). The docs
specify [clearly, after you struggle for a while] that the offset isn't relative
to state base. This actually makes sense. This fixes hangs on SKL.
Buffer #0 is meant to be used for normal uniforms.
Buffer #1 is typically used for gather constants when using RS.
Buffer #1-#3 could be used to push a bunch of UBO data which would just be
somewhere in memory, and not relative to the dynamic state.
NOTE: I've moved away from the ternary operator for the new gen9 conditions.
Admittedly it's probably not great to do this, but I really want to fix this all
up in the subsequent patch and doing it here makes that diff a lot nicer. I want
to split out the gen8/9 code to make the function a bit more readable, but to
keep this easily cherry-pickable I am doing this fix first. If we decide not to
merge the cleanup patch then I can revisit this.
Cc: "10.5 10.6" <mesa-stable at lists.freedesktop.org>
Signed-off-by: Ben Widawsky <ben at bwidawsk.net>
Reviewed-by: Anuj Phogat <anuj.phogat at gmail.com>
Tested-by: Valtteri Rantala <Valtteri.rantala at intel.com>
(cherry picked from commit 90754d2df05eafe1a3ee3cd9bb1611a19099fc49)
diff --git a/src/mesa/drivers/dri/i965/gen7_vs_state.c b/src/mesa/drivers/dri/i965/gen7_vs_state.c
index 0e9b4fe..6319ff3 100644
--- a/src/mesa/drivers/dri/i965/gen7_vs_state.c
+++ b/src/mesa/drivers/dri/i965/gen7_vs_state.c
@@ -43,18 +43,52 @@ gen7_upload_constant_state(struct brw_context *brw,
int dwords = brw->gen >= 8 ? 11 : 7;
BEGIN_BATCH(dwords);
OUT_BATCH(opcode << 16 | (dwords - 2));
- OUT_BATCH(active ? stage_state->push_const_size : 0);
- OUT_BATCH(0);
+
+ /* Workaround for SKL+ (we use option #2 until we have a need for more
+ * constant buffers). This comes from the documentation for 3DSTATE_CONSTANT_*
+ *
+ * The driver must ensure The following case does not occur without a flush
+ * to the 3D engine: 3DSTATE_CONSTANT_* with buffer 3 read length equal to
+ * zero committed followed by a 3DSTATE_CONSTANT_* with buffer 0 read length
+ * not equal to zero committed. Possible ways to avoid this condition
+ * include:
+ * 1. always force buffer 3 to have a non zero read length
+ * 2. always force buffer 0 to a zero read length
+ */
+ if (brw->gen >= 9 && active) {
+ OUT_BATCH(0);
+ OUT_BATCH(stage_state->push_const_size);
+ } else {
+ OUT_BATCH(active ? stage_state->push_const_size : 0);
+ OUT_BATCH(0);
+ }
/* Pointer to the constant buffer. Covered by the set of state flags
* from gen6_prepare_wm_contants
*/
- OUT_BATCH(active ? (stage_state->push_const_offset | mocs) : 0);
- OUT_BATCH(0);
- OUT_BATCH(0);
- OUT_BATCH(0);
- if (brw->gen >= 8) {
+ if (brw->gen >= 9 && active) {
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+ /* XXX: When using buffers other than 0, you need to specify the
+ * graphics virtual address regardless of INSPM/debug bits
+ */
+ OUT_RELOC64(brw->batch.bo, I915_GEM_DOMAIN_RENDER, 0,
+ stage_state->push_const_offset);
OUT_BATCH(0);
OUT_BATCH(0);
+ } else if (brw->gen>= 8) {
+ OUT_BATCH(active ? (stage_state->push_const_offset | mocs) : 0);
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+ } else {
+ OUT_BATCH(active ? (stage_state->push_const_offset | mocs) : 0);
+ OUT_BATCH(0);
OUT_BATCH(0);
OUT_BATCH(0);
}
commit e82c46de119f6b31cc51d9236d5e41b436ec66a4
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date: Wed Jun 17 23:00:44 2015 -0400
mesa: add GL_PROGRAM_PIPELINE support in KHR_debug calls
This was apparently missed when ARB_sso support was added.
Add label support to pipeline objects just like all the other
debug-related objects.
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
Reviewed-by: Timothy Arceri <t_arceri at yahoo.com.au>
Cc: "10.5 10.6" <mesa-stable at lists.freedesktop.org>
(cherry picked from commit 770f141866654dab969302f720228497f0fb35fd)
diff --git a/src/mesa/main/mtypes.h b/src/mesa/main/mtypes.h
index 1c33ef4..9918541 100644
--- a/src/mesa/main/mtypes.h
+++ b/src/mesa/main/mtypes.h
@@ -2955,6 +2955,8 @@ struct gl_pipeline_object
mtx_t Mutex;
+ GLchar *Label; /**< GL_KHR_debug */
+
/**
* Programs used for rendering
*
diff --git a/src/mesa/main/objectlabel.c b/src/mesa/main/objectlabel.c
index 78df96b..dd1273c 100644
--- a/src/mesa/main/objectlabel.c
+++ b/src/mesa/main/objectlabel.c
@@ -30,6 +30,7 @@
#include "enums.h"
#include "fbobject.h"
#include "objectlabel.h"
+#include "pipelineobj.h"
#include "queryobj.h"
#include "samplerobj.h"
#include "shaderobj.h"
@@ -214,8 +215,13 @@ get_label_pointer(struct gl_context *ctx, GLenum identifier, GLuint name,
}
break;
case GL_PROGRAM_PIPELINE:
- /* requires GL 4.2 */
- goto invalid_enum;
+ {
+ struct gl_pipeline_object *pipe =
+ _mesa_lookup_pipeline_object(ctx, name);
+ if (pipe)
+ labelPtr = &pipe->Label;
+ }
+ break;
default:
goto invalid_enum;
}
diff --git a/src/mesa/main/pipelineobj.c b/src/mesa/main/pipelineobj.c
index b713d95..beae80e 100644
--- a/src/mesa/main/pipelineobj.c
+++ b/src/mesa/main/pipelineobj.c
@@ -65,6 +65,7 @@ _mesa_delete_pipeline_object(struct gl_context *ctx,
_mesa_reference_shader_program(ctx, &obj->ActiveProgram, NULL);
mtx_destroy(&obj->Mutex);
+ free(obj->Label);
ralloc_free(obj);
}
@@ -136,8 +137,8 @@ _mesa_free_pipeline_data(struct gl_context *ctx)
* a non-existent ID. The spec defines ID 0 as being technically
* non-existent.
*/
-static inline struct gl_pipeline_object *
-lookup_pipeline_object(struct gl_context *ctx, GLuint id)
+struct gl_pipeline_object *
+_mesa_lookup_pipeline_object(struct gl_context *ctx, GLuint id)
{
if (id == 0)
return NULL;
@@ -225,7 +226,7 @@ _mesa_UseProgramStages(GLuint pipeline, GLbitfield stages, GLuint program)
{
GET_CURRENT_CONTEXT(ctx);
- struct gl_pipeline_object *pipe = lookup_pipeline_object(ctx, pipeline);
+ struct gl_pipeline_object *pipe = _mesa_lookup_pipeline_object(ctx, pipeline);
struct gl_shader_program *shProg = NULL;
GLbitfield any_valid_stages;
@@ -337,7 +338,7 @@ _mesa_ActiveShaderProgram(GLuint pipeline, GLuint program)
{
GET_CURRENT_CONTEXT(ctx);
struct gl_shader_program *shProg = NULL;
- struct gl_pipeline_object *pipe = lookup_pipeline_object(ctx, pipeline);
+ struct gl_pipeline_object *pipe = _mesa_lookup_pipeline_object(ctx, pipeline);
if (program != 0) {
shProg = _mesa_lookup_shader_program_err(ctx, program,
@@ -399,7 +400,7 @@ _mesa_BindProgramPipeline(GLuint pipeline)
*/
if (pipeline) {
/* non-default pipeline object */
- newObj = lookup_pipeline_object(ctx, pipeline);
+ newObj = _mesa_lookup_pipeline_object(ctx, pipeline);
if (!newObj) {
_mesa_error(ctx, GL_INVALID_OPERATION,
"glBindProgramPipeline(non-gen name)");
@@ -468,7 +469,7 @@ _mesa_DeleteProgramPipelines(GLsizei n, const GLuint *pipelines)
for (i = 0; i < n; i++) {
struct gl_pipeline_object *obj =
- lookup_pipeline_object(ctx, pipelines[i]);
+ _mesa_lookup_pipeline_object(ctx, pipelines[i]);
if (obj) {
ASSERT(obj->Name == pipelines[i]);
@@ -545,7 +546,7 @@ _mesa_IsProgramPipeline(GLuint pipeline)
{
GET_CURRENT_CONTEXT(ctx);
- struct gl_pipeline_object *obj = lookup_pipeline_object(ctx, pipeline);
+ struct gl_pipeline_object *obj = _mesa_lookup_pipeline_object(ctx, pipeline);
if (obj == NULL)
return GL_FALSE;
@@ -559,7 +560,7 @@ void GLAPIENTRY
_mesa_GetProgramPipelineiv(GLuint pipeline, GLenum pname, GLint *params)
{
GET_CURRENT_CONTEXT(ctx);
- struct gl_pipeline_object *pipe = lookup_pipeline_object(ctx, pipeline);
+ struct gl_pipeline_object *pipe = _mesa_lookup_pipeline_object(ctx, pipeline);
/* Are geometry shaders available in this context?
*/
@@ -797,7 +798,7 @@ _mesa_ValidateProgramPipeline(GLuint pipeline)
{
GET_CURRENT_CONTEXT(ctx);
- struct gl_pipeline_object *pipe = lookup_pipeline_object(ctx, pipeline);
+ struct gl_pipeline_object *pipe = _mesa_lookup_pipeline_object(ctx, pipeline);
if (!pipe) {
_mesa_error(ctx, GL_INVALID_OPERATION,
@@ -815,7 +816,7 @@ _mesa_GetProgramPipelineInfoLog(GLuint pipeline, GLsizei bufSize,
{
GET_CURRENT_CONTEXT(ctx);
- struct gl_pipeline_object *pipe = lookup_pipeline_object(ctx, pipeline);
+ struct gl_pipeline_object *pipe = _mesa_lookup_pipeline_object(ctx, pipeline);
if (!pipe) {
_mesa_error(ctx, GL_INVALID_VALUE,
diff --git a/src/mesa/main/pipelineobj.h b/src/mesa/main/pipelineobj.h
index 7285a78..2956a15 100644
--- a/src/mesa/main/pipelineobj.h
+++ b/src/mesa/main/pipelineobj.h
@@ -45,6 +45,9 @@ _mesa_init_pipeline(struct gl_context *ctx);
extern void
_mesa_free_pipeline_data(struct gl_context *ctx);
+extern struct gl_pipeline_object *
+_mesa_lookup_pipeline_object(struct gl_context *ctx, GLuint id);
+
extern void
_mesa_reference_pipeline_object_(struct gl_context *ctx,
struct gl_pipeline_object **ptr,
commit fc6caeb9ad410c0ce171da4c17d60c11a62c5435
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date: Wed Jun 17 15:09:26 2015 -0400
glsl: add version checks to conditionals for builtin variable enablement
A number of builtin variables have checks based on the extension being
enabled, but were missing enablement via a higher GLSL version.
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
Reviewed-by: Timothy Arceri <t_arceri at yahoo.com.au>
Cc: "10.5 10.6" <mesa-stable at lists.freedesktop.org>
(cherry picked from commit b6e238023c4f8af2328dc3bcab1d73a3e19f4fbb)
diff --git a/src/glsl/builtin_variables.cpp b/src/glsl/builtin_variables.cpp
index 65e32ad..b079f28 100644
--- a/src/glsl/builtin_variables.cpp
+++ b/src/glsl/builtin_variables.cpp
@@ -849,9 +849,9 @@ void
builtin_variable_generator::generate_gs_special_vars()
{
add_output(VARYING_SLOT_LAYER, int_t, "gl_Layer");
- if (state->ARB_viewport_array_enable)
+ if (state->is_version(410, 0) || state->ARB_viewport_array_enable)
add_output(VARYING_SLOT_VIEWPORT, int_t, "gl_ViewportIndex");
- if (state->ARB_gpu_shader5_enable)
+ if (state->is_version(400, 0) || state->ARB_gpu_shader5_enable)
add_system_value(SYSTEM_VALUE_INVOCATION_ID, int_t, "gl_InvocationID");
/* Although gl_PrimitiveID appears in tessellation control and tessellation
@@ -919,7 +919,7 @@ builtin_variable_generator::generate_fs_special_vars()
var->enable_extension_warning("GL_AMD_shader_stencil_export");
}
- if (state->ARB_sample_shading_enable) {
+ if (state->is_version(400, 0) || state->ARB_sample_shading_enable) {
add_system_value(SYSTEM_VALUE_SAMPLE_ID, int_t, "gl_SampleID");
add_system_value(SYSTEM_VALUE_SAMPLE_POS, vec2_t, "gl_SamplePosition");
/* From the ARB_sample_shading specification:
@@ -932,11 +932,11 @@ builtin_variable_generator::generate_fs_special_vars()
add_output(FRAG_RESULT_SAMPLE_MASK, array(int_t, 1), "gl_SampleMask");
}
- if (state->ARB_gpu_shader5_enable) {
+ if (state->is_version(400, 0) || state->ARB_gpu_shader5_enable) {
add_system_value(SYSTEM_VALUE_SAMPLE_MASK_IN, array(int_t, 1), "gl_SampleMaskIn");
}
- if (state->ARB_fragment_layer_viewport_enable) {
+ if (state->is_version(430, 0) || state->ARB_fragment_layer_viewport_enable) {
add_input(VARYING_SLOT_LAYER, int_t, "gl_Layer");
add_input(VARYING_SLOT_VIEWPORT, int_t, "gl_ViewportIndex");
}
commit e3bcc8775598c36595d5044163e6a3b658fea2d8
Author: Chris Wilson <chris at chris-wilson.co.uk>
Date: Fri Jun 5 14:45:18 2015 +0100
i965: Export format comparison for blitting between miptrees
Since the introduction of
commit 536003c11e4cb1172c540932ce3cce06f03bf44e
Author: Boyan Ding <boyan.j.ding at gmail.com>
Date: Wed Mar 25 19:36:54 2015 +0800
i965: Add XRGB8888 format to intel_screen_make_configs
winsys buffers no longer have an alpha channel. This causes
_mesa_format_matches_format_and_type() to reject previously working BGRA
uploads from using the BLT fast path. Instead of using the generic
routine for matching formats exactly, export the slightly more relaxed
check from intel_miptree_blit() which importantly allows the blitter
routine to apply a small number of format conversions.
References: https://bugs.freedesktop.org/show_bug.cgi?id=90839
Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
Cc: Jason Ekstrand <jason at jlekstrand.net>
Cc: Alexander Monakov <amonakov at gmail.com>
Cc: Kristian Høgsberg <krh at bitplanet.net>
Cc: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
Cc: mesa-stable at lists.freedesktop.org
(cherry picked from commit 922c0c9fd526ce19b87bc74a3159dec7705c1de1)
Signed-off-by: Emil Velikov <emil.l.velikov at gmail.com>
Conflicts:
src/mesa/drivers/dri/i965/intel_pixel_draw.c
diff --git a/src/mesa/drivers/dri/i965/intel_blit.c b/src/mesa/drivers/dri/i965/intel_blit.c
index efdbfe7..6b04adf 100644
--- a/src/mesa/drivers/dri/i965/intel_blit.c
+++ b/src/mesa/drivers/dri/i965/intel_blit.c
@@ -139,8 +139,8 @@ blt_pitch(struct intel_mipmap_tree *mt)
return pitch;
}
-static bool
-blt_compatible_formats(mesa_format src, mesa_format dst)
+bool
+intel_miptree_blit_compatible_formats(mesa_format src, mesa_format dst)
{
/* The BLT doesn't handle sRGB conversion */
assert(src == _mesa_get_srgb_format_linear(src));
@@ -206,7 +206,7 @@ intel_miptree_blit(struct brw_context *brw,
* the X channel don't matter), and XRGB8888 to ARGB8888 by setting the A
* channel to 1.0 at the end.
*/
- if (!blt_compatible_formats(src_format, dst_format)) {
+ if (!intel_miptree_blit_compatible_formats(src_format, dst_format)) {
perf_debug("%s: Can't use hardware blitter from %s to %s, "
"falling back.\n", __FUNCTION__,
_mesa_get_format_name(src_format),
diff --git a/src/mesa/drivers/dri/i965/intel_blit.h b/src/mesa/drivers/dri/i965/intel_blit.h
index f563939..2287c37 100644
--- a/src/mesa/drivers/dri/i965/intel_blit.h
+++ b/src/mesa/drivers/dri/i965/intel_blit.h
@@ -46,6 +46,8 @@ intelEmitCopyBlit(struct brw_context *brw,
GLshort w, GLshort h,
GLenum logicop );
+bool intel_miptree_blit_compatible_formats(mesa_format src, mesa_format dst);
+
bool intel_miptree_blit(struct brw_context *brw,
struct intel_mipmap_tree *src_mt,
int src_level, int src_slice,
diff --git a/src/mesa/drivers/dri/i965/intel_pixel_draw.c b/src/mesa/drivers/dri/i965/intel_pixel_draw.c
index e0904de..e0ff658 100644
--- a/src/mesa/drivers/dri/i965/intel_pixel_draw.c
+++ b/src/mesa/drivers/dri/i965/intel_pixel_draw.c
@@ -28,6 +28,7 @@
#include "main/glheader.h"
#include "main/enums.h"
#include "main/image.h"
+#include "main/glformats.h"
#include "main/mtypes.h"
#include "main/condrender.h"
#include "main/fbobject.h"
@@ -76,8 +77,14 @@ do_blit_drawpixels(struct gl_context * ctx,
struct gl_renderbuffer *rb = ctx->DrawBuffer->_ColorDrawBuffers[0];
struct intel_renderbuffer *irb = intel_renderbuffer(rb);
- if (!_mesa_format_matches_format_and_type(irb->mt->format, format, type,
- false)) {
+ mesa_format src_format = _mesa_format_from_format_and_type(format, type);
+ mesa_format dst_format = irb->mt->format;
+
+ /* We can safely discard sRGB encode/decode for the DrawPixels interface */
+ src_format = _mesa_get_srgb_format_linear(src_format);
+ dst_format = _mesa_get_srgb_format_linear(dst_format);
+
+ if (!intel_miptree_blit_compatible_formats(src_format, dst_format)) {
DBG("%s: bad format for blit\n", __FUNCTION__);
return false;
}
commit 22d7f3ceca1b09a3c6b26b6935db99bf9ed3caa9
Author: Chris Wilson <chris at chris-wilson.co.uk>
Date: Fri Jun 5 14:33:36 2015 +0100
i915: Blit RGBX<->RGBA drawpixels
The blitter already has code to accommodate filling in the alpha channel
for BGRX destination formats, so expand this to also allow filling the
alpha channgel in RGBX formats.
More importantly for the next patch is moving the test into its own
function for the purpose of exporting the check to the callers.
v2: Fix alpha expansion as spotted by Alexander with the fix suggested by
Kenneth
Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
Cc: Jason Ekstrand <jason at jlekstrand.net>
Cc: Alexander Monakov <amonakov at gmail.com>
Cc: Kristian Høgsberg <krh at bitplanet.net>
Cc: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by Kenneth Graunke <kenneth at whitecape.org>
Cc: mesa-stable at lists.freedesktop.org
(cherry picked from commit c2d0606827412b710dcaed80268fc665de8c9c5d)
diff --git a/src/mesa/drivers/dri/i965/intel_blit.c b/src/mesa/drivers/dri/i965/intel_blit.c
index 247816d..efdbfe7 100644
--- a/src/mesa/drivers/dri/i965/intel_blit.c
+++ b/src/mesa/drivers/dri/i965/intel_blit.c
@@ -139,6 +139,31 @@ blt_pitch(struct intel_mipmap_tree *mt)
return pitch;
}
+static bool
+blt_compatible_formats(mesa_format src, mesa_format dst)
+{
+ /* The BLT doesn't handle sRGB conversion */
+ assert(src == _mesa_get_srgb_format_linear(src));
+ assert(dst == _mesa_get_srgb_format_linear(dst));
+
+ /* No swizzle or format conversions possible, except... */
+ if (src == dst)
+ return true;
+
+ /* ...we can either discard the alpha channel when going from A->X,
+ * or we can fill the alpha channel with 0xff when going from X->A
+ */
+ if (src == MESA_FORMAT_B8G8R8A8_UNORM || src == MESA_FORMAT_B8G8R8X8_UNORM)
+ return (dst == MESA_FORMAT_B8G8R8A8_UNORM ||
+ dst == MESA_FORMAT_B8G8R8X8_UNORM);
+
+ if (src == MESA_FORMAT_R8G8B8A8_UNORM || src == MESA_FORMAT_R8G8B8X8_UNORM)
+ return (dst == MESA_FORMAT_R8G8B8A8_UNORM ||
+ dst == MESA_FORMAT_R8G8B8X8_UNORM);
+
+ return false;
+}
+
/**
* Implements a rectangular block transfer (blit) of pixels between two
* miptrees.
@@ -181,11 +206,7 @@ intel_miptree_blit(struct brw_context *brw,
* the X channel don't matter), and XRGB8888 to ARGB8888 by setting the A
* channel to 1.0 at the end.
*/
- if (src_format != dst_format &&
- ((src_format != MESA_FORMAT_B8G8R8A8_UNORM &&
- src_format != MESA_FORMAT_B8G8R8X8_UNORM) ||
- (dst_format != MESA_FORMAT_B8G8R8A8_UNORM &&
- dst_format != MESA_FORMAT_B8G8R8X8_UNORM))) {
+ if (!blt_compatible_formats(src_format, dst_format)) {
perf_debug("%s: Can't use hardware blitter from %s to %s, "
"falling back.\n", __FUNCTION__,
_mesa_get_format_name(src_format),
@@ -270,8 +291,9 @@ intel_miptree_blit(struct brw_context *brw,
return false;
}
- if (src_mt->format == MESA_FORMAT_B8G8R8X8_UNORM &&
- dst_mt->format == MESA_FORMAT_B8G8R8A8_UNORM) {
+ /* XXX This could be done in a single pass using XY_FULL_MONO_PATTERN_BLT */
+ if (_mesa_get_format_bits(src_format, GL_ALPHA_BITS) == 0 &&
+ _mesa_get_format_bits(dst_format, GL_ALPHA_BITS) > 0) {
intel_miptree_set_alpha_to_one(brw, dst_mt,
dst_x, dst_y,
width, height);
commit 074122fbe34bc077ea3fc754c3696298f433d41b
Author: Chris Wilson <chris at chris-wilson.co.uk>
Date: Fri Jun 5 13:49:08 2015 +0100
i965: Fix HW blitter pitch limits
The BLT pitch is specified in bytes for linear surfaces and in dwords
for tiled surfaces. In both cases the programmable limit is 32,767, so
adjust the check to compensate for the effect of tiling.
v2: Tweak whitespace for functions (Kenneth)
Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
Cc: Kristian Høgsberg <krh at bitplanet.net>
Cc: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by Kenneth Graunke <kenneth at whitecape.org>
Cc: mesa-stable at lists.freedesktop.org
(cherry picked from commit 8da79b8378ae87474d8c47ad955e4833edf98359)
diff --git a/src/mesa/drivers/dri/i965/intel_blit.c b/src/mesa/drivers/dri/i965/intel_blit.c
index 7252e5d..247816d 100644
--- a/src/mesa/drivers/dri/i965/intel_blit.c
+++ b/src/mesa/drivers/dri/i965/intel_blit.c
@@ -130,6 +130,15 @@ set_blitter_tiling(struct brw_context *brw,
ADVANCE_BATCH(); \
} while (0)
+static int
+blt_pitch(struct intel_mipmap_tree *mt)
+{
+ int pitch = mt->pitch;
+ if (mt->tiling)
+ pitch /= 4;
+ return pitch;
+}
+
/**
* Implements a rectangular block transfer (blit) of pixels between two
* miptrees.
@@ -197,14 +206,14 @@ intel_miptree_blit(struct brw_context *brw,
*
* Furthermore, intelEmitCopyBlit (which is called below) uses a signed
* 16-bit integer to represent buffer pitch, so it can only handle buffer
- * pitches < 32k.
+ * pitches < 32k. However, the pitch is measured in bytes for linear buffers
+ * and dwords for tiled buffers.
*
* As a result of these two limitations, we can only use the blitter to do
- * this copy when the miptree's pitch is less than 32k.
+ * this copy when the miptree's pitch is less than 32k linear or 128k tiled.
*/
- if (src_mt->pitch >= 32768 ||
- dst_mt->pitch >= 32768) {
- perf_debug("Falling back due to >=32k pitch\n");
+ if (blt_pitch(src_mt) >= 32768 || blt_pitch(dst_mt) >= 32768) {
+ perf_debug("Falling back due to >= 32k/128k pitch\n");
return false;
}
commit a81b1d5512f64ffca1c13a5937e7eb0de24713ae
Author: Emil Velikov <emil.l.velikov at gmail.com>
Date: Sat Jun 20 16:37:16 2015 +0100
docs: Add sha256sums for the 10.5.8 release
Signed-off-by: Emil Velikov <emil.l.velikov at gmail.com>
diff --git a/docs/relnotes/10.5.8.html b/docs/relnotes/10.5.8.html
index 8c5c8ab..6239400 100644
--- a/docs/relnotes/10.5.8.html
+++ b/docs/relnotes/10.5.8.html
@@ -31,7 +31,8 @@ because compatibility contexts are not supported.
<h2>SHA256 checksums</h2>
<pre>
-TBD
+611ddcfa3c1bf13f7e6ccac785c8749c3b74c9a78452bac70f8372cf6b209aa0 mesa-10.5.8.tar.gz
+2866b855c5299a4aed066338c77ff6467c389b2c30ada7647be8758663da2b54 mesa-10.5.8.tar.xz
</pre>
commit 24b043aab73ce066ded6e4bc93f589008dfc8484
Author: Emil Velikov <emil.l.velikov at gmail.com>
Date: Sat Jun 20 15:14:45 2015 +0100
Add release notes for the 10.5.8 release
Signed-off-by: Emil Velikov <emil.l.velikov at gmail.com>
diff --git a/docs/relnotes/10.5.8.html b/docs/relnotes/10.5.8.html
new file mode 100644
index 0000000..8c5c8ab
--- /dev/null
+++ b/docs/relnotes/10.5.8.html
@@ -0,0 +1,111 @@
+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
+<html lang="en">
+<head>
+ <meta http-equiv="content-type" content="text/html; charset=utf-8">
+ <title>Mesa Release Notes</title>
+ <link rel="stylesheet" type="text/css" href="../mesa.css">
+</head>
+<body>
+
+<div class="header">
+ <h1>The Mesa 3D Graphics Library</h1>
+</div>
+
+<iframe src="../contents.html"></iframe>
+<div class="content">
+
+<h1>Mesa 10.5.8 Release Notes / June 20, 2015</h1>
+
+<p>
+Mesa 10.5.8 is a bug fix release which fixes bugs found since the 10.5.7 release.
+</p>
+<p>
+Mesa 10.5.8 implements the OpenGL 3.3 API, but the version reported by
+glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
+glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
+Some drivers don't support all the features required in OpenGL 3.3. OpenGL
+3.3 is <strong>only</strong> available if requested at context creation
+because compatibility contexts are not supported.
+</p>
+
+
+<h2>SHA256 checksums</h2>
+<pre>
+TBD
+</pre>
+
+
+<h2>New features</h2>
+<p>None</p>
+
+<h2>Bug fixes</h2>
+
+<p>This list is likely incomplete.</p>
+
+<ul>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=90310">Bug 90310</a> - Fails to build gallium_dri.so at linking stage with clang because of multiple redefinitions</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=90347">Bug 90347</a> - [NVE0+] Failure to insert texbar under some circumstances (causing bad colors in Terasology)</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=90520">Bug 90520</a> - Register spilling clobbers registers used elsewhere in the shader</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=90905">Bug 90905</a> - mesa: Finish subdir-objects transition</li>
+
+</ul>
+
+
+<h2>Changes</h2>
+
+<p>Ben Widawsky (1):</p>
+<ul>
+ <li>i965: Disable compaction for EOT send messages</li>
+</ul>
+
+<p>Boyan Ding (1):</p>
+<ul>
+ <li>egl/x11: Set version of swrastLoader to 2</li>
+</ul>
+
+<p>Emil Velikov (2):</p>
+<ul>
+ <li>docs: Add sha256sums for the 10.5.7 release</li>
+ <li>Update version to 10.5.8</li>
+</ul>
+
+<p>Erik Faye-Lund (1):</p>
+<ul>
+ <li>mesa: build xmlconfig to a separate static library</li>
+</ul>
+
+<p>Francisco Jerez (1):</p>
+<ul>
+ <li>i965: Don't compact instructions with unmapped bits.</li>
+</ul>
+
+<p>Ilia Mirkin (3):</p>
+<ul>
+ <li>nvc0/ir: fix collection of first uses for texture barrier insertion</li>
+ <li>nv50,nvc0: clamp uniform size to 64k</li>
+ <li>nvc0/ir: can't have a join on a load with an indirect source</li>
+</ul>
+
+<p>Jason Ekstrand (1):</p>
+<ul>
+ <li>i965/fs: Don't let the EOT send message interfere with the MRF hack</li>
+</ul>
+
+<p>Marek Olšák (1):</p>
+<ul>
+ <li>egl: fix setting context flags</li>
+</ul>
+
+<p>Roland Scheidegger (1):</p>
+<ul>
+ <li>draw: (trivial) fix NULL pointer dereference</li>
+</ul>
+
+
+</div>
+</body>
+</html>
commit 2de5d0762a03b1819dd193758e9ec469b9cbf2d0
Author: Emil Velikov <emil.l.velikov at gmail.com>
Date: Sat Jun 20 15:09:23 2015 +0100
Update version to 10.5.8
Signed-off-by: Emil Velikov <emil.l.velikov at gmail.com>
diff --git a/VERSION b/VERSION
index e9d57a4..0b09579 100644
--- a/VERSION
+++ b/VERSION
@@ -1 +1 @@
-10.5.7
+10.5.8
commit e6f1a49809e7b4674cb073669781b806967cac8e
Author: Boyan Ding <boyan.j.ding at gmail.com>
Date: Tue Jun 16 11:08:33 2015 +0800
egl/x11: Set version of swrastLoader to 2
which it actually implements instead of the newest version defined in
dri_interface.h
Cc: "10.5 10.6" <mesa-stable at lists.freedesktop.org>
Signed-off-by: Boyan Ding <boyan.j.ding at gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
Reviewed-by: Emil Velikov <emil.l.velikov at gmail.com>
(cherry picked from commit 997fc807b2f71ef65b4601d6db33d0f912c18d3f)
diff --git a/src/egl/drivers/dri2/platform_x11.c b/src/egl/drivers/dri2/platform_x11.c
index cbcf6a7..e79785f 100644
--- a/src/egl/drivers/dri2/platform_x11.c
+++ b/src/egl/drivers/dri2/platform_x11.c
@@ -1120,7 +1120,7 @@ dri2_initialize_x11_swrast(_EGLDriver *drv, _EGLDisplay *disp)
goto cleanup_conn;
dri2_dpy->swrast_loader_extension.base.name = __DRI_SWRAST_LOADER;
- dri2_dpy->swrast_loader_extension.base.version = __DRI_SWRAST_LOADER_VERSION;
+ dri2_dpy->swrast_loader_extension.base.version = 2;
dri2_dpy->swrast_loader_extension.getDrawableInfo = swrastGetDrawableInfo;
dri2_dpy->swrast_loader_extension.putImage = swrastPutImage;
dri2_dpy->swrast_loader_extension.getImage = swrastGetImage;
commit 4ab83eee98f48d9b48160da9bbe589750984297e
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date: Wed Jun 17 22:18:09 2015 -0400
nvc0/ir: can't have a join on a load with an indirect source
Triggers an INVALID_OPCODE warning on GK208. Seems rare enough to not
warrant verification on other chips. Fixes the new piglits:
ubo_array_indexing/fs-nonuniform-control-flow.shader_test
ubo_array_indexing/vs-nonuniform-control-flow.shader_test
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
Cc: "10.5 10.6" <mesa-stable at lists.freedesktop.org>
(cherry picked from commit 36e3eb6a957f8f20ed187ec88a067fc65cb81432)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
index 85ebd1c..6643d96 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
@@ -2203,7 +2203,7 @@ FlatteningPass::visit(BasicBlock *bb)
insn->op != OP_LINTERP && // probably just nve4
insn->op != OP_PINTERP && // probably just nve4
((insn->op != OP_LOAD && insn->op != OP_STORE) ||
- typeSizeof(insn->dType) <= 4) &&
+ (typeSizeof(insn->dType) <= 4 && !insn->src(0).isIndirect(0))) &&
!insn->isNop()) {
insn->join = 1;
bb->remove(bb->getExit());
commit 512927bc021c20235213b8ba4c6ebb5432fecc5e
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date: Mon Jun 15 15:48:58 2015 -0400
nv50,nvc0: clamp uniform size to 64k
The state tracker will pass through requests from buggy applications
which will have the buffer size larger than the max allowed (64k). Clamp
the size to 64k so that we don't get errors when uploading the constbuf
data.
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
Cc: "10.5 10.6" <mesa-stable at lists.freedesktop.org>
(cherry picked from commit 8b24388647f626a5cad10fd48e61335ed26a8560)
diff --git a/src/gallium/drivers/nouveau/nv50/nv50_state.c b/src/gallium/drivers/nouveau/nv50/nv50_state.c
index 2907504..d4d41af 100644
--- a/src/gallium/drivers/nouveau/nv50/nv50_state.c
+++ b/src/gallium/drivers/nouveau/nv50/nv50_state.c
@@ -811,12 +811,12 @@ nv50_set_constant_buffer(struct pipe_context *pipe, uint shader, uint index,
nv50->constbuf[s][i].user = (cb && cb->user_buffer) ? TRUE : FALSE;
if (nv50->constbuf[s][i].user) {
nv50->constbuf[s][i].u.data = cb->user_buffer;
- nv50->constbuf[s][i].size = cb->buffer_size;
+ nv50->constbuf[s][i].size = MIN2(cb->buffer_size, 0x10000);
nv50->constbuf_valid[s] |= 1 << i;
} else
if (res) {
nv50->constbuf[s][i].offset = cb->buffer_offset;
- nv50->constbuf[s][i].size = align(cb->buffer_size, 0x100);
+ nv50->constbuf[s][i].size = MIN2(align(cb->buffer_size, 0x100), 0x10000);
nv50->constbuf_valid[s] |= 1 << i;
} else {
nv50->constbuf_valid[s] &= ~(1 << i);
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_state.c b/src/gallium/drivers/nouveau/nvc0/nvc0_state.c
index dca06f4..bec5aa4 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_state.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_state.c
@@ -811,12 +811,12 @@ nvc0_set_constant_buffer(struct pipe_context *pipe, uint shader, uint index,
nvc0->constbuf[s][i].user = (cb && cb->user_buffer) ? TRUE : FALSE;
if (nvc0->constbuf[s][i].user) {
nvc0->constbuf[s][i].u.data = cb->user_buffer;
- nvc0->constbuf[s][i].size = cb->buffer_size;
+ nvc0->constbuf[s][i].size = MIN2(cb->buffer_size, 0x10000);
nvc0->constbuf_valid[s] |= 1 << i;
} else
if (cb) {
nvc0->constbuf[s][i].offset = cb->buffer_offset;
- nvc0->constbuf[s][i].size = align(cb->buffer_size, 0x100);
+ nvc0->constbuf[s][i].size = MIN2(align(cb->buffer_size, 0x100), 0x10000);
nvc0->constbuf_valid[s] |= 1 << i;
}
else {
commit b26bac8b1e094b8400c2f5dfa22283c23dda4080
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date: Fri Jun 12 16:09:05 2015 +0200
nvc0/ir: fix collection of first uses for texture barrier insertion
One of the places we have to insert texbars is in situations where the
result of the tex gets overwritten by a different instruction (e.g. in a
conditional statement). However in some situations it can actually
appear as though the original tex itself is an overwriting instruction.
This can naturally never really happen, so just ignore the tex
instruction when it comes up.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90347
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
Cc: "10.5 10.6" <mesa-stable at lists.freedesktop.org>
(cherry picked from commit a2af42c1d2dc91f4c31e25ff9fff15a89a9b6ead)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
index 8ae594c..5ef5e2a 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
@@ -145,7 +145,7 @@ NVC0LegalizePostRA::insnDominatedBy(const Instruction *later,
void
NVC0LegalizePostRA::addTexUse(std::list<TexUse> &uses,
- Instruction *usei, const Instruction *insn)
+ Instruction *usei, const Instruction *texi)
{
bool add = true;
for (std::list<TexUse>::iterator it = uses.begin();
@@ -160,7 +160,7 @@ NVC0LegalizePostRA::addTexUse(std::list<TexUse> &uses,
++it;
}
if (add)
- uses.push_back(TexUse(usei, insn));
+ uses.push_back(TexUse(usei, texi));
}
void
@@ -172,7 +172,8 @@ NVC0LegalizePostRA::findOverwritingDefs(const Instruction *texi,
while (insn->op == OP_MOV && insn->getDef(0)->equals(insn->getSrc(0)))
insn = insn->getSrc(0)->getUniqueInsn();
- if (!insn->bb->reachableBy(texi->bb, term))
+ // NOTE: the tex itself is, of course, not an overwriting definition
+ if (insn == texi || !insn->bb->reachableBy(texi->bb, term))
return;
switch (insn->op) {
@@ -220,7 +221,12 @@ NVC0LegalizePostRA::findFirstUses(
visited.insert(usei);
if (usei->op == OP_PHI || usei->op == OP_UNION) {
- // need a barrier before WAW cases
+ // need a barrier before WAW cases, like:
+ // %r0 = tex
+ // if ...
+ // texbar <- is required or tex might replace x again
+ // %r1 = x <- overwriting def
+ // %r2 = phi %r0, %r1
for (int s = 0; usei->srcExists(s); ++s) {
Instruction *defi = usei->getSrc(s)->getUniqueInsn();
if (defi && &usei->src(s) != *u)
@@ -239,7 +245,7 @@ NVC0LegalizePostRA::findFirstUses(
usei->subOp != NV50_IR_SUBOP_MOV_FINAL) {
findFirstUses(texi, usei, uses, visited);
} else {
- addTexUse(uses, usei, insn);
+ addTexUse(uses, usei, texi);
}
}
}
commit 20fd2abdd6dce03db7ad79375ddfc27b4b4926dc
Author: Erik Faye-Lund <kusmabite at gmail.com>
Date: Wed Jun 10 23:35:04 2015 +0100
mesa: build xmlconfig to a separate static library
As we use the file from both the dri modules and loader, we end up with
multiple definition of the symbols provided in our gallium dri modules.
Additionally we compile the file twice.
Resolve both issues, effectively enabling the build on toolchains which
don't support -Wl,--allow-multiple-definition.
v2: [Emil Velikov]
- Fix the Scons/Android build.
- Resolve libgbm build issues (bring back the missing -lm)
Cc: Julien Isorce <j.isorce at samsung.com>
Cc: "10.5 10.6" <mesa-stable at lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90310
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90905
Acked-by: Matt Turner <mattst88 at gmail.com>
Signed-off-by: Emil Velikov <emil.l.velikov at gmail.com>
(cherry picked from commit 634f2002563b4fca68490c0a39518ea838f28fb1)
diff --git a/src/gallium/targets/dri/Makefile.am b/src/gallium/targets/dri/Makefile.am
index aaeb950..3967280 100644
--- a/src/gallium/targets/dri/Makefile.am
+++ b/src/gallium/targets/dri/Makefile.am
@@ -55,12 +55,6 @@ gallium_dri_la_LIBADD = \
$(LIBDRM_LIBS) \
$(GALLIUM_COMMON_LIB_DEPS)
-# XXX: Temporary allow duplicated symbols, as the loader pulls in xmlconfig.c
-# which already provides driParse* and driQuery* amongst others.
-# Remove this hack as we come up with a cleaner solution.
-gallium_dri_la_LDFLAGS += \
- -Wl,--allow-multiple-definition
-
EXTRA_gallium_dri_la_DEPENDENCIES = \
dri.sym \
$(top_srcdir)/src/gallium/targets/dri-vdpau.dyn
diff --git a/src/loader/Makefile.am b/src/loader/Makefile.am
index 36ddba8..aef1bd6 100644
--- a/src/loader/Makefile.am
+++ b/src/loader/Makefile.am
@@ -41,15 +41,11 @@ libloader_la_CPPFLAGS += \
-I$(top_builddir)/src/mesa/drivers/dri/common/ \
-I$(top_srcdir)/src/mesa/ \
-I$(top_srcdir)/src/mapi/ \
- -DUSE_DRICONF \
- $(EXPAT_CFLAGS)
+ -DUSE_DRICONF
-libloader_la_SOURCES += \
- $(top_srcdir)/src/mesa/drivers/dri/common/xmlconfig.c
+ libloader_la_LIBADD += \
+ $(top_builddir)/src/mesa/drivers/dri/common/libxmlconfig.la
-libloader_la_LIBADD += \
- -lm \
- $(EXPAT_LIBS)
endif
if !HAVE_LIBDRM
diff --git a/src/mesa/drivers/dri/Makefile.am b/src/mesa/drivers/dri/Makefile.am
index fa1de10..08a8e64 100644
--- a/src/mesa/drivers/dri/Makefile.am
+++ b/src/mesa/drivers/dri/Makefile.am
@@ -60,6 +60,7 @@ mesa_dri_drivers_la_LIBADD = \
../../libmesa.la \
common/libmegadriver_stub.la \
common/libdricommon.la \
+ common/libxmlconfig.la \
$(MEGADRIVERS_DEPS) \
$(DRI_LIB_DEPS) \
$()
diff --git a/src/mesa/drivers/dri/common/Android.mk b/src/mesa/drivers/dri/common/Android.mk
index 03ea564..deaf501 100644
--- a/src/mesa/drivers/dri/common/Android.mk
+++ b/src/mesa/drivers/dri/common/Android.mk
@@ -47,7 +47,9 @@ else
LOCAL_SHARED_LIBRARIES := libdrm
endif
-LOCAL_SRC_FILES := $(DRI_COMMON_FILES)
+LOCAL_SRC_FILES := \
+ $(DRI_COMMON_FILES) \
+ $(XMLCONFIG_FILES)
LOCAL_GENERATED_SOURCES := \
$(intermediates)/xmlpool/options.h
diff --git a/src/mesa/drivers/dri/common/Makefile.am b/src/mesa/drivers/dri/common/Makefile.am
index af6f742..2d6cb9d 100644
--- a/src/mesa/drivers/dri/common/Makefile.am
+++ b/src/mesa/drivers/dri/common/Makefile.am
@@ -31,16 +31,20 @@ AM_CFLAGS = \
-I$(top_srcdir)/src/mapi \
-I$(top_srcdir)/src/mesa/ \
$(DEFINES) \
- $(EXPAT_CFLAGS) \
$(VISIBILITY_CFLAGS)
noinst_LTLIBRARIES = \
libdricommon.la \
+ libxmlconfig.la \
libmegadriver_stub.la \
libdri_test_stubs.la
libdricommon_la_SOURCES = $(DRI_COMMON_FILES)
+libxmlconfig_la_SOURCES = $(XMLCONFIG_FILES)
+libxmlconfig_la_CFLAGS = $(AM_CFLAGS) $(EXPAT_CFLAGS)
+libxmlconfig_la_LIBADD = $(EXPAT_LIBS) -lm
+
libdri_test_stubs_la_SOURCES = $(test_stubs_FILES)
libdri_test_stubs_la_CFLAGS = $(AM_CFLAGS) -DNO_MAIN
diff --git a/src/mesa/drivers/dri/common/Makefile.sources b/src/mesa/drivers/dri/common/Makefile.sources
index d00ec5f..d5d8da8 100644
--- a/src/mesa/drivers/dri/common/Makefile.sources
+++ b/src/mesa/drivers/dri/common/Makefile.sources
@@ -2,7 +2,9 @@ DRI_COMMON_FILES := \
utils.c \
utils.h \
dri_util.c \
- dri_util.h \
+ dri_util.h
+
+XMLCONFIG_FILES := \
xmlconfig.c \
xmlconfig.h
diff --git a/src/mesa/drivers/dri/common/SConscript b/src/mesa/drivers/dri/common/SConscript
index 0bee1b4..b402736 100644
--- a/src/mesa/drivers/dri/common/SConscript
+++ b/src/mesa/drivers/dri/common/SConscript
@@ -37,7 +37,7 @@ drienv.PkgUseModules('DRM')
# else
#env.Append(CPPDEFINES = ['__NOT_HAVE_DRM_H'])
-sources = drienv.ParseSourceList('Makefile.sources', 'DRI_COMMON_FILES')
+sources = drienv.ParseSourceList('Makefile.sources', ['DRI_COMMON_FILES', 'XMLCONFIG_FILES' ])
dri_common = drienv.ConvenienceLibrary(
target = 'dri_common',
diff --git a/src/mesa/drivers/dri/i965/Makefile.am b/src/mesa/drivers/dri/i965/Makefile.am
index a675b95..7e69b6a 100644
--- a/src/mesa/drivers/dri/i965/Makefile.am
+++ b/src/mesa/drivers/dri/i965/Makefile.am
@@ -46,6 +46,7 @@ libi965_dri_la_LIBADD = $(INTEL_LIBS)
TEST_LIBS = \
libi965_dri.la \
../common/libdricommon.la \
+ ../common/libxmlconfig.la \
../common/libmegadriver_stub.la \
../../../libmesa.la \
$(DRI_LIB_DEPS) \
commit bb00457f49177d8d43417855f843887de3148e99
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Sat Jun 6 12:15:30 2015 -0700
i965/fs: Don't let the EOT send message interfere with the MRF hack
Previously, we just put the message for the EOT send as high in the file as
it would go. This is because the register pre-filling hardware will stop
all over the early registers in the file in preparation for the next thread
while you're still sending the last message. However, if something happens
to spill, then the MRF hack interferes with the EOT send message and, if
things aren't scheduled nicely, will stomp on it.
Cc: "10.5 10.6" <mesa-stable at lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90520
Reviewed-by: Neil Roberts <neil at linux.intel.com>
(cherry picked from commit 86e5afbfee5492235cab1a7be4ea49ac02be1644)
Signed-off-by: Emil Velikov <emil.l.velikov at gmail.com>
Conflicts:
src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp
diff --git a/src/mesa/drivers/dri/i965/brw_fs.h b/src/mesa/drivers/dri/i965/brw_fs.h
index bf8bb0b..daf8d66 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.h
+++ b/src/mesa/drivers/dri/i965/brw_fs.h
@@ -435,7 +435,8 @@ public:
void setup_payload_interference(struct ra_graph *g, int payload_reg_count,
int first_payload_node);
void setup_mrf_hack_interference(struct ra_graph *g,
- int first_mrf_hack_node);
+ int first_mrf_hack_node,
+ int *first_used_mrf);
int choose_spill_reg(struct ra_graph *g);
void spill_reg(int spill_reg);
void split_virtual_grfs();
diff --git a/src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp b/src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp
index bcd657b..f9fd405 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp
@@ -498,11 +498,13 @@ fs_visitor::get_used_mrfs(bool *mrf_used)
* messages (treated as MRFs in code generation).
*/
void
-fs_visitor::setup_mrf_hack_interference(struct ra_graph *g, int first_mrf_node)
+fs_visitor::setup_mrf_hack_interference(struct ra_graph *g, int first_mrf_node,
+ int *first_used_mrf)
{
bool mrf_used[BRW_MAX_MRF];
get_used_mrfs(mrf_used);
+ *first_used_mrf = BRW_MAX_MRF;
for (int i = 0; i < BRW_MAX_MRF; i++) {
/* Mark each MRF reg node as being allocated to its physical register.
*
@@ -515,6 +517,9 @@ fs_visitor::setup_mrf_hack_interference(struct ra_graph *g, int first_mrf_node)
* that are used as conflicting with all virtual GRFs.
*/
if (mrf_used[i]) {
+ if (i < *first_used_mrf)
+ *first_used_mrf = i;
+
for (int j = 0; j < this->virtual_grf_count; j++) {
ra_add_node_interference(g, first_mrf_node + i, j);
}
@@ -581,7 +586,8 @@ fs_visitor::assign_regs(bool allow_spilling)
setup_payload_interference(g, payload_node_count, first_payload_node);
if (brw->gen >= 7) {
- setup_mrf_hack_interference(g, first_mrf_hack_node);
+ int first_used_mrf = BRW_MAX_MRF;
+ setup_mrf_hack_interference(g, first_mrf_hack_node, &first_used_mrf);
foreach_block_and_inst(block, fs_inst, inst, cfg) {
/* When we do send-from-GRF for FB writes, we need to ensure that
@@ -597,6 +603,13 @@ fs_visitor::assign_regs(bool allow_spilling)
if (inst->eot) {
int size = virtual_grf_sizes[inst->src[0].reg];
int reg = screen->wm_reg_sets[rsi].class_to_ra_reg_range[size] - 1;
+
+ /* If something happened to spill, we want to push the EOT send
+ * register early enough in the register file that we don't
+ * conflict with any used MRF hack registers.
+ */
+ reg -= BRW_MAX_MRF - first_used_mrf;
+
ra_set_node_reg(g, inst->src[0].reg, reg);
break;
}
commit f6e743ea389b4b2e068bb6d841a3a6c80bb80316
Author: Roland Scheidegger <sroland at vmware.com>
Date: Thu Jun 4 14:35:59 2015 +0200
draw: (trivial) fix NULL pointer dereference
This probably got broken when the samplers were converted to be indexed
by shader type.
Seen when looking at bug 89819 though I'm not sure if that really was what
the bug was about...
Cc: "10.5 10.6" <mesa-stable at lists.freedesktop.org>
Reviewed-by: Brian Paul <brianp at vmware.com>
(cherry picked from commit 6e5970ffee0129fb94d8b7f0ebd4fac3992e7dce)
diff --git a/src/gallium/auxiliary/draw/draw_llvm.c b/src/gallium/auxiliary/draw/draw_llvm.c
index fca76a7..5f0e47f 100644
--- a/src/gallium/auxiliary/draw/draw_llvm.c
+++ b/src/gallium/auxiliary/draw/draw_llvm.c
@@ -1966,7 +1966,7 @@ draw_llvm_set_sampler_state(struct draw_context *draw,
for (i = 0; i < draw->num_samplers[PIPE_SHADER_VERTEX]; i++) {
struct draw_jit_sampler *jit_sam = &draw->llvm->jit_context.samplers[i];
- if (draw->samplers[i]) {
+ if (draw->samplers[PIPE_SHADER_VERTEX][i]) {
const struct pipe_sampler_state *s
= draw->samplers[PIPE_SHADER_VERTEX][i];
jit_sam->min_lod = s->min_lod;
@@ -1979,7 +1979,7 @@ draw_llvm_set_sampler_state(struct draw_context *draw,
for (i = 0; i < draw->num_samplers[PIPE_SHADER_GEOMETRY]; i++) {
struct draw_jit_sampler *jit_sam = &draw->llvm->gs_jit_context.samplers[i];
- if (draw->samplers[i]) {
+ if (draw->samplers[PIPE_SHADER_GEOMETRY][i]) {
const struct pipe_sampler_state *s
= draw->samplers[PIPE_SHADER_GEOMETRY][i];
jit_sam->min_lod = s->min_lod;
commit 1812014fe8e7a6a0f74a73bd065fb76465e85003
Author: Ben Widawsky <benjamin.widawsky at intel.com>
Date: Mon Jun 8 11:18:35 2015 -0700
i965: Disable compaction for EOT send messages
AFAICT, there is no real way to make sure a send message with EOT is properly
ignored from compact, nor can I see a way to actually encode EOT while
compacting. Before the single send optimization we'd always bail because we hit
the is_immediate && !is_compactable_immediate case. However, with single send,
is_immediate is not true, and so we end up trying to compact the un-compactible.
Without this, any compacting single send instruction will hang because the EOT
isn't there. I am not sure how I didn't hit this when I originally enabled the
optimization. I didn't check if some surrounding code changed.
I know Neil and Matt were both looking into this. I did a quick search and
didn't see any patches out there to handle this. Please ignore if this has
already been sent by someone. (Direct me to it and I will review it).
Reported-by: Neil Roberts <neil at linux.intel.com>
Reported-by: Mark Janes <mark.a.janes at intel.com>
Tested-by: Mark Janes <mark.a.janes at intel.com>
Signed-off-by: Ben Widawsky <ben at bwidawsk.net>
Reviewed-by: Matt Turner <mattst88 at gmail.com>
(cherry picked from commit b307921c3ff3b36607752f881a180272366a79cf)
diff --git a/src/mesa/drivers/dri/i965/brw_eu_compact.c b/src/mesa/drivers/dri/i965/brw_eu_compact.c
index 26c41ea..2c39e6c 100644
--- a/src/mesa/drivers/dri/i965/brw_eu_compact.c
+++ b/src/mesa/drivers/dri/i965/brw_eu_compact.c
@@ -845,6 +845,12 @@ set_3src_source_index(struct brw_context *brw, brw_compact_inst *dst, brw_inst *
static bool
has_unmapped_bits(struct brw_context *brw, brw_inst *src)
{
+ /* EOT can only be mapped on a send if the src1 is an immediate */
+ if ((brw_inst_opcode(brw, src) == BRW_OPCODE_SENDC ||
+ brw_inst_opcode(brw, src) == BRW_OPCODE_SEND) &&
+ brw_inst_eot(brw, src))
+ return true;
+
/* Check for instruction bits that don't map to any of the fields of the
* compacted instruction. The instruction cannot be compacted if any of
* them are set. They overlap with:
commit 631414a507a8a53cd82d6b50052fd2b631b9e0d3
Author: Francisco Jerez <currojerez at riseup.net>
Date: Mon Jun 8 11:18:34 2015 -0700
i965: Don't compact instructions with unmapped bits.
Some instruction bits don't have a mapping defined to any compacted
instruction field. If they're ever set and we end up compacting the
instruction they will be forced to zero. Avoid using compaction in such
cases.
v2: Align multiple lines of an expression to the same column. Change
conditional compaction of 3-source instructions to an
assertion. (Matt)
v3: The 3-source instruction bit 105 is part of SourceIndex on CHV.
Add assertion that reserved bit 7 is not set. (Matt)
Document overlap with UIP and 64-bit immediate fields.
v4: Make some more unmapped bit checks assertions. (Matt)
Reviewed-by: Matt Turner <mattst88 at gmail.com>
(cherry picked from commit 35a77a148f8b7ef03fe3b31d63719e0bfdf4b783)
diff --git a/src/mesa/drivers/dri/i965/brw_eu_compact.c b/src/mesa/drivers/dri/i965/brw_eu_compact.c
index 8e33bcb..26c41ea 100644
--- a/src/mesa/drivers/dri/i965/brw_eu_compact.c
+++ b/src/mesa/drivers/dri/i965/brw_eu_compact.c
@@ -843,11 +843,61 @@ set_3src_source_index(struct brw_context *brw, brw_compact_inst *dst, brw_inst *
}
static bool
+has_unmapped_bits(struct brw_context *brw, brw_inst *src)
+{
+ /* Check for instruction bits that don't map to any of the fields of the
+ * compacted instruction. The instruction cannot be compacted if any of
+ * them are set. They overlap with:
+ * - NibCtrl (bit 47 on Gen7, bit 11 on Gen8)
+ * - Dst.AddrImm[9] (bit 47 on Gen8)
+ * - Src0.AddrImm[9] (bit 95 on Gen8)
+ * - Imm64[27:31] (bits 91-95 on Gen7, bit 95 on Gen8)
+ * - UIP[31] (bit 95 on Gen8)
+ */
+ if (brw->gen >= 8) {
+ assert(!brw_inst_bits(src, 7, 7));
+ return brw_inst_bits(src, 95, 95) ||
+ brw_inst_bits(src, 47, 47) ||
+ brw_inst_bits(src, 11, 11);
+ } else {
+ assert(!brw_inst_bits(src, 7, 7) &&
+ !(brw->gen < 7 && brw_inst_bits(src, 90, 90)));
+ return brw_inst_bits(src, 95, 91) ||
+ brw_inst_bits(src, 47, 47);
+ }
+}
+
+static bool
+has_3src_unmapped_bits(struct brw_context *brw, brw_inst *src)
+{
+ /* Check for three-source instruction bits that don't map to any of the
+ * fields of the compacted instruction. All of them seem to be reserved
+ * bits currently.
+ */
+ if (brw->gen >= 9 || brw->is_cherryview) {
+ assert(!brw_inst_bits(src, 127, 127) &&
+ !brw_inst_bits(src, 7, 7));
+ } else {
+ assert(brw->gen >= 8);
+ assert(!brw_inst_bits(src, 127, 126) &&
+ !brw_inst_bits(src, 105, 105) &&
+ !brw_inst_bits(src, 84, 84) &&
+ !brw_inst_bits(src, 36, 35) &&
+ !brw_inst_bits(src, 7, 7));
+ }
+
+ return false;
+}
+
+static bool
brw_try_compact_3src_instruction(struct brw_context *brw, brw_compact_inst *dst,
brw_inst *src)
{
assert(brw->gen >= 8);
+ if (has_3src_unmapped_bits(brw, src))
+ return false;
+
#define compact(field) \
brw_compact_inst_set_3src_##field(dst, brw_inst_3src_##field(brw, src))
@@ -937,6 +987,9 @@ brw_try_compact_instruction(struct brw_context *brw, brw_compact_inst *dst,
return false;
}
+ if (has_unmapped_bits(brw, src))
+ return false;
+
memset(&temp, 0, sizeof(temp));
brw_compact_inst_set_opcode(&temp, brw_inst_opcode(brw, src));
commit 4a2d7fbde47c5043dacb75079813a06dc221eaa3
Author: Marek Olšák <marek.olsak at amd.com>
Date: Tue May 12 00:44:20 2015 +0200
egl: fix setting context flags
Cc: 10.6 10.5 10.4 <mesa-stable at lists.freedesktop.org>
Reviewed-by: Emil Velikov <emil.l.velikov at gmail.com>
Reviewed-by: Chad Versace <chad.versace at intel.com>
(cherry picked from commit f9f894447e4e7442d5dfa489bb43f2823e2fc71d)
diff --git a/src/egl/main/eglcontext.c b/src/egl/main/eglcontext.c
index 514b91a..e50b8fb 100644
--- a/src/egl/main/eglcontext.c
+++ b/src/egl/main/eglcontext.c
@@ -131,7 +131,7 @@ _eglParseContextAttribList(_EGLContext *ctx, _EGLDisplay *dpy,
break;
}
- ctx->Flags = val;
+ ctx->Flags |= val;
break;
case EGL_CONTEXT_OPENGL_PROFILE_MASK_KHR:
@@ -194,7 +194,8 @@ _eglParseContextAttribList(_EGLContext *ctx, _EGLDisplay *dpy,
break;
}
- ctx->Flags = EGL_CONTEXT_OPENGL_ROBUST_ACCESS_BIT_KHR;
+ if (val == EGL_TRUE)
+ ctx->Flags |= EGL_CONTEXT_OPENGL_ROBUST_ACCESS_BIT_KHR;
break;
default:
commit eb3a704bb0008c1d046abae31dcb0b2b980c66b1
Author: Emil Velikov <emil.l.velikov at gmail.com>
Date: Sun Jun 7 11:45:25 2015 +0100
docs: Add sha256sums for the 10.5.7 release
Signed-off-by: Emil Velikov <emil.l.velikov at gmail.com>
diff --git a/docs/relnotes/10.5.7.html b/docs/relnotes/10.5.7.html
index 49440c4..68c8385 100644
--- a/docs/relnotes/10.5.7.html
+++ b/docs/relnotes/10.5.7.html
@@ -31,7 +31,8 @@ because compatibility contexts are not supported.
<h2>SHA256 checksums</h2>
<pre>
-TBD
+8f865ce497435fdf25d4e35f3b5551b2bcd5f9bc6570561183be82af20d18b82 mesa-10.5.7.tar.gz
+04d06890cd69af8089d6ca76f40e46dcf9cacfe4a9788b32be620574d4638818 mesa-10.5.7.tar.xz
</pre>
commit 495bcbc48cf4e7cee0f2de11c1166a1fd6eb3969
Author: Emil Velikov <emil.l.velikov at gmail.com>
Date: Sun Jun 7 11:13:19 2015 +0100
Add release notes for the 10.5.7 release
Signed-off-by: Emil Velikov <emil.l.velikov at gmail.com>
diff --git a/docs/relnotes/10.5.7.html b/docs/relnotes/10.5.7.html
new file mode 100644
index 0000000..49440c4
--- /dev/null
+++ b/docs/relnotes/10.5.7.html
@@ -0,0 +1,102 @@
+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
+<html lang="en">
+<head>
+ <meta http-equiv="content-type" content="text/html; charset=utf-8">
+ <title>Mesa Release Notes</title>
+ <link rel="stylesheet" type="text/css" href="../mesa.css">
+</head>
+<body>
+
+<div class="header">
+ <h1>The Mesa 3D Graphics Library</h1>
+</div>
+
+<iframe src="../contents.html"></iframe>
+<div class="content">
+
+<h1>Mesa 10.5.7 Release Notes / June 07, 2015</h1>
+
+<p>
+Mesa 10.5.7 is a bug fix release which fixes bugs found since the 10.5.6 release.
+</p>
+<p>
+Mesa 10.5.7 implements the OpenGL 3.3 API, but the version reported by
+glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
+glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
+Some drivers don't support all the features required in OpenGL 3.3. OpenGL
+3.3 is <strong>only</strong> available if requested at context creation
+because compatibility contexts are not supported.
+</p>
+
+
+<h2>SHA256 checksums</h2>
+<pre>
+TBD
+</pre>
+
+
+<h2>New features</h2>
+<p>None</p>
+
+<h2>Bug fixes</h2>
+
+<p>This list is likely incomplete.</p>
+
+<ul>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89131">Bug 89131</a> - [Bisected] Graphical corruption in Weston, shows old framebuffer pieces</li>
+
+</ul>
+
+
+<h2>Changes</h2>
+
+<p>Ben Widawsky (1):</p>
+<ul>
+ <li>i965: Emit 3DSTATE_MULTISAMPLE before WM_HZ_OP (gen8+)</li>
+</ul>
+
+<p>Emil Velikov (4):</p>
+<ul>
+ <li>docs: Add sha256sums for the 10.5.6 release</li>
+ <li>get-pick-list.sh: Require explicit "10.5" for nominating stable patches</li>
+ <li>cherry-ignore: add clover build fix not applicable for 10.5</li>
+ <li>Update version to 10.5.7</li>
+</ul>
+
+<p>Ilia Mirkin (18):</p>
+<ul>
+ <li>nvc0/ir: set ftz when sources are floats, not just destinations</li>
+ <li>nv50/ir: guess that the constant offset is the starting slot of array</li>
+ <li>nvc0/ir: LOAD's can't be used for shader inputs</li>
+ <li>nvc0: a geometry shader can have up to 1024 vertices output</li>
+ <li>nv50/ir: avoid messing up arg1 of PFETCH</li>
+ <li>nv30: don't leak fragprog consts</li>
+ <li>nv30: avoid leaking render state and draw shaders</li>
+ <li>nv30: fix clip plane uploads and enable changes</li>
+ <li>nv30/draw: avoid leaving stale pointers in draw state</li>
+ <li>nv30/draw: draw expects constbuf size in bytes, not vec4 units</li>
+ <li>st/mesa: don't leak glsl_to_tgsi object on link failure</li>
+ <li>glsl: avoid leaking linked gl_shader when there's a late linker error</li>
+ <li>nv30/draw: fix indexed draws with swtnl path and a resource index buffer</li>
+ <li>nv30/draw: only use the DMA1 object (GART) if the bo is not in VRAM</li>
+ <li>nv30/draw: allocate vertex buffers in gart</li>
+ <li>nv30/draw: switch varying hookup logic to know about texcoords</li>
+ <li>nv30: falling back to draw path for edgeflag does no good</li>
+ <li>nv30: avoid doing extra work on clear and hitting unexpected states</li>
+</ul>
+
+<p>Jason Ekstrand (1):</p>
+<ul>
+ <li>i965/fs: Fix implied_mrf_writes for scratch writes</li>
+</ul>
+
+<p>Marek Olšák (1):</p>
+<ul>
+ <li>st/dri: fix postprocessing crash when there's no depth buffer</li>
+</ul>
+
+
+</div>
+</body>
+</html>
commit 95b81ee9e86babeb5f19e4785ea1a2075a1a403b
Author: Emil Velikov <emil.l.velikov at gmail.com>
Date: Sun Jun 7 11:11:38 2015 +0100
Update version to 10.5.7
Signed-off-by: Emil Velikov <emil.l.velikov at gmail.com>
diff --git a/VERSION b/VERSION
index 3b24057..e9d57a4 100644
--- a/VERSION
+++ b/VERSION
@@ -1 +1 @@
-10.5.6
+10.5.7
commit 07aa6d78bbc9639dd7bbc86bbb375aae1103ddfd
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date: Thu Mar 5 12:10:15 2015 -0500
nv30: avoid doing extra work on clear and hitting unexpected states
Clearing can happen at a time when various state objects are incoherent
and not ready for a draw. Some of the validation functions don't handle
this well, so only flush the framebuffer state. This has the advantage
of also not doing extra work.
This works around some crashes that can happen when clearing.
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
Reviewed-by: Tobias Klausmann <tobias.johannes.klausmann at mni.thm.de>
(cherry picked from commit aba3392541f38f82e3ebde251fdcca78e90adbf3)
diff --git a/src/gallium/drivers/nouveau/nv30/nv30_clear.c b/src/gallium/drivers/nouveau/nv30/nv30_clear.c
index 1ab8929..83fd1fa 100644
--- a/src/gallium/drivers/nouveau/nv30/nv30_clear.c
+++ b/src/gallium/drivers/nouveau/nv30/nv30_clear.c
@@ -58,7 +58,7 @@ nv30_clear(struct pipe_context *pipe, unsigned buffers,
struct pipe_framebuffer_state *fb = &nv30->framebuffer;
uint32_t colr = 0, zeta = 0, mode = 0;
- if (!nv30_state_validate(nv30, TRUE))
+ if (!nv30_state_validate(nv30, NV30_NEW_FRAMEBUFFER | NV30_NEW_SCISSOR, TRUE))
return;
if (buffers & PIPE_CLEAR_COLOR && fb->nr_cbufs) {
diff --git a/src/gallium/drivers/nouveau/nv30/nv30_context.h b/src/gallium/drivers/nouveau/nv30/nv30_context.h
index 7b32aae..592cdbe 100644
--- a/src/gallium/drivers/nouveau/nv30/nv30_context.h
+++ b/src/gallium/drivers/nouveau/nv30/nv30_context.h
@@ -204,7 +204,7 @@ void
nv30_render_vbo(struct pipe_context *pipe, const struct pipe_draw_info *info);
boolean
-nv30_state_validate(struct nv30_context *nv30, boolean hwtnl);
+nv30_state_validate(struct nv30_context *nv30, uint32_t mask, boolean hwtnl);
void
nv30_state_release(struct nv30_context *nv30);
diff --git a/src/gallium/drivers/nouveau/nv30/nv30_draw.c b/src/gallium/drivers/nouveau/nv30/nv30_draw.c
index 4ef94c7..c1665b7 100644
--- a/src/gallium/drivers/nouveau/nv30/nv30_draw.c
+++ b/src/gallium/drivers/nouveau/nv30/nv30_draw.c
@@ -134,7 +134,7 @@ nv30_render_draw_elements(struct vbuf_render *render,
NOUVEAU_BO_LOW | NOUVEAU_BO_RD, 0, NV30_3D_VTXBUF_DMA1);
}
- if (!nv30_state_validate(nv30, FALSE))
+ if (!nv30_state_validate(nv30, ~0, FALSE))
return;
BEGIN_NV04(push, NV30_3D(VERTEX_BEGIN_END), 1);
@@ -179,7 +179,7 @@ nv30_render_draw_arrays(struct vbuf_render *render, unsigned start, uint nr)
NOUVEAU_BO_LOW | NOUVEAU_BO_RD, 0, NV30_3D_VTXBUF_DMA1);
}
- if (!nv30_state_validate(nv30, FALSE))
+ if (!nv30_state_validate(nv30, ~0, FALSE))
return;
BEGIN_NV04(push, NV30_3D(VERTEX_BEGIN_END), 1);
diff --git a/src/gallium/drivers/nouveau/nv30/nv30_state_validate.c b/src/gallium/drivers/nouveau/nv30/nv30_state_validate.c
index 704c24b..a954dcc 100644
--- a/src/gallium/drivers/nouveau/nv30/nv30_state_validate.c
+++ b/src/gallium/drivers/nouveau/nv30/nv30_state_validate.c
@@ -454,7 +454,7 @@ nv30_state_context_switch(struct nv30_context *nv30)
}
boolean
-nv30_state_validate(struct nv30_context *nv30, boolean hwtnl)
+nv30_state_validate(struct nv30_context *nv30, uint32_t mask, boolean hwtnl)
{
struct nouveau_screen *screen = &nv30->screen->base;
struct nouveau_pushbuf *push = nv30->base.pushbuf;
@@ -479,14 +479,16 @@ nv30_state_validate(struct nv30_context *nv30, boolean hwtnl)
else
validate = swtnl_validate_list;
- if (nv30->dirty) {
+ mask &= nv30->dirty;
+
+ if (mask) {
while (validate->func) {
- if (nv30->dirty & validate->mask)
+ if (mask & validate->mask)
validate->func(nv30);
validate++;
}
- nv30->dirty = 0;
+ nv30->dirty &= ~mask;
}
nouveau_pushbuf_bufctx(push, bctx);
diff --git a/src/gallium/drivers/nouveau/nv30/nv30_vbo.c b/src/gallium/drivers/nouveau/nv30/nv30_vbo.c
index 67ab829..d4e384b 100644
--- a/src/gallium/drivers/nouveau/nv30/nv30_vbo.c
+++ b/src/gallium/drivers/nouveau/nv30/nv30_vbo.c
@@ -564,7 +564,7 @@ nv30_draw_vbo(struct pipe_context *pipe, const struct pipe_draw_info *info)
if (nv30->vbo_user && !(nv30->dirty & (NV30_NEW_VERTEX | NV30_NEW_ARRAYS)))
nv30_update_user_vbufs(nv30);
- nv30_state_validate(nv30, TRUE);
+ nv30_state_validate(nv30, ~0, TRUE);
if (nv30->draw_flags) {
nv30_render_vbo(pipe, info);
return;
commit 70816a66d5431db37cb6207efe6439b895746d16
Author: Marek Olšák <marek.olsak at amd.com>
Date: Tue May 26 19:32:36 2015 +0200
st/dri: fix postprocessing crash when there's no depth buffer
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89131
Cc: 10.6 10.5 <mesa-stable at lists.freedesktop.org>
Reviewed-by: Brian Paul <brianp at vmware.com>
(cherry picked from commit 25e9ae2b79f32631e7255807a242e5fc4e39984c)
diff --git a/src/gallium/state_trackers/dri/dri_context.c b/src/gallium/state_trackers/dri/dri_context.c
index 8ac81b7..400114e 100644
--- a/src/gallium/state_trackers/dri/dri_context.c
+++ b/src/gallium/state_trackers/dri/dri_context.c
@@ -233,11 +233,10 @@ dri_make_current(__DRIcontext * cPriv,
ctx->stapi->make_current(ctx->stapi, ctx->st, &draw->base, &read->base);
- // This is ok to call here. If they are already init, it's a no-op.
- if (draw->textures[ST_ATTACHMENT_BACK_LEFT] && draw->textures[ST_ATTACHMENT_DEPTH_STENCIL]
- && ctx->pp)
- pp_init_fbos(ctx->pp, draw->textures[ST_ATTACHMENT_BACK_LEFT]->width0,
- draw->textures[ST_ATTACHMENT_BACK_LEFT]->height0);
+ /* This is ok to call here. If they are already init, it's a no-op. */
+ if (ctx->pp && draw->textures[ST_ATTACHMENT_BACK_LEFT])
+ pp_init_fbos(ctx->pp, draw->textures[ST_ATTACHMENT_BACK_LEFT]->width0,
+ draw->textures[ST_ATTACHMENT_BACK_LEFT]->height0);
return GL_TRUE;
}
commit f8bb4a814d9aac2825737e48fefc16785cb9060c
Author: Ben Widawsky <benjamin.widawsky at intel.com>
Date: Wed May 20 19:20:14 2015 -0700
i965: Emit 3DSTATE_MULTISAMPLE before WM_HZ_OP (gen8+)
Starting with GEN8, there is documentation that the multisample state command
must be emitted before the 3DSTATE_WM_HZ_OP command any time the multisample
count changes. The 3DSTATE_WM_HZ_OP packet gets emitted as a result of a
intel_hix_exec(), which is called upon a fast clear and/or a resolve. This can
happen before the state atoms are checked, and so the multisample state must be
put directly in the function.
v1:
- In v0, I was always emitting the command, but Ken came up with the condition to
determine whether or not the sample count actually changed.
- Ken's recommendation was to set brw->num_multisamples after emitting
3DSTATE_MULTISAMPLE. This doesn't work. I put my best guess as to why in the XXX
(it was causing 7 regressions on BDW).
v2:
Flag NEW_MULTISAMPLE state. As Ken found, in state upload we check for the
multisample change to determine whether or not to emit certain packets. Since
the hiz code doesn't actually care about the number of multisamples, set the
flag and let the later code take care of it.
Jenkins results:
http://otc-mesa-ci.jf.intel.com/view/dev/job/bwidawsk/136/
Fixes around 200 piglit tests on SKL. I'm somewhat surprised that it seems to
have no impact on BDW as the restriction is needed there as well.
Cc: "10.5 10.6" <mesa-stable at lists.freedesktop.org>
Signed-off-by: Ben Widawsky <ben at bwidawsk.net>
Reviewed-by: Neil Roberts <neil at linux.intel.com> (v0)
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org> (v2)
(cherry picked from commit e2d84d99f5a66738e8f584bdfea66182f36fe46c)
diff --git a/src/mesa/drivers/dri/i965/gen8_depth_state.c b/src/mesa/drivers/dri/i965/gen8_depth_state.c
index b4eb6e1..cc00610 100644
--- a/src/mesa/drivers/dri/i965/gen8_depth_state.c
+++ b/src/mesa/drivers/dri/i965/gen8_depth_state.c
@@ -412,6 +412,16 @@ gen8_hiz_exec(struct brw_context *brw, struct intel_mipmap_tree *mt,
uint32_t surface_width = ALIGN(mt->logical_width0, level == 0 ? 8 : 1);
uint32_t surface_height = ALIGN(mt->logical_height0, level == 0 ? 4 : 1);
+ /* From the documentation for 3DSTATE_WM_HZ_OP: "3DSTATE_MULTISAMPLE packet
+ * must be used prior to this packet to change the Number of Multisamples.
+ * This packet must not be used to change Number of Multisamples in a
+ * rendering sequence."
+ */
+ if (brw->num_samples != mt->num_samples) {
+ gen8_emit_3dstate_multisample(brw, mt->num_samples);
+ brw->NewGLState |= _NEW_MULTISAMPLE;
+ }
+
/* The basic algorithm is:
* - If needed, emit 3DSTATE_{DEPTH,HIER_DEPTH,STENCIL}_BUFFER and
* 3DSTATE_CLEAR_PARAMS packets to set up the relevant buffers.
commit 8c56fc92750a4a6c390354c0b1428cdc9edac5b5
Author: Emil Velikov <emil.l.velikov at gmail.com>
Date: Wed Jun 3 12:03:35 2015 +0100
cherry-ignore: add clover build fix not applicable for 10.5
The 10.5 codebase uses a compat/wrapper implementation for the string
class. As such it already explicitly includes the string header.
Signed-off-by: Emil Velikov <emil.l.velikov at gmail.com>
diff --git a/bin/.cherry-ignore b/bin/.cherry-ignore
index ec06241..9a828ae 100644
--- a/bin/.cherry-ignore
+++ b/bin/.cherry-ignore
@@ -24,3 +24,6 @@ fe5fddd7e2df74233a2a02ae021418485f39d11c
# The optimisations mentioned are not available in 10.5
627c68308683abbd6e563a09af6013a33938a790 i965/fs: in MAD optimizations, switch last argument to be immediate
+
+# 10.5 has the compat string implementation, which includes the <string>
+967825d053f71c5f5fc3ba31eabc0c6004fde4f1 clover: Build fix for FreeBSD.
commit 6338bd6f7000e9fc60161b27f4f66be857d22351
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date: Mon May 25 17:46:45 2015 -0400
nv30: falling back to draw path for edgeflag does no good
The problem is that the EDGEFLAG has to be toggled at vertex submission
time. This can be done from either the draw or the regular paths. Avoid
falling back to draw just because there's an edgeflag.
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
Cc: "10.5 10.6" <mesa-stable at lists.freedesktop.org>
(cherry picked from commit 3ec18152858fd9aadb398d78d5ad2d2b938507c1)
diff --git a/src/gallium/drivers/nouveau/nv30/nvfx_vertprog.c b/src/gallium/drivers/nouveau/nv30/nvfx_vertprog.c
index 51e1fb6..a2ae4a8 100644
--- a/src/gallium/drivers/nouveau/nv30/nvfx_vertprog.c
+++ b/src/gallium/drivers/nouveau/nv30/nvfx_vertprog.c
@@ -873,9 +873,8 @@ nvfx_vertprog_parse_decl_output(struct nvfx_vpc *vpc,
}
break;
case TGSI_SEMANTIC_EDGEFLAG:
- /* not really an error just a fallback */
- NOUVEAU_ERR("cannot handle edgeflag output\n");
- return FALSE;
+ vpc->r_result[idx] = nvfx_reg(NVFXSR_NONE, 0);
+ return TRUE;
default:
NOUVEAU_ERR("bad output semantic\n");
return FALSE;
commit 7087a507bfccf8e96889eb8f86a48268b7525d20
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date: Sat May 23 22:11:38 2015 -0400
nv30/draw: switch varying hookup logic to know about texcoords
Commit 8acaf862dfe switched things over to use TEXCOORD instead of
GENERIC, but did not update the nv30 swtnl draw paths. This teaches the
draw logic about TEXCOORD.
Among other things, this fixes a crash in demos/arbocclude when using
swtnl. Curiously enough, the point-sprite piglit works without this.
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
Cc: "10.5 10.6" <mesa-stable at lists.freedesktop.org>
(cherry picked from commit 25be70462dbb7ee994e69ffccc3de94e4114e667)
diff --git a/src/gallium/drivers/nouveau/nv30/nv30_draw.c b/src/gallium/drivers/nouveau/nv30/nv30_draw.c
index f6a66dd..4ef94c7 100644
--- a/src/gallium/drivers/nouveau/nv30/nv30_draw.c
+++ b/src/gallium/drivers/nouveau/nv30/nv30_draw.c
@@ -218,22 +218,24 @@ static const struct {
[TGSI_SEMANTIC_BCOLOR ] = { EMIT_4F, INTERP_LINEAR , 1, 3, 0x00000004 },
[TGSI_SEMANTIC_FOG ] = { EMIT_4F, INTERP_PERSPECTIVE, 5, 5, 0x00000010 },
[TGSI_SEMANTIC_PSIZE ] = { EMIT_1F_PSIZE, INTERP_POS , 6, 6, 0x00000020 },
- [TGSI_SEMANTIC_GENERIC ] = { EMIT_4F, INTERP_PERSPECTIVE, 8, 7, 0x00004000 }
+ [TGSI_SEMANTIC_TEXCOORD] = { EMIT_4F, INTERP_PERSPECTIVE, 8, 7, 0x00004000 },
};
static boolean
vroute_add(struct nv30_render *r, uint attrib, uint sem, uint *idx)
{
- struct pipe_screen *pscreen = &r->nv30->screen->base.base;
+ struct nv30_screen *screen = r->nv30->screen;
struct nv30_fragprog *fp = r->nv30->fragprog.program;
struct vertex_info *vinfo = &r->vertex_info;
enum pipe_format format;
uint emit = EMIT_OMIT;
uint result = *idx;
- if (sem == TGSI_SEMANTIC_GENERIC && result >= 8) {
- for (result = 0; result < 8; result++) {
- if (fp->texcoord[result] == *idx) {
+ if (sem == TGSI_SEMANTIC_GENERIC) {
+ uint num_texcoords = (screen->eng3d->oclass < NV40_3D_CLASS) ? 8 : 10;
+ for (result = 0; result < num_texcoords; result++) {
+ if (fp->texcoord[result] == *idx + 8) {
+ sem = TGSI_SEMANTIC_TEXCOORD;
emit = vroute[sem].emit;
break;
}
@@ -248,11 +250,11 @@ vroute_add(struct nv30_render *r, uint attrib, uint sem, uint *idx)
draw_emit_vertex_attr(vinfo, emit, vroute[sem].interp, attrib);
format = draw_translate_vinfo_format(emit);
- r->vtxfmt[attrib] = nv30_vtxfmt(pscreen, format)->hw;
+ r->vtxfmt[attrib] = nv30_vtxfmt(&screen->base.base, format)->hw;
r->vtxptr[attrib] = vinfo->size;
vinfo->size += draw_translate_vinfo_size(emit);
- if (nv30_screen(pscreen)->eng3d->oclass < NV40_3D_CLASS) {
+ if (screen->eng3d->oclass < NV40_3D_CLASS) {
r->vtxprog[attrib][0] = 0x001f38d8;
r->vtxprog[attrib][1] = 0x0080001b | (attrib << 9);
r->vtxprog[attrib][2] = 0x0836106c;
@@ -264,7 +266,12 @@ vroute_add(struct nv30_render *r, uint attrib, uint sem, uint *idx)
r->vtxprog[attrib][3] = 0x6041ff80 | (result + vroute[sem].vp40) << 2;
}
- *idx = vroute[sem].ow40 << result;
+ if (result < 8)
+ *idx = vroute[sem].ow40 << result;
+ else {
+ assert(sem == TGSI_SEMANTIC_TEXCOORD);
+ *idx = 0x00001000 << (result - 8);
+ }
return TRUE;
}
@@ -318,7 +325,7 @@ nv30_render_validate(struct nv30_context *nv30)
while (pntc && attrib < 16) {
uint index = ffs(pntc) - 1; pntc &= ~(1 << index);
- if (vroute_add(r, attrib, TGSI_SEMANTIC_GENERIC, &index)) {
+ if (vroute_add(r, attrib, TGSI_SEMANTIC_TEXCOORD, &index)) {
vp_attribs |= (1 << attrib++);
vp_results |= index;
}
commit 93650a80e9d9cee000c88a6e96be83c1e5788fc6
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date: Mon May 25 21:14:13 2015 -0400
nv30/draw: allocate vertex buffers in gart
These are only used once per draw, so it makes sense to keep them in
GART. Also take this opportunity to modernize the buffer mapping API
usage.
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
Reviewed-by: Ben Skeggs <bskeggs at redhat.com>
Cc: "10.5 10.6" <mesa-stable at lists.freedesktop.org>
(cherry picked from commit c3d36a2e1a87a4aded662db7a5d320ee7ac3a8b5)
diff --git a/src/gallium/drivers/nouveau/nv30/nv30_draw.c b/src/gallium/drivers/nouveau/nv30/nv30_draw.c
index 4fcc434..f6a66dd 100644
--- a/src/gallium/drivers/nouveau/nv30/nv30_draw.c
+++ b/src/gallium/drivers/nouveau/nv30/nv30_draw.c
@@ -71,12 +71,12 @@ nv30_render_allocate_vertices(struct vbuf_render *render,
struct nv30_render *r = nv30_render(render);
struct nv30_context *nv30 = r->nv30;
- r->length = vertex_size * nr_vertices;
+ r->length = (uint32_t)vertex_size * (uint32_t)nr_vertices;
if (r->offset + r->length >= render->max_vertex_buffer_bytes) {
pipe_resource_reference(&r->buffer, NULL);
r->buffer = pipe_buffer_create(&nv30->screen->base.base,
- PIPE_BIND_VERTEX_BUFFER, 0,
+ PIPE_BIND_VERTEX_BUFFER, PIPE_USAGE_STREAM,
render->max_vertex_buffer_bytes);
if (!r->buffer)
return FALSE;
@@ -91,10 +91,14 @@ static void *
nv30_render_map_vertices(struct vbuf_render *render)
{
struct nv30_render *r = nv30_render(render);
- char *map = pipe_buffer_map(&r->nv30->base.pipe, r->buffer,
- PIPE_TRANSFER_WRITE |
- PIPE_TRANSFER_UNSYNCHRONIZED, &r->transfer);
- return map + r->offset;
+ char *map = pipe_buffer_map_range(
+ &r->nv30->base.pipe, r->buffer,
+ r->offset, r->length,
+ PIPE_TRANSFER_WRITE |
+ PIPE_TRANSFER_DISCARD_RANGE,
+ &r->transfer);
+ assert(map);
+ return map;
}
static void
commit 23c0c94ac36945c08ec21db8fa2b4e36d137320f
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date: Mon May 25 21:12:46 2015 -0400
nv30/draw: only use the DMA1 object (GART) if the bo is not in VRAM
Instead of always having it in the data, let the bo placement decide it.
This fixes glxgears with swtnl forced on.
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
Reviewed-by: Ben Skeggs <bskeggs at redhat.com>
Cc: "10.5 10.6" <mesa-stable at lists.freedesktop.org>
(cherry picked from commit fdad7dfbdae07b9273fc8f57e63258dbe542c9b5)
diff --git a/src/gallium/drivers/nouveau/nv30/nv30_draw.c b/src/gallium/drivers/nouveau/nv30/nv30_draw.c
index de8cde2..4fcc434 100644
--- a/src/gallium/drivers/nouveau/nv30/nv30_draw.c
+++ b/src/gallium/drivers/nouveau/nv30/nv30_draw.c
@@ -127,7 +127,7 @@ nv30_render_draw_elements(struct vbuf_render *render,
for (i = 0; i < r->vertex_info.num_attribs; i++) {
PUSH_RESRC(push, NV30_3D(VTXBUF(i)), BUFCTX_VTXTMP,
nv04_resource(r->buffer), r->offset + r->vtxptr[i],
- NOUVEAU_BO_LOW | NOUVEAU_BO_RD, 0, 0);
+ NOUVEAU_BO_LOW | NOUVEAU_BO_RD, 0, NV30_3D_VTXBUF_DMA1);
}
if (!nv30_state_validate(nv30, FALSE))
@@ -172,7 +172,7 @@ nv30_render_draw_arrays(struct vbuf_render *render, unsigned start, uint nr)
for (i = 0; i < r->vertex_info.num_attribs; i++) {
PUSH_RESRC(push, NV30_3D(VTXBUF(i)), BUFCTX_VTXTMP,
nv04_resource(r->buffer), r->offset + r->vtxptr[i],
- NOUVEAU_BO_LOW | NOUVEAU_BO_RD, 0, 0);
+ NOUVEAU_BO_LOW | NOUVEAU_BO_RD, 0, NV30_3D_VTXBUF_DMA1);
}
if (!nv30_state_validate(nv30, FALSE))
@@ -245,7 +245,7 @@ vroute_add(struct nv30_render *r, uint attrib, uint sem, uint *idx)
format = draw_translate_vinfo_format(emit);
r->vtxfmt[attrib] = nv30_vtxfmt(pscreen, format)->hw;
- r->vtxptr[attrib] = vinfo->size | NV30_3D_VTXBUF_DMA1;
+ r->vtxptr[attrib] = vinfo->size;
vinfo->size += draw_translate_vinfo_size(emit);
if (nv30_screen(pscreen)->eng3d->oclass < NV40_3D_CLASS) {
commit efaf906415f1cc9cf123cd89dd346c35d327d26b
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date: Mon May 25 20:15:09 2015 -0400
nv30/draw: fix indexed draws with swtnl path and a resource index buffer
The map = assignment was missing.
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
Cc: "10.5 10.6" <mesa-stable at lists.freedesktop.org>
(cherry picked from commit 3600439897c79d37c3c654546867ddfa0c420743)
diff --git a/src/gallium/drivers/nouveau/nv30/nv30_draw.c b/src/gallium/drivers/nouveau/nv30/nv30_draw.c
index 783ffe8..de8cde2 100644
--- a/src/gallium/drivers/nouveau/nv30/nv30_draw.c
+++ b/src/gallium/drivers/nouveau/nv30/nv30_draw.c
@@ -419,9 +419,9 @@ nv30_render_vbo(struct pipe_context *pipe, const struct pipe_draw_info *info)
if (info->indexed) {
const void *map = nv30->idxbuf.user_buffer;
if (!map)
- pipe_buffer_map(pipe, nv30->idxbuf.buffer,
- PIPE_TRANSFER_UNSYNCHRONIZED |
- PIPE_TRANSFER_READ, &transferi);
+ map = pipe_buffer_map(pipe, nv30->idxbuf.buffer,
+ PIPE_TRANSFER_UNSYNCHRONIZED |
+ PIPE_TRANSFER_READ, &transferi);
draw_set_indexes(draw,
(ubyte *) map + nv30->idxbuf.offset,
nv30->idxbuf.index_size, ~0);
commit adee8f1ca5ba636b6ab996b2a05b9516a74e04a5
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date: Sun May 17 17:56:44 2015 -0400
glsl: avoid leaking linked gl_shader when there's a late linker error
This makes piglit mixing-clip-distance-and-clip-vertex-disallowed have 0
definitely lost blocks with valgrind. (Same non-0 number of possibly
lost blocks though.)
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
Reviewed-by: Tobias Klausmann <tobias.johannes.klausmann at mni.thm.de>
Cc: "10.5 10.6" <mesa-stable at lists.freedesktop.org>
(cherry picked from commit 5646f0f18a620292524eebcd77353ff3d3687eb2)
diff --git a/src/glsl/linker.cpp b/src/glsl/linker.cpp
index 01526de..ef815ae 100644
--- a/src/glsl/linker.cpp
+++ b/src/glsl/linker.cpp
@@ -2570,8 +2570,11 @@ link_shaders(struct gl_context *ctx, struct gl_shader_program *prog)
link_intrastage_shaders(mem_ctx, ctx, prog, shader_list[stage],
num_shaders[stage]);
- if (!prog->LinkStatus)
+ if (!prog->LinkStatus) {
+ if (sh)
+ ctx->Driver.DeleteShader(ctx, sh);
goto done;
+ }
switch (stage) {
case MESA_SHADER_VERTEX:
@@ -2584,8 +2587,11 @@ link_shaders(struct gl_context *ctx, struct gl_shader_program *prog)
validate_fragment_shader_executable(prog, sh);
break;
}
- if (!prog->LinkStatus)
+ if (!prog->LinkStatus) {
+ if (sh)
+ ctx->Driver.DeleteShader(ctx, sh);
goto done;
+ }
_mesa_reference_shader(ctx, &prog->_LinkedShaders[stage], sh);
}
commit 56d13627ebb07cac52401714f11a92be6b2d34e6
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date: Sun May 17 17:32:24 2015 -0400
st/mesa: don't leak glsl_to_tgsi object on link failure
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
Cc: "10.5 10.6" <mesa-stable at lists.freedesktop.org>
(cherry picked from commit bb973723a5e1f27817b6be2c2fa4fb3ea28e733c)
diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
index 3a8639fa..5306d6d 100644
--- a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
+++ b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
@@ -5339,6 +5339,7 @@ get_mesa_program(struct gl_context *ctx,
*/
_mesa_associate_uniform_storage(ctx, shader_program, prog->Parameters);
if (!shader_program->LinkStatus) {
+ free_glsl_to_tgsi_visitor(v);
return NULL;
}
commit a10c9c6725259c55281a17efc98566c659ba9146
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date: Mon May 25 14:06:01 2015 -0400
nv30/draw: draw expects constbuf size in bytes, not vec4 units
This fixes glxgears with NV30_SWTNL=1 forced on. Probably fixes a bunch
of other situations where we fall back to the swtnl path.
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
Cc: "10.5 10.6" <mesa-stable at lists.freedesktop.org>
(cherry picked from commit 147816375d22a653176ab28ed650fa811ceea83f)
diff --git a/src/gallium/drivers/nouveau/nv30/nv30_draw.c b/src/gallium/drivers/nouveau/nv30/nv30_draw.c
index 145a78e..783ffe8 100644
--- a/src/gallium/drivers/nouveau/nv30/nv30_draw.c
+++ b/src/gallium/drivers/nouveau/nv30/nv30_draw.c
@@ -399,7 +399,7 @@ nv30_render_vbo(struct pipe_context *pipe, const struct pipe_draw_info *info)
if (nv30->vertprog.constbuf) {
void *map = nv04_resource(nv30->vertprog.constbuf)->data;
draw_set_mapped_constant_buffer(draw, PIPE_SHADER_VERTEX, 0,
- map, nv30->vertprog.constbuf_nr);
+ map, nv30->vertprog.constbuf_nr * 16);
} else {
draw_set_mapped_constant_buffer(draw, PIPE_SHADER_VERTEX, 0, NULL, 0);
}
commit 2d610edf5c998de8297ce1d0f3034efbbcf76ee5
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date: Sun May 24 11:56:21 2015 -0400
nv30/draw: avoid leaving stale pointers in draw state
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
Cc: "10.5 10.6" <mesa-stable at lists.freedesktop.org>
(cherry picked from commit 89585edf3c01c94b62d163adf0209568efa68568)
diff --git a/src/gallium/drivers/nouveau/nv30/nv30_draw.c b/src/gallium/drivers/nouveau/nv30/nv30_draw.c
index 13aad7a..145a78e 100644
--- a/src/gallium/drivers/nouveau/nv30/nv30_draw.c
+++ b/src/gallium/drivers/nouveau/nv30/nv30_draw.c
@@ -400,16 +400,16 @@ nv30_render_vbo(struct pipe_context *pipe, const struct pipe_draw_info *info)
void *map = nv04_resource(nv30->vertprog.constbuf)->data;
draw_set_mapped_constant_buffer(draw, PIPE_SHADER_VERTEX, 0,
map, nv30->vertprog.constbuf_nr);
+ } else {
+ draw_set_mapped_constant_buffer(draw, PIPE_SHADER_VERTEX, 0, NULL, 0);
}
}
for (i = 0; i < nv30->num_vtxbufs; i++) {
const void *map = nv30->vtxbuf[i].user_buffer;
if (!map) {
- if (!nv30->vtxbuf[i].buffer) {
- continue;
- }
- map = pipe_buffer_map(pipe, nv30->vtxbuf[i].buffer,
+ if (nv30->vtxbuf[i].buffer)
+ map = pipe_buffer_map(pipe, nv30->vtxbuf[i].buffer,
PIPE_TRANSFER_UNSYNCHRONIZED |
PIPE_TRANSFER_READ, &transfer[i]);
}
commit 0f7c9815a0897ce7da1b87a4695d2c9f867da527
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date: Sat May 23 20:58:53 2015 -0400
nv30: fix clip plane uploads and enable changes
nv30_validate_clip depends on the rasterizer state. Also we should
upload all the new clip planes on change since next time the plane data
won't have changed, but the enables might.
This fixes fixed-clip-enables and vs-clip-vertex-enables shader tests.
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
Reviewed-by: Tobias Klausmann <tobias.johannes.klausmann at mni.thm.de>
Cc: "10.5 10.6" <mesa-stable at lists.freedesktop.org>
(cherry picked from commit 7518fc3c66e9b5703b987bccca7970a344deadfa)
diff --git a/src/gallium/drivers/nouveau/nv30/nv30_state_validate.c b/src/gallium/drivers/nouveau/nv30/nv30_state_validate.c
index 0f9d19d..704c24b 100644
--- a/src/gallium/drivers/nouveau/nv30/nv30_state_validate.c
+++ b/src/gallium/drivers/nouveau/nv30/nv30_state_validate.c
@@ -272,15 +272,13 @@ nv30_validate_clip(struct nv30_context *nv30)
uint32_t clpd_enable = 0;
for (i = 0; i < 6; i++) {
- if (nv30->rast->pipe.clip_plane_enable & (1 << i)) {
- if (nv30->dirty & NV30_NEW_CLIP) {
- BEGIN_NV04(push, NV30_3D(VP_UPLOAD_CONST_ID), 5);
- PUSH_DATA (push, i);
- PUSH_DATAp(push, nv30->clip.ucp[i], 4);
- }
-
- clpd_enable |= 1 << (1 + 4*i);
+ if (nv30->dirty & NV30_NEW_CLIP) {
+ BEGIN_NV04(push, NV30_3D(VP_UPLOAD_CONST_ID), 5);
+ PUSH_DATA (push, i);
+ PUSH_DATAp(push, nv30->clip.ucp[i], 4);
}
+ if (nv30->rast->pipe.clip_plane_enable & (1 << i))
+ clpd_enable |= 2 << (4*i);
}
BEGIN_NV04(push, NV30_3D(VP_CLIP_PLANES_ENABLE), 1);
@@ -389,7 +387,7 @@ static struct state_validate hwtnl_validate_list[] = {
{ nv30_validate_stipple, NV30_NEW_STIPPLE },
{ nv30_validate_scissor, NV30_NEW_SCISSOR | NV30_NEW_RASTERIZER },
{ nv30_validate_viewport, NV30_NEW_VIEWPORT },
- { nv30_validate_clip, NV30_NEW_CLIP },
+ { nv30_validate_clip, NV30_NEW_CLIP | NV30_NEW_RASTERIZER },
{ nv30_fragprog_validate, NV30_NEW_FRAGPROG | NV30_NEW_FRAGCONST },
{ nv30_vertprog_validate, NV30_NEW_VERTPROG | NV30_NEW_VERTCONST |
NV30_NEW_FRAGPROG | NV30_NEW_RASTERIZER },
commit ece96b4954d4b44cea19926c46f9f91fad4ca35e
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date: Sun May 24 02:23:16 2015 -0400
nv30: avoid leaking render state and draw shaders
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
Cc: "10.5 10.6" <mesa-stable at lists.freedesktop.org>
(cherry picked from commit 9870ed05dd333a20662479b9b1e3a8db542924c4)
diff --git a/src/gallium/drivers/nouveau/nv30/nv30_draw.c b/src/gallium/drivers/nouveau/nv30/nv30_draw.c
index 3575c3d..13aad7a 100644
--- a/src/gallium/drivers/nouveau/nv30/nv30_draw.c
+++ b/src/gallium/drivers/nouveau/nv30/nv30_draw.c
@@ -103,6 +103,7 @@ nv30_render_unmap_vertices(struct vbuf_render *render,
{
struct nv30_render *r = nv30_render(render);
pipe_buffer_unmap(&r->nv30->base.pipe, r->transfer);
+ r->transfer = NULL;
}
static void
@@ -444,6 +445,12 @@ nv30_render_vbo(struct pipe_context *pipe, const struct pipe_draw_info *info)
static void
nv30_render_destroy(struct vbuf_render *render)
{
+ struct nv30_render *r = nv30_render(render);
+
+ if (r->transfer)
+ pipe_buffer_unmap(&r->nv30->base.pipe, r->transfer);
+ pipe_resource_reference(&r->buffer, NULL);
+ nouveau_heap_free(&r->vertprog);
FREE(render);
}
diff --git a/src/gallium/drivers/nouveau/nv30/nv30_fragprog.c b/src/gallium/drivers/nouveau/nv30/nv30_fragprog.c
index ee669b1..7f22786 100644
--- a/src/gallium/drivers/nouveau/nv30/nv30_fragprog.c
+++ b/src/gallium/drivers/nouveau/nv30/nv30_fragprog.c
@@ -23,6 +23,7 @@
*
*/
+#include "draw/draw_context.h"
#include "tgsi/tgsi_parse.h"
#include "nv_object.xml.h"
@@ -147,6 +148,9 @@ nv30_fp_state_delete(struct pipe_context *pipe, void *hwcso)
pipe_resource_reference(&fp->buffer, NULL);
+ if (fp->draw)
+ draw_delete_fragment_shader(nv30_context(pipe)->draw, fp->draw);
+
FREE((void *)fp->pipe.tokens);
FREE(fp->insn);
FREE(fp->consts);
diff --git a/src/gallium/drivers/nouveau/nv30/nv30_vertprog.c b/src/gallium/drivers/nouveau/nv30/nv30_vertprog.c
index 3c1b7e7..4d4145d 100644
--- a/src/gallium/drivers/nouveau/nv30/nv30_vertprog.c
+++ b/src/gallium/drivers/nouveau/nv30/nv30_vertprog.c
@@ -23,6 +23,7 @@
*
*/
+#include "draw/draw_context.h"
#include "util/u_dynarray.h"
#include "tgsi/tgsi_parse.h"
@@ -237,6 +238,10 @@ nv30_vp_state_delete(struct pipe_context *pipe, void *hwcso)
if (vp->translated)
nv30_vertprog_destroy(vp);
+
+ if (vp->draw)
+ draw_delete_vertex_shader(nv30_context(pipe)->draw, vp->draw);
+
FREE((void *)vp->pipe.tokens);
FREE(vp);
}
commit e692b6428cdeac5a16c5a5d7c3326e7550116970
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date: Sun May 24 01:31:11 2015 -0400
nv30: don't leak fragprog consts
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
Cc: "10.5 10.6" <mesa-stable at lists.freedesktop.org>
(cherry picked from commit 605ce36d7f4a90c4062d6940bea82ab483bbe3b2)
diff --git a/src/gallium/drivers/nouveau/nv30/nv30_fragprog.c b/src/gallium/drivers/nouveau/nv30/nv30_fragprog.c
index a05bfe1..ee669b1 100644
--- a/src/gallium/drivers/nouveau/nv30/nv30_fragprog.c
+++ b/src/gallium/drivers/nouveau/nv30/nv30_fragprog.c
@@ -149,6 +149,7 @@ nv30_fp_state_delete(struct pipe_context *pipe, void *hwcso)
FREE((void *)fp->pipe.tokens);
FREE(fp->insn);
+ FREE(fp->consts);
FREE(fp);
}
commit 7d76e8905321f884a9bf58d818e4c6852c3c0832
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date: Sat May 23 01:57:41 2015 -0400
nv50/ir: avoid messing up arg1 of PFETCH
There can be scenarios where the "indirect" arg of a PFETCH becomes
known, and so the code will attempt to propagate it. Use this
opportunity to just fold it into the first argument, and prevent the
load propagation pass from touching PFETCH further.
This fixes gs-input-array-vec4-index-rd.shader_test and
vs-output-array-vec4-index-wr-before-gs.shader_test on nvc0 at least.
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
Reviewed-by: Tobias Klausmann <tobias.johannes.klausmann at mni.thm.de>
Cc: "10.5 10.6" <mesa-stable at lists.freedesktop.org>
(cherry picked from commit fa7f9f123b70f313d3c073b52c9c16b4b8df28f8)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
index 19c53d1..85ebd1c 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
@@ -207,6 +207,9 @@ LoadPropagation::visit(BasicBlock *bb)
if (i->op == OP_CALL) // calls have args as sources, they must be in regs
continue;
+ if (i->op == OP_PFETCH) // pfetch expects arg1 to be a reg
+ continue;
+
if (i->srcExists(1))
checkSwapSrc01(i);
@@ -545,6 +548,11 @@ ConstantFolding::expr(Instruction *i,
case OP_POPCNT:
res.data.u32 = util_bitcount(a->data.u32 & b->data.u32);
break;
+ case OP_PFETCH:
+ // The two arguments to pfetch are logically added together. Normally
+ // the second argument will not be constant, but that can happen.
+ res.data.u32 = a->data.u32 + b->data.u32;
+ break;
default:
return;
}
@@ -559,7 +567,9 @@ ConstantFolding::expr(Instruction *i,
i->getSrc(0)->reg.data = res.data;
- if (i->op == OP_MAD || i->op == OP_FMA) {
+ switch (i->op) {
+ case OP_MAD:
+ case OP_FMA: {
i->op = OP_ADD;
i->setSrc(1, i->getSrc(0));
@@ -574,8 +584,14 @@ ConstantFolding::expr(Instruction *i,
bld.setPosition(i, false);
i->setSrc(1, bld.loadImm(NULL, res.data.u32));
}
- } else {
+ break;
+ }
+ case OP_PFETCH:
+ // Leave PFETCH alone... we just folded its 2 args into 1.
+ break;
+ default:
i->op = i->saturate ? OP_SAT : OP_MOV; /* SAT handled by unary() */
+ break;
}
i->subOp = 0;
}
commit 60e81b47e539793eac5fbf8d69e7ff083b89a195
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date: Sat May 23 17:35:42 2015 -0400
nvc0: a geometry shader can have up to 1024 vertices output
The 1024 is already reported everywhere, not sure where this 0x1ff came
from.
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
Cc: "10.5 10.6" <mesa-stable at lists.freedesktop.org>
(cherry picked from commit 921917c8d8e707dd854e7be05fba7a3e55bc71bf)
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_program.c b/src/gallium/drivers/nouveau/nvc0/nvc0_program.c
index 5589695..4a47cb2 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_program.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_program.c
@@ -392,7 +392,7 @@ nvc0_gp_gen_header(struct nvc0_program *gp, struct nv50_ir_prog_info *info)
break;
}
- gp->hdr[4] = info->prop.gp.maxVertices & 0x1ff;
+ gp->hdr[4] = MIN2(info->prop.gp.maxVertices, 1024);
return nvc0_vtgp_gen_header(gp, info);
}
commit c04aaa5d9950ab907194388d5f78bde4c41f6638
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Tue May 19 17:35:29 2015 -0700
i965/fs: Fix implied_mrf_writes for scratch writes
We build the entire message in the generator so all the MRF writes are
implied.
Cc: "10.5 10.6" <mesa-stable at lists.freedesktop.org>
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
(cherry picked from commit 6ca67f62e885f0e42c0cef2db5c0ae837adfe646)
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp
index 1bbd84c..f72d13d 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
@@ -1036,7 +1036,7 @@ fs_visitor::implied_mrf_writes(fs_inst *inst)
case FS_OPCODE_VARYING_PULL_CONSTANT_LOAD:
return inst->mlen;
case SHADER_OPCODE_GEN4_SCRATCH_WRITE:
- return 2;
+ return inst->mlen;
case SHADER_OPCODE_UNTYPED_ATOMIC:
case SHADER_OPCODE_UNTYPED_SURFACE_READ:
case SHADER_OPCODE_URB_WRITE_SIMD8:
commit a642ec055179f26e2fa663001c4ed98fd9298dfd
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date: Fri May 22 19:03:58 2015 -0400
nvc0/ir: LOAD's can't be used for shader inputs
We forgot to convert to VFETCH in case of indirect access. Fix that.
This avoids crashes on the new gs-input-array-vec4-index-rd and
vs-output-array-vec4-index-wr-before-gs but they still fail.
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
Cc: "10.5 10.6" <mesa-stable at lists.freedesktop.org>
(cherry picked from commit 217301843aea0299ab245e260b20af7ad250e9d8)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_gm107.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_gm107.cpp
index 64989ac..596ac95 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_gm107.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_gm107.cpp
@@ -240,6 +240,7 @@ GM107LoweringPass::visit(Instruction *i)
Value *ptr = bld.mkOp2v(OP_SHL, TYPE_U32, bld.getSSA(),
i->getIndirect(0, 0), bld.mkImm(4));
i->setIndirect(0, 0, ptr);
+ i->op = OP_VFETCH;
} else {
i->op = OP_VFETCH;
assert(prog->getType() != Program::TYPE_FRAGMENT); // INTERP
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
index b758c1c..8ae594c 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
@@ -1714,6 +1714,7 @@ NVC0LoweringPass::visit(Instruction *i)
Value *ptr = bld.mkOp2v(OP_SHL, TYPE_U32, bld.getSSA(),
i->getIndirect(0, 0), bld.mkImm(4));
i->setIndirect(0, 0, ptr);
+ i->op = OP_VFETCH;
} else {
i->op = OP_VFETCH;
assert(prog->getType() != Program::TYPE_FRAGMENT); // INTERP
commit c13b16029d3313f0b7789d0e968b40d9d5e8f436
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date: Fri May 22 19:02:41 2015 -0400
nv50/ir: guess that the constant offset is the starting slot of array
When we get something like IN[ADDR[0].x+5], we will now guess that we
should look at IN[5] for the "base" information.
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
Cc: "10.5 10.6" <mesa-stable at lists.freedesktop.org>
(cherry picked from commit 0bab3962f5f313ea829c95920c02f32afb23715d)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp
index 9ee927f..d26cde6 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp
@@ -1270,18 +1270,20 @@ Converter::srcToSym(tgsi::Instruction::SrcRegister src, int c)
{
const int swz = src.getSwizzle(c);
+ /* TODO: Use Array ID when it's available for the index */
return makeSym(src.getFile(),
src.is2D() ? src.getIndex(1) : 0,
- src.isIndirect(0) ? -1 : src.getIndex(0), swz,
+ src.getIndex(0), swz,
src.getIndex(0) * 16 + swz * 4);
}
Symbol *
Converter::dstToSym(tgsi::Instruction::DstRegister dst, int c)
{
+ /* TODO: Use Array ID when it's available for the index */
return makeSym(dst.getFile(),
dst.is2D() ? dst.getIndex(1) : 0,
- dst.isIndirect(0) ? -1 : dst.getIndex(0), c,
+ dst.getIndex(0), c,
dst.getIndex(0) * 16 + c * 4);
}
commit 58b9e11084707f78c43d139a3289d39dabf15c56
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date: Fri May 22 16:40:08 2015 -0400
nvc0/ir: set ftz when sources are floats, not just destinations
In the case of a compare, the destination might be a predicate, but we
still want to flush denorms.
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
Cc: "10.5 10.6" <mesa-stable at lists.freedesktop.org>
(cherry picked from commit d1eea18a595a468dbc2267a8d14197a3b1a5a4b6)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
index 4000812..b758c1c 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
@@ -77,8 +77,7 @@ void
NVC0LegalizeSSA::handleFTZ(Instruction *i)
{
// Only want to flush float inputs
- if (i->sType != TYPE_F32)
- return;
+ assert(i->sType == TYPE_F32);
// If we're already flushing denorms (and NaN's) to zero, no need for this.
if (i->dnz)
@@ -106,7 +105,7 @@ NVC0LegalizeSSA::visit(BasicBlock *bb)
Instruction *next;
for (Instruction *i = bb->getEntry(); i; i = next) {
next = i->next;
- if (i->dType == TYPE_F32) {
+ if (i->sType == TYPE_F32) {
if (prog->getType() != Program::TYPE_COMPUTE)
handleFTZ(i);
continue;
commit d88de40d7aeb8e5ee65ff8b47a7a08b7addf7b4c
Author: Emil Velikov <emil.l.velikov at gmail.com>
Date: Wed Jun 3 11:49:19 2015 +0100
get-pick-list.sh: Require explicit "10.5" for nominating stable patches
A nomination unadorned with a specific version is now interpreted as
being aimed at the 10.6 branch, which was recently opened.
Signed-off-by: Emil Velikov <emil.l.velikov at gmail.com>
diff --git a/bin/get-pick-list.sh b/bin/get-pick-list.sh
index 0902fd0..68df73e7 100755
--- a/bin/get-pick-list.sh
+++ b/bin/get-pick-list.sh
@@ -14,7 +14,7 @@ git log --reverse --grep="cherry picked from commit" origin/master..HEAD |\
sed -e 's/^[[:space:]]*(cherry picked from commit[[:space:]]*//' -e 's/)//' > already_picked
# Grep for commits that were marked as a candidate for the stable tree.
-git log --reverse --pretty=%H -i --grep='^\([[:space:]]*NOTE: .*[Cc]andidate\|CC:.*mesa-stable\)' HEAD..origin/master |\
+git log --reverse --pretty=%H -i --grep='^\([[:space:]]*NOTE: .*[Cc]andidate\|CC:.*10\.5.*mesa-stable\)' HEAD..origin/master |\
while read sha
do
# Check to see whether the patch is on the ignore list.
commit 8cb28bc49d7799d5accb1feb7e355ec48518e20b
Author: Emil Velikov <emil.l.velikov at gmail.com>
Date: Sun May 24 10:43:31 2015 +0100
docs: Add sha256sums for the 10.5.6 release
Signed-off-by: Emil Velikov <emil.l.velikov at gmail.com>
diff --git a/docs/relnotes/10.5.6.html b/docs/relnotes/10.5.6.html
index 404f51e..0046b8f 100644
--- a/docs/relnotes/10.5.6.html
+++ b/docs/relnotes/10.5.6.html
@@ -31,7 +31,8 @@ because compatibility contexts are not supported.
<h2>SHA256 checksums</h2>
<pre>
-TBD
+89ff9cb08d0f6e3f34154864c3071253057cd21020759457c8ae27e0f70985d3 mesa-10.5.6.tar.gz
+66017853bde5f7a6647db3eede30512a091a3491daa1708e0ad8027c328ba595 mesa-10.5.6.tar.xz
</pre>
commit b1cf9cfb1618f0b73e673745d3c8612aea61723d
Author: Emil Velikov <emil.l.velikov at gmail.com>
Date: Sat May 23 09:02:41 2015 +0100
Add release notes for the 10.5.6 release
Signed-off-by: Emil Velikov <emil.l.velikov at gmail.com>
diff --git a/docs/relnotes/10.5.6.html b/docs/relnotes/10.5.6.html
new file mode 100644
index 0000000..404f51e
--- /dev/null
+++ b/docs/relnotes/10.5.6.html
@@ -0,0 +1,146 @@
+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
+<html lang="en">
+<head>
+ <meta http-equiv="content-type" content="text/html; charset=utf-8">
+ <title>Mesa Release Notes</title>
+ <link rel="stylesheet" type="text/css" href="../mesa.css">
+</head>
+<body>
+
+<div class="header">
+ <h1>The Mesa 3D Graphics Library</h1>
+</div>
+
+<iframe src="../contents.html"></iframe>
+<div class="content">
+
+<h1>Mesa 10.5.6 Release Notes / May 23, 2015</h1>
+
+<p>
+Mesa 10.5.6 is a bug fix release which fixes bugs found since the 10.5.5 release.
+</p>
+<p>
+Mesa 10.5.6 implements the OpenGL 3.3 API, but the version reported by
+glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
+glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
+Some drivers don't support all the features required in OpenGL 3.3. OpenGL
+3.3 is <strong>only</strong> available if requested at context creation
+because compatibility contexts are not supported.
+</p>
+
+
+<h2>SHA256 checksums</h2>
+<pre>
+TBD
+</pre>
+
+
+<h2>New features</h2>
+<p>None</p>
+
+<h2>Bug fixes</h2>
+
+<p>This list is likely incomplete.</p>
+
+<ul>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=86792">Bug 86792</a> - [NVC0] Portal 2 Crashes in Wine</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=90147">Bug 90147</a> - swrast: build error undeclared _SC_PHYS_PAGES on osx</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=90350">Bug 90350</a> - [G96] Portal's portal are incorrectly rendered</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=90363">Bug 90363</a> - [nv50] HW state is not reset correctly when using a new GL context</li>
+
+</ul>
+
+
+<h2>Changes</h2>
+
+<p>Alex Deucher (1):</p>
+<ul>
+ <li>radeonsi: add new bonaire pci id</li>
+</ul>
+
+<p>Axel Davy (2):</p>
+<ul>
+ <li>egl/wayland: properly destroy wayland objects</li>
+ <li>glx/dri3: Add additional check for gpu offloading case</li>
+</ul>
+
+<p>Emil Velikov (4):</p>
+<ul>
+ <li>docs: Add sha256 sums for the 10.5.5 release</li>
+ <li>egl/main: fix EGL_KHR_get_all_proc_addresses</li>
+ <li>targets/osmesa: drop the -module tag from LDFLAGS</li>
+ <li>Update version to 10.5.6</li>
+</ul>
+
+<p>Francisco Jerez (4):</p>
+<ul>
+ <li>clover: Refactor event::trigger and ::abort to prevent deadlock and reentrancy issues.</li>
+ <li>clover: Wrap event::_status in a method to prevent unlocked access.</li>
+ <li>clover: Implement locking of the wait_count, _chain and _status members of event.</li>
+ <li>i965: Fix PBO cache coherency issue after _mesa_meta_pbo_GetTexSubImage().</li>
+</ul>
+
+<p>Fredrik Höglund (2):</p>
+<ul>
+ <li>main: Require that the texture exists in framebuffer_texture</li>
+ <li>mesa: Generate GL_INVALID_VALUE in framebuffer_texture when layer < 0</li>
+</ul>
+
+<p>Ilia Mirkin (7):</p>
+<ul>
+ <li>nv50/ir: only propagate saturate up if some actual folding took place</li>
+ <li>nv50: keep track of PGRAPH state in nv50_screen</li>
+ <li>nvc0: keep track of PGRAPH state in nvc0_screen</li>
+ <li>nvc0: reset the instanced elements state when doing blit using 3d engine</li>
+ <li>nv50/ir: only enable mul saturate on G200+</li>
+ <li>st/mesa: make sure to create a "clean" bool when doing i2b</li>
+ <li>nvc0: switch mechanism for shader eviction to be a while loop</li>
+</ul>
+
+<p>Jeremy Huddleston Sequoia (2):</p>
+<ul>
+ <li>swrast: Build fix for darwin</li>
+ <li>darwin: Fix install name of libOSMesa</li>
+</ul>
+
+<p>Laura Ekstrand (2):</p>
+<ul>
+ <li>main: Fix an error generated by FramebufferTexture</li>
+ <li>main: Complete error conditions for glInvalidate*Framebuffer.</li>
+</ul>
+
+<p>Marta Lofstedt (1):</p>
+<ul>
+ <li>main: glGetIntegeri_v fails for GL_VERTEX_BINDING_STRIDE</li>
+</ul>
+
+<p>Rob Clark (2):</p>
+<ul>
+ <li>freedreno: enable a306</li>
+ <li>freedreno: fix bug in tile/slot calculation</li>
+</ul>
+
+<p>Roland Scheidegger (1):</p>
+<ul>
+ <li>draw: (trivial) fix out-of-bounds vector initialization</li>
+</ul>
+
+<p>Tim Rowley (1):</p>
+<ul>
+ <li>mesa: fix shininess check for ffvertex_prog v2</li>
+</ul>
+
+<p>Tom Stellard (2):</p>
+<ul>
+ <li>clover: Add a mutex to guard queue::queued_events</li>
+ <li>clover: Fix a bug with multi-threaded events v2</li>
+</ul>
+
+
+</div>
+</body>
+</html>
commit eba7b7cf68eb4ddbf3abcbdb80f951c9bada1fef
Author: Emil Velikov <emil.l.velikov at gmail.com>
Date: Sat May 23 08:58:02 2015 +0100
Update version to 10.5.6
Signed-off-by: Emil Velikov <emil.l.velikov at gmail.com>
diff --git a/VERSION b/VERSION
index 23b7528..3b24057 100644
--- a/VERSION
+++ b/VERSION
@@ -1 +1 @@
-10.5.5
+10.5.6
commit fe521a083f6db01208956527f388e1a8061cc591
Author: Emil Velikov <emil.l.velikov at gmail.com>
Date: Wed May 20 21:51:52 2015 +0100
targets/osmesa: drop the -module tag from LDFLAGS
Gallium equivalent of commit 06ff751f97f(darwin: Fix install name of
libOSMesa)
Cc: "10.5 10.6" <mesa-stable at lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov at gmail.com>
(cherry picked from commit 36438f0db6c7c696df73ced12684f4df9d2b47e5)
diff --git a/src/gallium/targets/osmesa/Makefile.am b/src/gallium/targets/osmesa/Makefile.am
index f53823a..714fd7c 100644
--- a/src/gallium/targets/osmesa/Makefile.am
+++ b/src/gallium/targets/osmesa/Makefile.am
@@ -42,7 +42,6 @@ nodist_EXTRA_lib at OSMESA_LIB@_la_SOURCES = dummy.cpp
lib at OSMESA_LIB@_la_SOURCES = target.c
lib at OSMESA_LIB@_la_LDFLAGS = \
- -module \
-no-undefined \
-version-number @OSMESA_VERSION@ \
$(GC_SECTIONS) \
commit 86b7e91ae95b83423525ff22d3a02fae7173de12
Author: Jeremy Huddleston Sequoia <jeremyhu at apple.com>
Date: Wed Feb 11 02:32:33 2015 -0800
darwin: Fix install name of libOSMesa
Passing -module to glibtool causes the resulting library to be called
libSomething.so rather than libSomething.dylib on darwin.
Regardless if libOSMesa is a library or a module, it has been used as
the former for quite some time. Update the build to reflect that and
resolve the naming issue.
Cc: "10.5 10.6" <mesa-stable at lists.freedesktop.org>
Signed-off-by: Jeremy Huddleston Sequoia <jeremyhu at apple.com>
[Emil Velikov: Tweak the commit message.]
Reviewed-by: Emil Velikov <emil.l.velikov at gmail.com>
(cherry picked from commit 06ff751f97fbeb62a23936cd8f9c54733920d082)
diff --git a/src/mesa/drivers/osmesa/Makefile.am b/src/mesa/drivers/osmesa/Makefile.am
index 589b5ee..8d69915 100644
--- a/src/mesa/drivers/osmesa/Makefile.am
+++ b/src/mesa/drivers/osmesa/Makefile.am
@@ -39,7 +39,6 @@ nodist_EXTRA_lib at OSMESA_LIB@_la_SOURCES = dummy.cpp
lib at OSMESA_LIB@_la_SOURCES = osmesa.c
lib at OSMESA_LIB@_la_LDFLAGS = \
- -module \
-no-undefined \
-version-number @OSMESA_VERSION@ \
$(GC_SECTIONS) \
commit 0a265449854bbfd86f0227499e65464b7fcc6670
Author: Jeremy Huddleston Sequoia <jeremyhu at apple.com>
Date: Thu Jan 1 19:48:40 2015 -0800
swrast: Build fix for darwin
Fixes regression from commit 64b1dc44495890cbc2c7c5509cb830264020998c
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90147
Signed-off-by: Jeremy Huddleston Sequoia <jeremyhu at apple.com>
Reviewed-by: Brian Paul <brianp at vmware.com>
CC: Emil Velikov <emil.l.velikov at gmail.com>
CC: jon.turney at dronecode.org.uk
CC: ionic at macports.org
(cherry picked from commit 5b2d3480f57168d50ad24cf0b8c9244414bd3701)
Nominated-by: Emil Velikov <emil.l.velikov at gmail.com>
Squashed with commit
swrast: Build fix for Solaris
Fixes regression from commit 5b2d3480f57168d50ad24cf0b8c9244414bd3701
Cc: "10.5 10.6" <mesa-stable at lists.freedesktop.org>
Signed-off-by: Alan Coopersmith <alan.coopersmith at oracle.com>
Reviewed-by: Jeremy Huddleston Sequoia <jeremyhu at apple.com>
(cherry picked from commit 31cd2d75dc3844e40143f649fe383de17c152a13)
diff --git a/configure.ac b/configure.ac
index 101cf66..98c6b8a 100644
--- a/configure.ac
+++ b/configure.ac
@@ -609,6 +609,7 @@ if test "x$enable_asm" = xyes; then
fi
AC_CHECK_HEADER([xlocale.h], [DEFINES="$DEFINES -DHAVE_XLOCALE_H"])
+AC_CHECK_HEADER([sys/sysctl.h], [DEFINES="$DEFINES -DHAVE_SYS_SYSCTL_H"])
AC_CHECK_FUNC([strtof], [DEFINES="$DEFINES -DHAVE_STRTOF"])
dnl Check to see if dlopen is in default libraries (like Solaris, which
diff --git a/src/mesa/drivers/dri/swrast/swrast.c b/src/mesa/drivers/dri/swrast/swrast.c
index 8005f7d..3556d39 100644
--- a/src/mesa/drivers/dri/swrast/swrast.c
+++ b/src/mesa/drivers/dri/swrast/swrast.c
@@ -60,6 +60,11 @@
#include "swrast_priv.h"
#include "swrast/s_context.h"
+#include <sys/types.h>
+#ifdef HAVE_SYS_SYSCTL_H
+# include <sys/sysctl.h>
+#endif
+
const __DRIextension **__driDriverGetExtensions_swrast(void);
const char * const swrast_vendor_string = "Mesa Project";
@@ -136,6 +141,16 @@ swrast_query_renderer_integer(__DRIscreen *psp, int param,
value[0] = 0;
return 0;
case __DRI2_RENDERER_VIDEO_MEMORY: {
+ /* This should probably share code with os_get_total_physical_memory()
+ * from src/gallium/auxiliary/os/os_misc.c
+ */
+#if defined(CTL_HW) && defined(HW_MEMSIZE)
+ int mib[2] = { CTL_HW, HW_MEMSIZE };
+ unsigned long system_memory_bytes;
+ size_t len = sizeof(system_memory_bytes);
+ if (sysctl(mib, 2, &system_memory_bytes, &len, NULL, 0) != 0)
+ return -1;
+#elif defined(_SC_PHYS_PAGES) && defined(_SC_PAGE_SIZE)
/* XXX: Do we want to return the full amount of system memory ? */
const long system_memory_pages = sysconf(_SC_PHYS_PAGES);
const long system_page_size = sysconf(_SC_PAGE_SIZE);
@@ -145,6 +160,9 @@ swrast_query_renderer_integer(__DRIscreen *psp, int param,
const uint64_t system_memory_bytes = (uint64_t) system_memory_pages
* (uint64_t) system_page_size;
+#else
+#error "Unsupported platform"
+#endif
const unsigned system_memory_megabytes =
(unsigned) (system_memory_bytes / (1024 * 1024));
commit eb1b41302d07e6850987e17832c33a844a334d73
Author: Emil Velikov <emil.l.velikov at gmail.com>
Date: Tue May 12 00:30:16 2015 +0100
egl/main: fix EGL_KHR_get_all_proc_addresses
The extension requires that the address of the core functions should be
available via eglGetProcAddress. Currently the list is guarded by
_EGL_GET_CORE_ADDRESSES, which was only set for the scons (windows)
build.
Unconditionally enable it for all the builds (automake, android and
haiku) considering that the extension is not platform specific and is
always enabled.
v2: Drop the _EGL_GET_CORE_ADDRESSES macro altogether.
Cc: mesa-stable at lists.freedesktop.org
Signed-off-by: Emil Velikov <emil.l.velikov at gmail.com>
(cherry picked from commit 448e01b2918c76dfff8abfbd56a606fdff8c356c)
Conflicts:
src/egl/main/eglapi.c
diff --git a/src/egl/main/eglapi.c b/src/egl/main/eglapi.c
index db44a26..1f33743 100644
--- a/src/egl/main/eglapi.c
+++ b/src/egl/main/eglapi.c
@@ -1029,8 +1029,9 @@ eglGetProcAddress(const char *procname)
const char *name;
_EGLProc function;
} egl_functions[] = {
- /* core functions should not be queryable, but, well... */
-#ifdef _EGL_GET_CORE_ADDRESSES
+ /* core functions queryable in the presence of
+ * EGL_KHR_get_all_proc_addresses or EGL 1.5
+ */
/* alphabetical order */
{ "eglBindAPI", (_EGLProc) eglBindAPI },
{ "eglBindTexImage", (_EGLProc) eglBindTexImage },
@@ -1066,7 +1067,6 @@ eglGetProcAddress(const char *procname)
{ "eglWaitClient", (_EGLProc) eglWaitClient },
{ "eglWaitGL", (_EGLProc) eglWaitGL },
{ "eglWaitNative", (_EGLProc) eglWaitNative },
-#endif /* _EGL_GET_CORE_ADDRESSES */
#ifdef EGL_MESA_screen_surface
{ "eglChooseModeMESA", (_EGLProc) eglChooseModeMESA },
{ "eglGetModesMESA", (_EGLProc) eglGetModesMESA },
commit b1c045c62ffaacb131767345c11b0838111db29c
Author: Rob Clark <robclark at freedesktop.org>
Date: Wed May 13 14:36:03 2015 -0400
freedreno: fix bug in tile/slot calculation
This was causing corruption with hw binning on a306. Unlikely that it
is a306 specific, but rather the smaller gmem size resulted in different
tile configuration which was triggering the bug at certain resolutions.
Signed-off-by: Rob Clark <robclark at freedesktop.org>
Cc: "10.4" and "10.5" and "10.6" <mesa-stable at lists.freedesktop.org>
(cherry picked from commit 4925c35660b777ae6b33a1f87a2f74f3436c7c41)
diff --git a/src/gallium/drivers/freedreno/freedreno_gmem.c b/src/gallium/drivers/freedreno/freedreno_gmem.c
index 4040d1f..8fea672 100644
--- a/src/gallium/drivers/freedreno/freedreno_gmem.c
+++ b/src/gallium/drivers/freedreno/freedreno_gmem.c
@@ -91,6 +91,7 @@ calculate_tiles(struct fd_context *ctx)
uint32_t i, j, t, xoff, yoff;
uint32_t tpp_x, tpp_y;
bool has_zs = !!(ctx->resolve & (FD_BUFFER_DEPTH | FD_BUFFER_STENCIL));
+ int tile_n[ARRAY_SIZE(ctx->pipe)];
if (pfb->cbufs[0])
cpp = util_format_get_blocksize(pfb->cbufs[0]->format);
@@ -213,6 +214,7 @@ calculate_tiles(struct fd_context *ctx)
/* configure tiles: */
t = 0;
yoff = miny;
+ memset(tile_n, 0, sizeof(tile_n));
for (i = 0; i < nbins_y; i++) {
uint32_t bw, bh;
@@ -223,20 +225,17 @@ calculate_tiles(struct fd_context *ctx)
for (j = 0; j < nbins_x; j++) {
struct fd_tile *tile = &ctx->tile[t];
- uint32_t n, p;
+ uint32_t p;
assert(t < ARRAY_SIZE(ctx->tile));
/* pipe number: */
p = ((i / tpp_y) * div_round_up(nbins_x, tpp_x)) + (j / tpp_x);
- /* slot number: */
- n = ((i % tpp_y) * tpp_x) + (j % tpp_x);
-
/* clip bin width: */
bw = MIN2(bin_w, minx + width - xoff);
- tile->n = n;
+ tile->n = tile_n[p]++;
tile->p = p;
tile->bin_w = bw;
tile->bin_h = bh;
commit 21dd729dcc34a9435c5b69eac103056f86b965d2
Author: Rob Clark <robclark at freedesktop.org>
Date: Tue May 12 14:46:50 2015 -0400
freedreno: enable a306
Whitelist adreno 306 (as found in msm8916/apq8016). Works pretty much
out of the box, although the smaller GMEM size requires more tiles to
fit 1920x1080, so bump up the max # of tiles as well.
Since it is just whitelist + trivial change, it makes sense to land on
all the active release branches.
Note that a305c ends up with gpu-id "306", hence a306 ends up with
gpu-id of "307". Apparently that is what happens when you let the
marketing dept name things.
Cc: "10.4" and "10.5" and "10.6" <mesa-stable at lists.freedesktop.org>
Signed-off-by: Rob Clark <robclark at freedesktop.org>
(cherry picked from commit fcc7d6323bbea489219225f467d59192d538e95f)
diff --git a/src/gallium/drivers/freedreno/freedreno_context.h b/src/gallium/drivers/freedreno/freedreno_context.h
index bf9abaf..5f863ca 100644
--- a/src/gallium/drivers/freedreno/freedreno_context.h
+++ b/src/gallium/drivers/freedreno/freedreno_context.h
@@ -293,7 +293,7 @@ struct fd_context {
*/
struct fd_gmem_stateobj gmem;
struct fd_vsc_pipe pipe[8];
- struct fd_tile tile[64];
+ struct fd_tile tile[256];
/* which state objects need to be re-emit'd: */
enum {
diff --git a/src/gallium/drivers/freedreno/freedreno_screen.c b/src/gallium/drivers/freedreno/freedreno_screen.c
index f4ae624..3746c67 100644
--- a/src/gallium/drivers/freedreno/freedreno_screen.c
+++ b/src/gallium/drivers/freedreno/freedreno_screen.c
@@ -531,6 +531,7 @@ fd_screen_create(struct fd_device *dev)
case 220:
fd2_screen_init(pscreen);
break;
+ case 307:
case 320:
case 330:
fd3_screen_init(pscreen);
commit 104dc7447d66fb0006b40e8f8fc4664a7a1216e5
Author: Laura Ekstrand <laura at jlekstrand.net>
Date: Wed Feb 4 14:21:17 2015 -0800
main: Complete error conditions for glInvalidate*Framebuffer.
Signed-off-by: Fredrik Höglund <fredrik at kde.org>
Reviewed-by: Fredrik Höglund <fredrik at kde.org>
Reviewed-by: Adam Jackson <ajax at redhat.com>
Cc: "10.4 10.5" <mesa-stable at lists.freedesktop.org>
(cherry picked from commit b4368ac09db75cea412121ada6c12af1414feb50)
diff --git a/src/mesa/main/fbobject.c b/src/mesa/main/fbobject.c
index 0507b16..d3647fd 100644
--- a/src/mesa/main/fbobject.c
+++ b/src/mesa/main/fbobject.c
@@ -3083,12 +3083,29 @@ invalidate_framebuffer_storage(GLenum target, GLsizei numAttachments,
return;
}
+ /* Section 17.4 Whole Framebuffer Operations of the OpenGL 4.5 Core
+ * Spec (2.2.2015, PDF page 522) says:
+ * "An INVALID_VALUE error is generated if numAttachments, width, or
+ * height is negative."
+ */
if (numAttachments < 0) {
_mesa_error(ctx, GL_INVALID_VALUE,
"%s(numAttachments < 0)", name);
return;
}
+ if (width < 0) {
+ _mesa_error(ctx, GL_INVALID_VALUE,
+ "%s(width < 0)", name);
+ return;
+ }
+
+ if (height < 0) {
+ _mesa_error(ctx, GL_INVALID_VALUE,
+ "%s(height < 0)", name);
+ return;
+ }
+
/* The GL_ARB_invalidate_subdata spec says:
*
* "If an attachment is specified that does not exist in the
@@ -3181,7 +3198,8 @@ invalidate_framebuffer_storage(GLenum target, GLsizei numAttachments,
return;
invalid_enum:
- _mesa_error(ctx, GL_INVALID_ENUM, "%s(attachment)", name);
+ _mesa_error(ctx, GL_INVALID_ENUM, "%s(invalid attachment %s)", name,
+ _mesa_lookup_enum_by_nr(attachments[i]));
return;
}
commit 0475deac263f6af527bda376b39c29fc839c5d1d
Author: Laura Ekstrand <laura at jlekstrand.net>
Date: Mon Apr 20 17:21:20 2015 +0200
main: Fix an error generated by FramebufferTexture
gl*FramebufferTexture should generate GL_INVALID_VALUE when the
texture doesn't exist.
[Fredrik: Split this change out from the next commit]
Signed-off-by: Fredrik Höglund <fredrik at kde.org>
Reviewed-by: Fredrik Höglund <fredrik at kde.org>
Reviewed-by: Adam Jackson <ajax at redhat.com>
Cc: "10.4 10.5" <mesa-stable at lists.freedesktop.org>
(cherry picked from commit 69bdc9dcb8e5d3648e8d96029d5988b8971de8dc)
diff --git a/src/mesa/main/fbobject.c b/src/mesa/main/fbobject.c
index 7e2d0cae..0507b16 100644
--- a/src/mesa/main/fbobject.c
+++ b/src/mesa/main/fbobject.c
@@ -2438,10 +2438,19 @@ framebuffer_texture(struct gl_context *ctx, const char *caller, GLenum target,
}
}
else {
- /* can't render to a non-existant texture */
- _mesa_error(ctx, GL_INVALID_OPERATION,
- "glFramebufferTexture%s(non existant texture)",
- caller);
+ /* Can't render to a non-existent texture object.
+ *
+ * The OpenGL 4.5 core spec (02.02.2015) in Section 9.2 Binding and
+ * Managing Framebuffer Objects specifies a different error
+ * depending upon the calling function (PDF pages 325-328).
+ * *FramebufferTexture (where layered = GL_TRUE) throws invalid
+ * value, while the other commands throw invalid operation (where
+ * layered = GL_FALSE).
+ */
+ const GLenum error = layered ? GL_INVALID_VALUE :
+ GL_INVALID_OPERATION;
+ _mesa_error(ctx, error,
+ "%s(non-existent texture %u)", caller, texture);
return;
}
commit 7f7e74b5360b9ee876743ff7a2046fab90aacf29
Author: Fredrik Höglund <fredrik at kde.org>
Date: Sat May 9 15:31:45 2015 +0200
mesa: Generate GL_INVALID_VALUE in framebuffer_texture when layer < 0
Signed-off-by: Fredrik Höglund <fredrik at kde.org>
Reviewed-by: Adam Jackson <ajax at redhat.com>
Cc: "10.4 10.5" <mesa-stable at lists.freedesktop.org>
(cherry picked from commit 8ba7ad8abc7d71131e17970203c991ccb1befbe6)
diff --git a/src/mesa/main/fbobject.c b/src/mesa/main/fbobject.c
index bbf8aed..7e2d0cae 100644
--- a/src/mesa/main/fbobject.c
+++ b/src/mesa/main/fbobject.c
@@ -2452,6 +2452,18 @@ framebuffer_texture(struct gl_context *ctx, const char *caller, GLenum target,
return;
}
+ /* Page 306 (page 328 of the PDF) of the OpenGL 4.5 (Core Profile)
+ * spec says:
+ *
+ * "An INVALID_VALUE error is generated if texture is non-zero
+ * and layer is negative."
+ */
+ if (zoffset < 0) {
+ _mesa_error(ctx, GL_INVALID_VALUE,
+ "glFramebufferTexture%s(layer %u < 0)", caller, zoffset);
+ return;
+ }
+
if (texObj->Target == GL_TEXTURE_3D) {
const GLuint maxSize = 1 << (ctx->Const.Max3DTextureLevels - 1);
if (zoffset >= maxSize) {
commit a2624f2d2eb41c859a8754d81c262aab6b21dd22
Author: Fredrik Höglund <fredrik at kde.org>
Date: Thu May 7 20:28:23 2015 +0200
main: Require that the texture exists in framebuffer_texture
Generate GL_INVALID_OPERATION if the texture hasn't been created.
Signed-off-by: Fredrik Höglund <fredrik at kde.org>
Reviewed-by: Adam Jackson <ajax at redhat.com>
Cc: "10.4 10.5" <mesa-stable at lists.freedesktop.org>
(cherry picked from commit f9f5c822845698482d0d81eaa64bc13c2fd8852a)
diff --git a/src/mesa/main/fbobject.c b/src/mesa/main/fbobject.c
index 79390ab..bbf8aed 100644
--- a/src/mesa/main/fbobject.c
+++ b/src/mesa/main/fbobject.c
@@ -2387,7 +2387,7 @@ framebuffer_texture(struct gl_context *ctx, const char *caller, GLenum target,
GLboolean err = GL_TRUE;
texObj = _mesa_lookup_texture(ctx, texture);
- if (texObj != NULL) {
+ if (texObj != NULL && texObj->Target != 0) {
if (textarget == 0) {
if (layered) {
/* We're being called by glFramebufferTexture() and textarget
commit a6e1495aa7a980308833ddf078d2c4af113a807b
Author: Francisco Jerez <currojerez at riseup.net>
Date: Sat Jan 31 20:04:55 2015 +0200
i965: Fix PBO cache coherency issue after _mesa_meta_pbo_GetTexSubImage().
This problem can easily be reproduced with a number of
ARB_shader_image_load_store piglit tests, which use a buffer object as
PBO for a pixel transfer operation and later on bind the same buffer
to the pipeline as shader image -- The problem is not exclusive to
images though, and is likely to affect other kinds of buffer objects
that can be bound to the 3D pipeline, including vertex, index,
uniform, atomic counter buffers, etc.
CC: 10.5 <mesa-stable at lists.freedesktop.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand at intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat at gmail.com>
(cherry picked from commit d247615e0d67a7c8eaeea3fece837229c8c9658c)
diff --git a/src/mesa/drivers/dri/i965/intel_pixel_read.c b/src/mesa/drivers/dri/i965/intel_pixel_read.c
index 0972121..08a903b 100644
--- a/src/mesa/drivers/dri/i965/intel_pixel_read.c
+++ b/src/mesa/drivers/dri/i965/intel_pixel_read.c
@@ -226,8 +226,30 @@ intelReadPixels(struct gl_context * ctx,
if (_mesa_is_bufferobj(pack->BufferObj)) {
if (_mesa_meta_pbo_GetTexSubImage(ctx, 2, NULL, x, y, 0, width, height, 1,
- format, type, pixels, pack))
+ format, type, pixels, pack)) {
+ /* _mesa_meta_pbo_GetTexSubImage() implements PBO transfers by
+ * binding the user-provided BO as a fake framebuffer and rendering
+ * to it. This breaks the invariant of the GL that nothing is able
+ * to render to a BO, causing nondeterministic corruption issues
+ * because the render cache is not coherent with a number of other
+ * caches that the BO could potentially be bound to afterwards.
+ *
+ * This could be solved in the same way that we guarantee texture
+ * coherency after a texture is attached to a framebuffer and
+ * rendered to, but that would involve checking *all* BOs bound to
+ * the pipeline for the case we need to emit a cache flush due to
+ * previous rendering to any of them -- Including vertex, index,
+ * uniform, atomic counter, shader image, transform feedback,
+ * indirect draw buffers, etc.
+ *
+ * That would increase the per-draw call overhead even though it's
+ * very unlikely that any of the BOs bound to the pipeline has been
+ * rendered to via a PBO at any point, so it seems better to just
+ * flush here unconditionally.
+ */
+ intel_batchbuffer_emit_mi_flush(brw);
return;
+ }
perf_debug("%s: fallback to CPU mapping in PBO case\n", __FUNCTION__);
}
diff --git a/src/mesa/drivers/dri/i965/intel_tex_image.c b/src/mesa/drivers/dri/i965/intel_tex_image.c
index d18e0bf..ca69f56 100644
--- a/src/mesa/drivers/dri/i965/intel_tex_image.c
+++ b/src/mesa/drivers/dri/i965/intel_tex_image.c
@@ -476,8 +476,15 @@ intel_get_tex_image(struct gl_context *ctx,
if (_mesa_meta_pbo_GetTexSubImage(ctx, 3, texImage, 0, 0, 0,
texImage->Width, texImage->Height,
texImage->Depth, format, type,
- pixels, &ctx->Pack))
+ pixels, &ctx->Pack)) {
+ /* Flush to guarantee coherency between the render cache and other
+ * caches the PBO could potentially be bound to after this point.
+ * See the related comment in intelReadPixels() for a more detailed
+ * explanation.
+ */
+ intel_batchbuffer_emit_mi_flush(brw);
return;
+ }
perf_debug("%s: fallback to CPU mapping in PBO case\n", __FUNCTION__);
}
commit 005def20f41ff9743f9689d4884dc2f49a25a881
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date: Sun May 10 01:57:56 2015 -0400
nvc0: switch mechanism for shader eviction to be a while loop
This aligns it to work similarly to nv50. However there's no library
code there, so the whole thing can be freed. Here we end up with an
allocated node that's not attached to a specific program.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=86792
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
Cc: mesa-stable at lists.freedesktop.org
(cherry picked from commit d06ce2f1df54edd234b1abde37bba524ed599acb)
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_program.c b/src/gallium/drivers/nouveau/nvc0/nvc0_program.c
index c156e91..5589695 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_program.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_program.c
@@ -683,11 +683,12 @@ nvc0_program_upload_code(struct nvc0_context *nvc0, struct nvc0_program *prog)
ret = nouveau_heap_alloc(screen->text_heap, size, prog, &prog->mem);
if (ret) {
struct nouveau_heap *heap = screen->text_heap;
- struct nouveau_heap *iter;
- for (iter = heap; iter && iter->next != heap; iter = iter->next) {
- struct nvc0_program *evict = iter->priv;
- if (evict)
- nouveau_heap_free(&evict->mem);
+ /* Note that the code library, which is allocated before anything else,
+ * does not have a priv pointer. We can stop once we hit it.
+ */
+ while (heap->next && heap->next->priv) {
+ struct nvc0_program *evict = heap->next->priv;
+ nouveau_heap_free(&evict->mem);
}
debug_printf("WARNING: out of code space, evicting all shaders.\n");
ret = nouveau_heap_alloc(heap, size, prog, &prog->mem);
commit 4ad41f45b59410c5feee0f025fc2aa3bc1edec08
Author: Alex Deucher <alexander.deucher at amd.com>
Date: Tue May 12 13:13:05 2015 -0400
radeonsi: add new bonaire pci id
Reviewed-by: Marek Olšák <marek.olsak at amd.com>
Signed-off-by: Alex Deucher <alexander.deucher at amd.com>
Cc: mesa-stable at lists.freedesktop.org
(cherry picked from commit 71ba30f7788167c04d0968d286a387fce16afcce)
diff --git a/include/pci_ids/radeonsi_pci_ids.h b/include/pci_ids/radeonsi_pci_ids.h
index 571e863..cd5da99 100644
--- a/include/pci_ids/radeonsi_pci_ids.h
+++ b/include/pci_ids/radeonsi_pci_ids.h
@@ -85,6 +85,7 @@ CHIPSET(0x6651, BONAIRE_6651, BONAIRE)
CHIPSET(0x6658, BONAIRE_6658, BONAIRE)
CHIPSET(0x665C, BONAIRE_665C, BONAIRE)
CHIPSET(0x665D, BONAIRE_665D, BONAIRE)
+CHIPSET(0x665F, BONAIRE_665F, BONAIRE)
CHIPSET(0x9830, KABINI_9830, KABINI)
CHIPSET(0x9831, KABINI_9831, KABINI)
commit 907ee1494faba1e8a53bbd95546ffda241f7d6cd
Author: Francisco Jerez <currojerez at riseup.net>
Date: Sat May 9 16:01:23 2015 +0300
clover: Implement locking of the wait_count, _chain and _status members of event.
Tested-by: Tom Stellard <thomas.stellard at amd.com>
CC: 10.5 <mesa-stable at lists.freedesktop.org>
(cherry picked from commit a533d4edf1ea346dd9e343c71b2cd500fa550ef8)
diff --git a/src/gallium/state_trackers/clover/core/event.cpp b/src/gallium/state_trackers/clover/core/event.cpp
index 969d19a..e1f9de0 100644
--- a/src/gallium/state_trackers/clover/core/event.cpp
+++ b/src/gallium/state_trackers/clover/core/event.cpp
@@ -38,6 +38,7 @@ event::~event() {
std::vector<intrusive_ref<event>>
event::trigger_self() {
+ std::lock_guard<std::mutex> lock(mutex);
std::vector<intrusive_ref<event>> evs;
if (!--wait_count)
@@ -61,6 +62,7 @@ event::trigger() {
std::vector<intrusive_ref<event>>
event::abort_self(cl_int status) {
+ std::lock_guard<std::mutex> lock(mutex);
std::vector<intrusive_ref<event>> evs;
_status = status;
@@ -81,16 +83,22 @@ event::abort(cl_int status) {
bool
event::signalled() const {
+ std::lock_guard<std::mutex> lock(mutex);
return !wait_count;
}
cl_int
event::status() const {
+ std::lock_guard<std::mutex> lock(mutex);
return _status;
}
void
event::chain(event &ev) {
+ std::unique_lock<std::mutex> lock(mutex, std::defer_lock);
+ std::unique_lock<std::mutex> lock_ev(ev.mutex, std::defer_lock);
+ std::lock(lock, lock_ev);
+
if (wait_count) {
ev.wait_count++;
_chain.push_back(ev);
commit b4045dd5e9bbe3c29a8926ac66a42baf3d7cac9a
Author: Francisco Jerez <currojerez at riseup.net>
Date: Sat May 9 16:22:33 2015 +0300
clover: Wrap event::_status in a method to prevent unlocked access.
Tested-by: Tom Stellard <thomas.stellard at amd.com>
CC: 10.5 <mesa-stable at lists.freedesktop.org>
(cherry picked from commit 4022a468b2976c65e0d2afe9c9ac5804729e8641)
diff --git a/src/gallium/state_trackers/clover/core/event.cpp b/src/gallium/state_trackers/clover/core/event.cpp
index d03e0b4..969d19a 100644
--- a/src/gallium/state_trackers/clover/core/event.cpp
+++ b/src/gallium/state_trackers/clover/core/event.cpp
@@ -27,7 +27,7 @@ using namespace clover;
event::event(clover::context &ctx, const ref_vector<event> &deps,
action action_ok, action action_fail) :
- context(ctx), _status(0), wait_count(1),
+ context(ctx), wait_count(1), _status(0),
action_ok(action_ok), action_fail(action_fail) {
for (auto &ev : deps)
ev.chain(*this);
@@ -84,6 +84,11 @@ event::signalled() const {
return !wait_count;
}
+cl_int
+event::status() const {
+ return _status;
+}
+
void
event::chain(event &ev) {
if (wait_count) {
@@ -122,8 +127,8 @@ cl_int
hard_event::status() const {
pipe_screen *screen = queue()->device().pipe;
- if (_status < 0)
- return _status;
+ if (event::status() < 0)
+ return event::status();
else if (!_fence)
return CL_QUEUED;
@@ -213,8 +218,8 @@ soft_event::soft_event(clover::context &ctx, const ref_vector<event> &deps,
cl_int
soft_event::status() const {
- if (_status < 0)
- return _status;
+ if (event::status() < 0)
+ return event::status();
else if (!signalled() ||
any_of([](const event &ev) {
diff --git a/src/gallium/state_trackers/clover/core/event.hpp b/src/gallium/state_trackers/clover/core/event.hpp
index 32acb2d..837d63c 100644
--- a/src/gallium/state_trackers/clover/core/event.hpp
+++ b/src/gallium/state_trackers/clover/core/event.hpp
@@ -66,7 +66,7 @@ namespace clover {
void abort(cl_int status);
bool signalled() const;
- virtual cl_int status() const = 0;
+ virtual cl_int status() const;
virtual command_queue *queue() const = 0;
virtual cl_command_type command() const = 0;
virtual void wait() const;
@@ -76,7 +76,6 @@ namespace clover {
protected:
void chain(event &ev);
- cl_int _status;
std::vector<intrusive_ref<event>> deps;
private:
@@ -84,6 +83,7 @@ namespace clover {
std::vector<intrusive_ref<event>> abort_self(cl_int status);
unsigned wait_count;
+ cl_int _status;
action action_ok;
action action_fail;
std::vector<intrusive_ref<event>> _chain;
commit f25af5317f7acb29503df8685c501af0daa2b8a1
Author: Francisco Jerez <currojerez at riseup.net>
Date: Sat May 9 14:47:38 2015 +0300
clover: Refactor event::trigger and ::abort to prevent deadlock and reentrancy issues.
Refactor ::trigger and ::abort to split out the operations that access
concurrently modified data members and require locking from the
recursive and possibly re-entrant part of these methods. This will
avoid some deadlock situations when locking is implemented.
Tested-by: Tom Stellard <thomas.stellard at amd.com>
CC: 10.5 <mesa-stable at lists.freedesktop.org>
(cherry picked from commit 2232b929fd9ca6f00c8dab9dc45c386986be922d)
diff --git a/src/gallium/state_trackers/clover/core/event.cpp b/src/gallium/state_trackers/clover/core/event.cpp
index 5579303..d03e0b4 100644
--- a/src/gallium/state_trackers/clover/core/event.cpp
+++ b/src/gallium/state_trackers/clover/core/event.cpp
@@ -36,28 +36,47 @@ event::event(clover::context &ctx, const ref_vector<event> &deps,
event::~event() {
}
+std::vector<intrusive_ref<event>>
+event::trigger_self() {
+ std::vector<intrusive_ref<event>> evs;
+
+ if (!--wait_count)
+ std::swap(_chain, evs);
+
+ return evs;
+}
+
void
event::trigger() {
- if (!--wait_count) {
- cv.notify_all();
- action_ok(*this);
+ auto evs = trigger_self();
- while (!_chain.empty()) {
- _chain.back()().trigger();
- _chain.pop_back();
- }
+ if (signalled()) {
+ action_ok(*this);
+ cv.notify_all();
}
+
+ for (event &ev : evs)
+ ev.trigger();
+}
+
+std::vector<intrusive_ref<event>>
+event::abort_self(cl_int status) {
+ std::vector<intrusive_ref<event>> evs;
+
+ _status = status;
+ std::swap(_chain, evs);
+
+ return evs;
}
void
event::abort(cl_int status) {
- _status = status;
+ auto evs = abort_self(status);
+
action_fail(*this);
- while (!_chain.empty()) {
- _chain.back()().abort(status);
- _chain.pop_back();
- }
+ for (event &ev : evs)
+ ev.abort(status);
}
bool
diff --git a/src/gallium/state_trackers/clover/core/event.hpp b/src/gallium/state_trackers/clover/core/event.hpp
index e1727b8..32acb2d 100644
--- a/src/gallium/state_trackers/clover/core/event.hpp
+++ b/src/gallium/state_trackers/clover/core/event.hpp
@@ -80,6 +80,9 @@ namespace clover {
std::vector<intrusive_ref<event>> deps;
private:
+ std::vector<intrusive_ref<event>> trigger_self();
+ std::vector<intrusive_ref<event>> abort_self(cl_int status);
+
unsigned wait_count;
action action_ok;
action action_fail;
commit 1353ba53977e9a531fcadf3c04ad4c69c32c22c0
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date: Wed May 6 23:29:33 2015 -0400
st/mesa: make sure to create a "clean" bool when doing i2b
i2b has to work for all integers, not just 1. INEG would not necessarily
result with all bits set, which is something that other operations can
rely on by e.g. using AND (or INEG for b2i).
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
Reviewed-by: Jason Ekstrand <jason.ekstrand at intel.com>
Reviewed-by: Marek Olšák <marek.olsak at amd.com>
Reviewed-by: Roland Scheidegger <sroland at vmware.com>
Cc: mesa-stable at lists.freedesktop.org
(cherry picked from commit 2b5355c8ab383d86bb6332dd29c417a6a1bc52bd)
diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
index 0d7145e..3a8639fa 100644
--- a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
+++ b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
@@ -1832,7 +1832,7 @@ glsl_to_tgsi_visitor::visit(ir_expression *ir)
break;
case ir_unop_i2b:
if (native_integers)
- emit(ir, TGSI_OPCODE_INEG, result_dst, op[0]);
+ emit(ir, TGSI_OPCODE_USNE, result_dst, op[0], st_src_reg_for_int(0));
else
emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], st_src_reg_for_float(0.0));
break;
commit 097e70202b6ae5b07303274c1d5087f94bd3cf06
Author: Tom Stellard <thomas.stellard at amd.com>
Date: Thu Mar 26 19:33:24 2015 +0000
clover: Fix a bug with multi-threaded events v2
It was possible for some events never to get triggered if one thread
was creating events and another threads was waiting for them.
This patch consolidates soft_event::wait() and hard_event::wait()
into event::wait() so that hard_event objects will now wait for
all their dependencies to be submitted before flushing the command
queue.
v2:
- Rename variables
- Use mutable varibales so we can keep event::wait() const
- Open code signalled() call so mutex can be atted to signalled
without deadlocking.
CC: 10.5 <mesa-stable at lists.freedesktop.org>
Reviewed-by: Francisco Jerez <currojerez at riseup.net>
(cherry picked from commit 9c4dc98b298c74015f2a7c21571bccf0a5b6cc98)
diff --git a/src/gallium/state_trackers/clover/core/event.cpp b/src/gallium/state_trackers/clover/core/event.cpp
index 58de888..5579303 100644
--- a/src/gallium/state_trackers/clover/core/event.cpp
+++ b/src/gallium/state_trackers/clover/core/event.cpp
@@ -39,6 +39,7 @@ event::~event() {
void
event::trigger() {
if (!--wait_count) {
+ cv.notify_all();
action_ok(*this);
while (!_chain.empty()) {
@@ -73,6 +74,15 @@ event::chain(event &ev) {
ev.deps.push_back(*this);
}
+void
+event::wait() const {
+ for (event &ev : deps)
+ ev.wait();
+
+ std::unique_lock<std::mutex> lock(mutex);
+ cv.wait(lock, [=]{ return !wait_count; });
+}
+
hard_event::hard_event(command_queue &q, cl_command_type command,
const ref_vector<event> &deps, action action) :
event(q.context(), deps, profile(q, action), [](event &ev){}),
@@ -120,6 +130,8 @@ void
hard_event::wait() const {
pipe_screen *screen = queue()->device().pipe;
+ event::wait();
+
if (status() == CL_QUEUED)
queue()->flush();
@@ -207,8 +219,7 @@ soft_event::command() const {
void
soft_event::wait() const {
- for (event &ev : deps)
- ev.wait();
+ event::wait();
if (status() != CL_COMPLETE)
throw error(CL_EXEC_STATUS_ERROR_FOR_EVENTS_IN_WAIT_LIST);
diff --git a/src/gallium/state_trackers/clover/core/event.hpp b/src/gallium/state_trackers/clover/core/event.hpp
index 0e1359a..e1727b8 100644
--- a/src/gallium/state_trackers/clover/core/event.hpp
+++ b/src/gallium/state_trackers/clover/core/event.hpp
@@ -23,6 +23,7 @@
#ifndef CLOVER_CORE_EVENT_HPP
#define CLOVER_CORE_EVENT_HPP
+#include <condition_variable>
#include <functional>
#include "core/object.hpp"
@@ -68,7 +69,7 @@ namespace clover {
virtual cl_int status() const = 0;
virtual command_queue *queue() const = 0;
virtual cl_command_type command() const = 0;
- virtual void wait() const = 0;
+ virtual void wait() const;
const intrusive_ref<clover::context> context;
@@ -83,6 +84,8 @@ namespace clover {
action action_ok;
action action_fail;
std::vector<intrusive_ref<event>> _chain;
+ mutable std::condition_variable cv;
+ mutable std::mutex mutex;
};
///
commit 5bb7ee4fd605da1d9ca3b4aa2b6a7a28e214e0f6
Author: Tom Stellard <thomas.stellard at amd.com>
Date: Thu May 7 13:57:14 2015 +0000
clover: Add a mutex to guard queue::queued_events
This fixes a potential crash where on a sequence like this:
Thread 0: Check if queue is not empty.
Thread 1: Remove item from queue, making it empty.
Thread 0: Do something assuming queue is not empty.
CC: 10.5 <mesa-stable at lists.freedesktop.org>
Reviewed-by: Francisco Jerez <currojerez at riseup.net>
(cherry picked from commit f546902d9597429713c83e2caf6b69856bd7ba4d)
diff --git a/src/gallium/state_trackers/clover/core/queue.cpp b/src/gallium/state_trackers/clover/core/queue.cpp
index 24f9326..87f9dcc 100644
--- a/src/gallium/state_trackers/clover/core/queue.cpp
+++ b/src/gallium/state_trackers/clover/core/queue.cpp
@@ -44,6 +44,7 @@ command_queue::flush() {
pipe_screen *screen = device().pipe;
pipe_fence_handle *fence = NULL;
+ std::lock_guard<std::mutex> lock(queued_events_mutex);
if (!queued_events.empty()) {
pipe->flush(pipe, &fence, 0);
@@ -69,6 +70,7 @@ command_queue::profiling_enabled() const {
void
command_queue::sequence(hard_event &ev) {
+ std::lock_guard<std::mutex> lock(queued_events_mutex);
if (!queued_events.empty())
queued_events.back()().chain(ev);
diff --git a/src/gallium/state_trackers/clover/core/queue.hpp b/src/gallium/state_trackers/clover/core/queue.hpp
index b7166e6..bddb86c 100644
--- a/src/gallium/state_trackers/clover/core/queue.hpp
+++ b/src/gallium/state_trackers/clover/core/queue.hpp
@@ -24,6 +24,7 @@
#define CLOVER_CORE_QUEUE_HPP
#include <deque>
+#include <mutex>
#include "core/object.hpp"
#include "core/context.hpp"
@@ -69,6 +70,7 @@ namespace clover {
cl_command_queue_properties props;
pipe_context *pipe;
+ std::mutex queued_events_mutex;
std::deque<intrusive_ref<hard_event>> queued_events;
};
}
commit 0024b85cc66e2e69e3c374c1f9bc9ef88cb0bf81
Author: Axel Davy <axel.davy at ens.fr>
Date: Fri May 1 00:20:34 2015 +0200
glx/dri3: Add additional check for gpu offloading case
Checks blitImage is implemented.
Initially having the __DRIimageExtension extension
at version 9 at least meant blitImage was supported.
However some implementation do advertise version >= 9
without implementing it.
CC: 10.5 <mesa-stable at lists.freedesktop.org>
Reviewed-by: Dave Airlie <airlied at redhat.com>
Reviewed-by: Daniel Stone <daniels at collabora.com>
Signed-off-by: Axel Davy <axel.davy at ens.fr>
(cherry picked from commit c4ff6d00cd7dde4646ff96733f68d3ddbf540c2c)
diff --git a/src/glx/dri3_glx.c b/src/glx/dri3_glx.c
index 1ddc723..fa38513 100644
--- a/src/glx/dri3_glx.c
+++ b/src/glx/dri3_glx.c
@@ -1985,6 +1985,11 @@ dri3_create_screen(int screen, struct glx_display * priv)
goto handle_error;
}
+ if (psc->is_different_gpu && !psc->image->blitImage) {
+ ErrorMessageF("Different GPU, but blitImage not implemented for this driver\n");
+ goto handle_error;
+ }
+
if (!psc->is_different_gpu && (
!psc->texBuffer || psc->texBuffer->base.version < 2 ||
!psc->texBuffer->setTexBuffer2
commit ace7d9afc912b3d34f875e9a8a964e7a16113cf9
Author: Axel Davy <axel.davy at ens.fr>
Date: Fri May 1 00:03:32 2015 +0200
egl/wayland: properly destroy wayland objects
the wl_registry and the wl_queue allocated weren't destroyed.
CC: 10.5 <mesa-stable at lists.freedesktop.org>
Reviewed-by: Dave Airlie <airlied at redhat.com>
Reviewed-by: Daniel Stone <daniels at collabora.com>
Signed-off-by: Axel Davy <axel.davy at ens.fr>
(cherry picked from commit 6aaf09b93b668a24b557e05195b9897e8cee8559)
diff --git a/src/egl/drivers/dri2/egl_dri2.c b/src/egl/drivers/dri2/egl_dri2.c
index 6306483..30210f4 100644
--- a/src/egl/drivers/dri2/egl_dri2.c
+++ b/src/egl/drivers/dri2/egl_dri2.c
@@ -703,6 +703,8 @@ dri2_terminate(_EGLDriver *drv, _EGLDisplay *disp)
#ifdef HAVE_WAYLAND_PLATFORM
case _EGL_PLATFORM_WAYLAND:
wl_drm_destroy(dri2_dpy->wl_drm);
+ wl_registry_destroy(dri2_dpy->wl_registry);
+ wl_event_queue_destroy(dri2_dpy->wl_queue);
if (dri2_dpy->own_device) {
wl_display_disconnect(dri2_dpy->wl_dpy);
}
diff --git a/src/egl/drivers/dri2/platform_wayland.c b/src/egl/drivers/dri2/platform_wayland.c
index 07f68a2..36547f5 100644
--- a/src/egl/drivers/dri2/platform_wayland.c
+++ b/src/egl/drivers/dri2/platform_wayland.c
@@ -1028,7 +1028,7 @@ dri2_initialize_wayland(_EGLDriver *drv, _EGLDisplay *disp)
wl_registry_add_listener(dri2_dpy->wl_registry,
®istry_listener, dri2_dpy);
if (roundtrip(dri2_dpy) < 0 || dri2_dpy->wl_drm == NULL)
- goto cleanup_dpy;
+ goto cleanup_registry;
if (roundtrip(dri2_dpy) < 0 || dri2_dpy->fd == -1)
goto cleanup_drm;
@@ -1111,6 +1111,9 @@ dri2_initialize_wayland(_EGLDriver *drv, _EGLDisplay *disp)
cleanup_drm:
free(dri2_dpy->device_name);
wl_drm_destroy(dri2_dpy->wl_drm);
+ cleanup_registry:
+ wl_registry_destroy(dri2_dpy->wl_registry);
+ wl_event_queue_destroy(dri2_dpy->wl_queue);
cleanup_dpy:
free(dri2_dpy);
commit 3dc08d4d8962cb4b00d7cc7e2a1dbdae17b6ae1e
Author: Marta Lofstedt <marta.lofstedt at linux.intel.com>
Date: Thu May 7 17:13:47 2015 +0200
main: glGetIntegeri_v fails for GL_VERTEX_BINDING_STRIDE
The return type for GL_VERTEX_BINDING_STRIDE is missing,
this cause glGetIntegeri_v to fail.
Signed-off-by: Marta Lofstedt <marta.lofstedt at linux.intel.com>
Reviewed-by: Tapani Pälli <tapani.palli at intel.com>
Reviewed-by: Emil Velikov <emil.l.velikov at gmail.com>
Cc: "10.4 10.5" <mesa-stable at lists.freedesktop.org>
(cherry picked from commit 4a8cd2799c2467b9916dd0ba672f05a394aa9b9f)
diff --git a/src/mesa/main/get.c b/src/mesa/main/get.c
index 3f9d745..48290e9 100644
--- a/src/mesa/main/get.c
+++ b/src/mesa/main/get.c
@@ -1911,6 +1911,7 @@ find_value_indexed(const char *func, GLenum pname, GLuint index, union value *v)
if (index >= ctx->Const.Program[MESA_SHADER_VERTEX].MaxAttribs)
goto invalid_value;
v->value_int = ctx->Array.VAO->VertexBinding[VERT_ATTRIB_GENERIC(index)].Stride;
+ return TYPE_INT;
/* ARB_shader_image_load_store */
case GL_IMAGE_BINDING_NAME: {
commit 8a3ed2dee7f4c2ee13dab984459b80d2dd7f13c2
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date: Sat May 9 03:26:07 2015 -0400
nv50/ir: only enable mul saturate on G200+
Commit 44673512a84 enabled support for saturating fmul. However
experimentally this does not seem to work on the older chips. Restrict
the feature to G200 (NVA0) and later.
Reported-by: Pierre Moreau <pierre.morrow at free.fr>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90350
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
Tested-by: Pierre Moreau <pierre.morrow at free.fr>
Reviewed-by: Tobias Klausmann <tobias.johannes.klausmann at mni.thm.de>
Cc: mesa-stable at lists.freedesktop.org
(cherry picked from commit da136dc07ddb6147d181c96f475b94f6281efd73)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nv50.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nv50.cpp
index 48f996b..c99c4d9 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nv50.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nv50.cpp
@@ -84,7 +84,7 @@ static const struct opProperties _initProps[] =
// neg abs not sat c[] s[], a[], imm
{ OP_ADD, 0x3, 0x0, 0x0, 0x8, 0x2, 0x1, 0x1, 0x2 },
{ OP_SUB, 0x3, 0x0, 0x0, 0x8, 0x2, 0x1, 0x1, 0x2 },
- { OP_MUL, 0x3, 0x0, 0x0, 0x8, 0x2, 0x1, 0x1, 0x2 },
+ { OP_MUL, 0x3, 0x0, 0x0, 0x0, 0x2, 0x1, 0x1, 0x2 },
{ OP_MAX, 0x3, 0x3, 0x0, 0x0, 0x2, 0x1, 0x1, 0x0 },
{ OP_MIN, 0x3, 0x3, 0x0, 0x0, 0x2, 0x1, 0x1, 0x0 },
{ OP_MAD, 0x7, 0x0, 0x0, 0x8, 0x6, 0x1, 0x1, 0x0 }, // special constraint
@@ -188,6 +188,9 @@ void TargetNV50::initOpInfo()
if (prop->mSat & 8)
opInfo[prop->op].dstMods = NV50_IR_MOD_SAT;
}
+
+ if (chipset >= 0xa0)
+ opInfo[OP_MUL].dstMods = NV50_IR_MOD_SAT;
}
unsigned int
commit d47d799b5f0e860c5ca2cc634015167dfd98e2e6
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date: Sat May 9 13:25:51 2015 -0400
nvc0: reset the instanced elements state when doing blit using 3d engine
Since we update num_vtxelts here, we could otherwise end up with stale
instancing information in the upper bits which wouldn't otherwise get
reset. (Also we run the risk of the previous draw having set the first
element as instanced.)
This appears as one of the causes for the test pointed out in fdo#90363
to fail on nvc0.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90363
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
Cc: mesa-stable at lists.freedesktop.org
(cherry picked from commit 7892210400e8f3bd14697c0a3dd56e98454a45df)
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_surface.c b/src/gallium/drivers/nouveau/nvc0/nvc0_surface.c
index 4404d8c..a820de7 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_surface.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_surface.c
@@ -1152,6 +1152,12 @@ nvc0_blit_3d(struct nvc0_context *nvc0, const struct pipe_blit_info *info)
NVC0_3D_VERTEX_ATTRIB_FORMAT_SIZE_32 |
NVC0_3D_VERTEX_ATTRIB_FORMAT_CONST);
}
+ if (nvc0->state.instance_elts) {
+ nvc0->state.instance_elts = 0;
+ BEGIN_NVC0(push, NVC0_3D(MACRO_VERTEX_ARRAY_PER_INSTANCE), 2);
+ PUSH_DATA (push, n);
+ PUSH_DATA (push, 0);
+ }
nvc0->state.num_vtxelts = 2;
for (i = 0; i < info->dst.box.depth; ++i, z += dz) {
commit f3804a005195ab3d77a727a71727cc1a9d09427c
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date: Fri May 8 00:26:24 2015 -0400
nvc0: keep track of PGRAPH state in nvc0_screen
See identical commit for nv50. Destroying the current context and then
creating a new one or switching to another existing context would cause
the "current" state to not be properly initialized, so we save it off in
the screen.
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
Cc: mesa-stable at lists.freedesktop.org
(cherry picked from commit e9b1ea29bf1e8f09e83bd6358d0d2068053f09d4)
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_context.c b/src/gallium/drivers/nouveau/nvc0/nvc0_context.c
index 7662fb5..7904984 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_context.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_context.c
@@ -139,8 +139,12 @@ nvc0_destroy(struct pipe_context *pipe)
{
struct nvc0_context *nvc0 = nvc0_context(pipe);
- if (nvc0->screen->cur_ctx == nvc0)
+ if (nvc0->screen->cur_ctx == nvc0) {
nvc0->screen->cur_ctx = NULL;
+ nvc0->screen->save_state = nvc0->state;
+ nvc0->screen->save_state.tfb = NULL;
+ }
+
/* Unset bufctx, we don't want to revalidate any resources after the flush.
* Other contexts will always set their bufctx again on action calls.
*/
@@ -303,6 +307,7 @@ nvc0_create(struct pipe_screen *pscreen, void *priv)
pipe->get_sample_position = nvc0_context_get_sample_position;
if (!screen->cur_ctx) {
+ nvc0->state = screen->save_state;
screen->cur_ctx = nvc0;
nouveau_pushbuf_bufctx(screen->base.pushbuf, nvc0->bufctx);
}
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_context.h b/src/gallium/drivers/nouveau/nvc0/nvc0_context.h
index ef251f3..a8d7593 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_context.h
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_context.h
@@ -113,29 +113,7 @@ struct nvc0_context {
uint32_t dirty;
uint32_t dirty_cp; /* dirty flags for compute state */
- struct {
- boolean flushed;
- boolean rasterizer_discard;
- boolean early_z_forced;
- boolean prim_restart;
- uint32_t instance_elts; /* bitmask of per-instance elements */
- uint32_t instance_base;
- uint32_t constant_vbos;
- uint32_t constant_elts;
- int32_t index_bias;
- uint16_t scissor;
- uint8_t vbo_mode; /* 0 = normal, 1 = translate, 3 = translate, forced */
- uint8_t num_vtxbufs;
- uint8_t num_vtxelts;
- uint8_t num_textures[6];
- uint8_t num_samplers[6];
- uint8_t tls_required; /* bitmask of shader types using l[] */
- uint8_t c14_bound; /* whether immediate array constbuf is bound */
- uint8_t clip_enable;
- uint32_t clip_mode;
- uint32_t uniform_buffer_bound[5];
- struct nvc0_transform_feedback_state *tfb;
- } state;
+ struct nvc0_graph_state state;
struct nvc0_blend_stateobj *blend;
struct nvc0_rasterizer_stateobj *rast;
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.h b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.h
index 8a1991f..bce0f4a 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.h
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.h
@@ -27,10 +27,35 @@ struct nvc0_context;
struct nvc0_blitter;
+struct nvc0_graph_state {
+ boolean flushed;
+ boolean rasterizer_discard;
+ boolean early_z_forced;
+ boolean prim_restart;
+ uint32_t instance_elts; /* bitmask of per-instance elements */
+ uint32_t instance_base;
+ uint32_t constant_vbos;
+ uint32_t constant_elts;
+ int32_t index_bias;
+ uint16_t scissor;
+ uint8_t vbo_mode; /* 0 = normal, 1 = translate, 3 = translate, forced */
+ uint8_t num_vtxbufs;
+ uint8_t num_vtxelts;
+ uint8_t num_textures[6];
+ uint8_t num_samplers[6];
+ uint8_t tls_required; /* bitmask of shader types using l[] */
+ uint8_t c14_bound; /* whether immediate array constbuf is bound */
+ uint8_t clip_enable;
+ uint32_t clip_mode;
+ uint32_t uniform_buffer_bound[5];
+ struct nvc0_transform_feedback_state *tfb;
+};
+
struct nvc0_screen {
struct nouveau_screen base;
struct nvc0_context *cur_ctx;
+ struct nvc0_graph_state save_state;
int num_occlusion_queries_active;
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_state_validate.c b/src/gallium/drivers/nouveau/nvc0/nvc0_state_validate.c
index 6051f12..d3ad81d 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_state_validate.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_state_validate.c
@@ -543,6 +543,8 @@ nvc0_switch_pipe_context(struct nvc0_context *ctx_to)
if (ctx_from)
ctx_to->state = ctx_from->state;
+ else
+ ctx_to->state = ctx_to->screen->save_state;
ctx_to->dirty = ~0;
ctx_to->viewports_dirty = ~0;
commit 113e2bd73269864b08536fee9e7147718dfd7c07
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date: Fri May 8 00:15:22 2015 -0400
nv50: keep track of PGRAPH state in nv50_screen
Normally this is kept in nv50_context, and on switching the active
context, the state is copied from the previous context. However when the
last context is destroyed, this is lost, and a new context might later
be created. When the currently-active context is destroyed, save its
state in the screen, and restore it when setting the current context.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90363
Reported-by: Matteo Bruni <matteo.mystral at gmail.com>
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
Tested-by: Matteo Bruni <matteo.mystral at gmail.com>
Cc: mesa-stable at lists.freedesktop.org
(cherry picked from commit f617029db3f8786d94c64f1a73c42b89b6d261fa)
diff --git a/src/gallium/drivers/nouveau/nv50/nv50_context.c b/src/gallium/drivers/nouveau/nv50/nv50_context.c
index 2cfd5db..5b5d391 100644
--- a/src/gallium/drivers/nouveau/nv50/nv50_context.c
+++ b/src/gallium/drivers/nouveau/nv50/nv50_context.c
@@ -138,8 +138,11 @@ nv50_destroy(struct pipe_context *pipe)
{
struct nv50_context *nv50 = nv50_context(pipe);
- if (nv50_context_screen(nv50)->cur_ctx == nv50)
- nv50_context_screen(nv50)->cur_ctx = NULL;
+ if (nv50->screen->cur_ctx == nv50) {
+ nv50->screen->cur_ctx = NULL;
+ /* Save off the state in case another context gets created */
+ nv50->screen->save_state = nv50->state;
+ }
nouveau_pushbuf_bufctx(nv50->base.pushbuf, NULL);
nouveau_pushbuf_kick(nv50->base.pushbuf, nv50->base.pushbuf->channel);
@@ -290,6 +293,10 @@ nv50_create(struct pipe_screen *pscreen, void *priv)
pipe->get_sample_position = nv50_context_get_sample_position;
if (!screen->cur_ctx) {
+ /* Restore the last context's state here, normally handled during
+ * context switch
+ */
+ nv50->state = screen->save_state;
screen->cur_ctx = nv50;
nouveau_pushbuf_bufctx(screen->base.pushbuf, nv50->bufctx);
}
diff --git a/src/gallium/drivers/nouveau/nv50/nv50_context.h b/src/gallium/drivers/nouveau/nv50/nv50_context.h
index 45eb554..1f123ef 100644
--- a/src/gallium/drivers/nouveau/nv50/nv50_context.h
+++ b/src/gallium/drivers/nouveau/nv50/nv50_context.h
@@ -104,28 +104,7 @@ struct nv50_context {
uint32_t dirty;
boolean cb_dirty;
- struct {
- uint32_t instance_elts; /* bitmask of per-instance elements */
- uint32_t instance_base;
- uint32_t interpolant_ctrl;
- uint32_t semantic_color;
- uint32_t semantic_psize;
- int32_t index_bias;
- boolean uniform_buffer_bound[3];
- boolean prim_restart;
- boolean point_sprite;
- boolean rt_serialize;
- boolean flushed;
- boolean rasterizer_discard;
- uint8_t tls_required;
- boolean new_tls_space;
- uint8_t num_vtxbufs;
- uint8_t num_vtxelts;
- uint8_t num_textures[3];
- uint8_t num_samplers[3];
- uint8_t prim_size;
- uint16_t scissor;
- } state;
+ struct nv50_graph_state state;
struct nv50_blend_stateobj *blend;
struct nv50_rasterizer_stateobj *rast;
@@ -191,12 +170,6 @@ nv50_context(struct pipe_context *pipe)
return (struct nv50_context *)pipe;
}
-static INLINE struct nv50_screen *
-nv50_context_screen(struct nv50_context *nv50)
-{
- return nv50_screen(&nv50->base.screen->base);
-}
-
/* return index used in nv50_context arrays for a specific shader type */
static INLINE unsigned
nv50_context_shader_stage(unsigned pipe)
diff --git a/src/gallium/drivers/nouveau/nv50/nv50_screen.h b/src/gallium/drivers/nouveau/nv50/nv50_screen.h
index f8ce365..881051b 100644
--- a/src/gallium/drivers/nouveau/nv50/nv50_screen.h
+++ b/src/gallium/drivers/nouveau/nv50/nv50_screen.h
@@ -25,10 +25,34 @@ struct nv50_context;
struct nv50_blitter;
+struct nv50_graph_state {
+ uint32_t instance_elts; /* bitmask of per-instance elements */
+ uint32_t instance_base;
+ uint32_t interpolant_ctrl;
+ uint32_t semantic_color;
+ uint32_t semantic_psize;
+ int32_t index_bias;
+ boolean uniform_buffer_bound[3];
+ boolean prim_restart;
+ boolean point_sprite;
+ boolean rt_serialize;
+ boolean flushed;
+ boolean rasterizer_discard;
+ uint8_t tls_required;
+ boolean new_tls_space;
+ uint8_t num_vtxbufs;
+ uint8_t num_vtxelts;
+ uint8_t num_textures[3];
+ uint8_t num_samplers[3];
+ uint8_t prim_size;
+ uint16_t scissor;
+};
+
struct nv50_screen {
struct nouveau_screen base;
struct nv50_context *cur_ctx;
+ struct nv50_graph_state save_state;
struct nouveau_bo *code;
struct nouveau_bo *uniforms;
diff --git a/src/gallium/drivers/nouveau/nv50/nv50_state_validate.c b/src/gallium/drivers/nouveau/nv50/nv50_state_validate.c
index 85e19b4..116bf4b 100644
--- a/src/gallium/drivers/nouveau/nv50/nv50_state_validate.c
+++ b/src/gallium/drivers/nouveau/nv50/nv50_state_validate.c
@@ -394,6 +394,8 @@ nv50_switch_pipe_context(struct nv50_context *ctx_to)
if (ctx_from)
ctx_to->state = ctx_from->state;
+ else
+ ctx_to->state = ctx_to->screen->save_state;
ctx_to->dirty = ~0;
ctx_to->viewports_dirty = ~0;
commit e63d65b23599fd5e65107d2e1a8bebea1d493bee
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date: Fri May 8 18:54:08 2015 -0400
nv50/ir: only propagate saturate up if some actual folding took place
The former logic would copy the saturate up to any mul with an immediate
if there was a subsequent mul with a saturate. However we only want to
do that if we collapsed 2 muls by multiplying their immediates (or were
able to put the immediate in as a post-multiplier).
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
Cc: mesa-stable at lists.freedesktop.org
(cherry picked from commit c4ac09e30e2520b0ac6d403eb6c77f23e7f24f49)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
index 9e2a933..19c53d1 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
@@ -676,6 +676,7 @@ ConstantFolding::tryCollapseChainedMULs(Instruction *mul2,
mul1->setSrc(s1, bld.loadImm(NULL, f * imm1.reg.data.f32));
mul1->src(s1).mod = Modifier(0);
mul2->def(0).replace(mul1->getDef(0), false);
+ mul1->saturate = mul2->saturate;
} else
if (prog->getTarget()->isPostMultiplySupported(OP_MUL, f, e)) {
// c = mul a, b
@@ -684,8 +685,8 @@ ConstantFolding::tryCollapseChainedMULs(Instruction *mul2,
mul2->def(0).replace(mul1->getDef(0), false);
if (f < 0)
mul1->src(0).mod *= Modifier(NV50_IR_MOD_NEG);
+ mul1->saturate = mul2->saturate;
}
- mul1->saturate = mul2->saturate;
return;
}
}
commit 4504642cccdab7f276a7fa2a8f8af0f123a6b71b
Author: Roland Scheidegger <sroland at vmware.com>
Date: Wed May 6 15:56:17 2015 +0200
draw: (trivial) fix out-of-bounds vector initialization
Was off-by-one. llvm says inserting an element with an index higher than the
number of elements yields undefined results. Previously such inserts were
ignored but as of llvm revision 235854 the vector gets replaced with undef,
causing failures.
This fixes piglit gl-3.2-layered-rendering-gl-layer, as mentioned in
https://llvm.org/bugs/show_bug.cgi?id=23424.
Reviewed-by: Brian Paul <brianp at vmware.com>
Cc: mesa-stable at lists.freedesktop.org
(cherry picked from commit b8a1495106a8b70e9026b7798a5df2fb9737c55e)
diff --git a/src/gallium/auxiliary/draw/draw_llvm.c b/src/gallium/auxiliary/draw/draw_llvm.c
index 6e1fb40..fca76a7 100644
--- a/src/gallium/auxiliary/draw/draw_llvm.c
+++ b/src/gallium/auxiliary/draw/draw_llvm.c
@@ -2049,7 +2049,7 @@ generate_mask_value(struct draw_gs_llvm_variant *variant,
num_prims = lp_build_broadcast(gallivm, lp_build_vec_type(gallivm, mask_type),
variant->num_prims);
- for (i = 0; i <= gs_type.length; i++) {
+ for (i = 0; i < gs_type.length; i++) {
LLVMValueRef idx = lp_build_const_int32(gallivm, i);
mask_val = LLVMBuildInsertElement(builder, mask_val, idx, idx, "");
}
commit be7b998a1f4d550634ba76320ba8d9ed033b50a4
Author: Tim Rowley <timothy.o.rowley at intel.com>
Date: Mon May 4 16:54:27 2015 -0500
mesa: fix shininess check for ffvertex_prog v2
Switch to using VERT_BIT_GENERIC macro, as varying_vp_inputs is a
bitmask.
Reviewed-by: Ilia Mirkin <imirkin at alum.mit.edu>
Cc: mesa-stable at lists.freedesktop.org
(cherry picked from commit ce01c0af70f2475fbbb1c3ab90d43a19047abc5c)
diff --git a/src/mesa/main/ffvertex_prog.c b/src/mesa/main/ffvertex_prog.c
index c51c20d..766afd5 100644
--- a/src/mesa/main/ffvertex_prog.c
+++ b/src/mesa/main/ffvertex_prog.c
@@ -135,7 +135,7 @@ static GLboolean check_active_shininess( struct gl_context *ctx,
(key->light_color_material_mask & (1 << attr)))
return GL_TRUE;
- if (key->varying_vp_inputs & VERT_ATTRIB_GENERIC(attr))
+ if (key->varying_vp_inputs & VERT_BIT_GENERIC(attr))
return GL_TRUE;
if (ctx->Light.Material.Attrib[attr][0] != 0.0F)
commit 8ee1a1c08b168d7583b806a2f8a2dc2ae28be62a
Author: Emil Velikov <emil.l.velikov at gmail.com>
Date: Mon May 11 22:02:03 2015 +0100
docs: Add sha256 sums for the 10.5.5 release
Signed-off-by: Emil Velikov <emil.l.velikov at gmail.com>
diff --git a/docs/relnotes/10.5.5.html b/docs/relnotes/10.5.5.html
index 06743cc..fc8247c 100644
--- a/docs/relnotes/10.5.5.html
+++ b/docs/relnotes/10.5.5.html
@@ -31,7 +31,8 @@ because compatibility contexts are not supported.
<h2>SHA256 checksums</h2>
<pre>
-TBD
+c10f00fd792b8290dd51ebcc48a9016c4cafab19ec205423c6fcadfd7f3a59f2 mesa-10.5.5.tar.gz
+4ac4e4ea3414f1cadb1467f2f173f9e56170d31e8674f7953a46f0549d319f28 mesa-10.5.5.tar.xz
</pre>
commit d88fb4050561a62fa824bec59ffedf2a826c2083
Author: Emil Velikov <emil.l.velikov at gmail.com>
Date: Mon May 11 20:19:33 2015 +0100
Add release notes for the 10.5.5 release
Signed-off-by: Emil Velikov <emil.l.velikov at gmail.com>
diff --git a/docs/relnotes/10.5.5.html b/docs/relnotes/10.5.5.html
new file mode 100644
index 0000000..06743cc
--- /dev/null
+++ b/docs/relnotes/10.5.5.html
@@ -0,0 +1,94 @@
+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
+<html lang="en">
+<head>
+ <meta http-equiv="content-type" content="text/html; charset=utf-8">
+ <title>Mesa Release Notes</title>
+ <link rel="stylesheet" type="text/css" href="../mesa.css">
+</head>
+<body>
+
+<div class="header">
+ <h1>The Mesa 3D Graphics Library</h1>
+</div>
+
+<iframe src="../contents.html"></iframe>
+<div class="content">
+
+<h1>Mesa 10.5.5 Release Notes / May 11, 2015</h1>
+
+<p>
+Mesa 10.5.5 is a bug fix release which fixes bugs found since the 10.5.4 release.
+</p>
+<p>
+Mesa 10.5.5 implements the OpenGL 3.3 API, but the version reported by
+glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
+glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
+Some drivers don't support all the features required in OpenGL 3.3. OpenGL
+3.3 is <strong>only</strong> available if requested at context creation
+because compatibility contexts are not supported.
+</p>
+
+
+<h2>SHA256 checksums</h2>
+<pre>
+TBD
+</pre>
+
+
+<h2>New features</h2>
+<p>None</p>
+
+<h2>Bug fixes</h2>
+
+<p>This list is likely incomplete.</p>
+
+<ul>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=88521">Bug 88521</a> - GLBenchmark 2.7 TRex renders with artifacts on Gen8 with !UXA</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89455">Bug 89455</a> - [NVC0/Gallium] Unigine Heaven black and white boxes</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89689">Bug 89689</a> - [Regression] Weston on DRM backend won't start with new version of mesa</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=90130">Bug 90130</a> - gl_PrimitiveId seems to reset at 340</li>
+
+</ul>
+
+
+<h2>Changes</h2>
+
+<p>Boyan Ding (1):</p>
+<ul>
+ <li>i965: Add XRGB8888 format to intel_screen_make_configs</li>
+</ul>
+
+<p>Emil Velikov (3):</p>
+<ul>
+ <li>docs: Add sha256 sums for the 10.5.4 release</li>
+ <li>r300: do not link against libdrm_intel</li>
+ <li>Update version to 10.5.5</li>
+</ul>
+
+<p>Ilia Mirkin (4):</p>
+<ul>
+ <li>nvc0/ir: flush denorms to zero in non-compute shaders</li>
+ <li>gk110/ir: fix set with a register dest to not auto-set the abs flag</li>
+ <li>nvc0/ir: fix predicated PFETCH emission</li>
+ <li>nv50/ir: fix asFlow() const helper for OP_JOIN</li>
+</ul>
+
+<p>Kenneth Graunke (2):</p>
+<ul>
+ <li>i965: Make intel_emit_linear_blit handle Gen8+ alignment restrictions.</li>
+ <li>i965: Disallow linear blits that are not cacheline aligned.</li>
+</ul>
+
+<p>Roland Scheidegger (1):</p>
+<ul>
+ <li>draw: fix prim ids when there's no gs</li>
+</ul>
+
+
+</div>
+</body>
+</html>
commit 0d425c413f24b90cc38ec2e59fd010258c4dfa1e
Author: Emil Velikov <emil.l.velikov at gmail.com>
Date: Mon May 11 20:14:23 2015 +0100
Update version to 10.5.5
Signed-off-by: Emil Velikov <emil.l.velikov at gmail.com>
diff --git a/VERSION b/VERSION
index 927fa80..23b7528 100644
--- a/VERSION
+++ b/VERSION
@@ -1 +1 @@
-10.5.4
+10.5.5
commit 536003c11e4cb1172c540932ce3cce06f03bf44e
Author: Boyan Ding <boyan.j.ding at gmail.com>
Date: Wed Mar 25 19:36:54 2015 +0800
i965: Add XRGB8888 format to intel_screen_make_configs
Some application, such as drm backend of weston, uses XRGB8888 config as
default. i965 doesn't provide this format, but before commit 65c8965d,
the drm platform of EGL takes ARGB8888 as XRGB8888. Now that commit
65c8965d makes EGL recognize format correctly so weston won't start
because it can't find XRGB8888. Add XRGB8888 format to i965 just as
other drivers do.
Cc: mesa-stable at lists.freedesktop.org
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89689
Signed-off-by: Boyan Ding <boyan.j.ding at gmail.com>
Reviewed-by: Kristian Høgsberg <krh at bitplanet.net>
(cherry picked from commit 28090b30dd6b5977de085f48c620574214b6b4ba)
diff --git a/src/mesa/drivers/dri/i965/intel_screen.c b/src/mesa/drivers/dri/i965/intel_screen.c
index cea7ddf..3497b4b 100644
--- a/src/mesa/drivers/dri/i965/intel_screen.c
+++ b/src/mesa/drivers/dri/i965/intel_screen.c
@@ -1126,7 +1126,8 @@ intel_screen_make_configs(__DRIscreen *dri_screen)
{
static const mesa_format formats[] = {
MESA_FORMAT_B5G6R5_UNORM,
- MESA_FORMAT_B8G8R8A8_UNORM
+ MESA_FORMAT_B8G8R8A8_UNORM,
+ MESA_FORMAT_B8G8R8X8_UNORM
};
/* GLX_SWAP_COPY_OML is not supported due to page flipping. */
commit 071402cc3b3e70c25a69d0add06760ec5bd2d4f4
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date: Wed Apr 29 23:33:27 2015 -0400
nv50/ir: fix asFlow() const helper for OP_JOIN
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
Cc: mesa-stable at lists.freedesktop.org
(cherry picked from commit db269ae495425849804fb1d05cfe42b0d3d304b3)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_inlines.h b/src/gallium/drivers/nouveau/codegen/nv50_ir_inlines.h
index 255324f..e465f24 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_inlines.h
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_inlines.h
@@ -302,7 +302,7 @@ FlowInstruction *Instruction::asFlow()
const FlowInstruction *Instruction::asFlow() const
{
- if (op >= OP_BRA && op <= OP_JOINAT)
+ if (op >= OP_BRA && op <= OP_JOIN)
return static_cast<const FlowInstruction *>(this);
return NULL;
}
commit b4c973da03aa6444ca9aa0907ac836bfaab3bfb8
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date: Wed Apr 29 23:05:44 2015 -0400
nvc0/ir: fix predicated PFETCH emission
src1 would contain the predicate, which would get emitted as a register
source by an undiscerning srcId helper. Work around this in the same way
as in emitTEX.
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
Cc: mesa-stable at lists.freedesktop.org
(cherry picked from commit a9d08a250ada5fbd4e3f78f8e4119ec295d692cf)
Squashed with commit
nvc0/ir: fix predicated PFETCH for real
Commit a9d08a250 accidentally didn't make use of the new src1 variable.
Use it.
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
Cc: mesa-stable at lists.freedesktop.org
(cherry picked from commit 33f0d1138d6ffa4596d3deda68fa5ba9a3d7cf86)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp
index 932ac20..0865509 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp
@@ -1265,8 +1265,10 @@ CodeEmitterGK110::emitPFETCH(const Instruction *i)
emitPredicate(i);
+ const int src1 = (i->predSrc == 1) ? 2 : 1; // if predSrc == 1, !srcExists(2)
+
defId(i->def(0), 2);
- srcId(i->src(1), 10);
+ srcId(i, src1, 10);
}
void
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp
index dfb093c..1d469b1 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp
@@ -1441,8 +1441,10 @@ CodeEmitterNVC0::emitPFETCH(const Instruction *i)
emitPredicate(i);
+ const int src1 = (i->predSrc == 1) ? 2 : 1; // if predSrc == 1, !srcExists(2)
+
defId(i->def(0), 14);
- srcId(i->src(1), 20);
+ srcId(i, src1, 20);
}
void
commit a27d03dd9f84bd29158c3b1f4512c1dee32ac3a3
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date: Wed Apr 29 18:01:53 2015 -0400
gk110/ir: fix set with a register dest to not auto-set the abs flag
This was causing src0 to always have the absolute value flag set.
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
Cc: mesa-stable at lists.freedesktop.org
(cherry picked from commit 515ac907e68ae1485bd9c65d7351dfb3c3d1e33f)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp
index a8c2619..932ac20 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp
@@ -903,7 +903,7 @@ CodeEmitterGK110::emitSET(const CmpInstruction *i)
code[0] |= 0x1c;
} else {
switch (i->sType) {
- case TYPE_F32: op2 = 0x000; op1 = 0x820; break;
+ case TYPE_F32: op2 = 0x000; op1 = 0x800; break;
case TYPE_F64: op2 = 0x080; op1 = 0x900; break;
default:
op2 = 0x1a8;
commit 0b067295916885d18de6d625ec2a036933f07bc7
Author: Emil Velikov <emil.l.velikov at gmail.com>
Date: Wed Apr 15 14:44:02 2015 +0100
r300: do not link against libdrm_intel
Accidentally added since the introduction of the file.
Cc: "10.4 10.5" <mesa-stable at lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov at gmail.com>
Reviewed-by: Marek Olšák <marek.olsak at amd.com>
(cherry picked from commit b124dc2b70a1ba546d1ce46578036d263a4287fe)
diff --git a/src/gallium/drivers/r300/Automake.inc b/src/gallium/drivers/r300/Automake.inc
index 9334973..d4ddc40 100644
--- a/src/gallium/drivers/r300/Automake.inc
+++ b/src/gallium/drivers/r300/Automake.inc
@@ -5,7 +5,7 @@ TARGET_CPPFLAGS += -DGALLIUM_R300
TARGET_LIB_DEPS += \
$(top_builddir)/src/gallium/drivers/r300/libr300.la \
$(RADEON_LIBS) \
- $(INTEL_LIBS)
+ $(LIBDRM_LIBS)
TARGET_RADEON_WINSYS = \
$(top_builddir)/src/gallium/winsys/radeon/drm/libradeonwinsys.la
commit dfe88d4f5288a39afde942b3a4c91637a79c924c
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date: Tue Apr 28 03:30:08 2015 -0400
nvc0/ir: flush denorms to zero in non-compute shaders
This will set the FTZ flag (flush denorms to zero) on all opcodes that
can take it.
This resolves issues in Unigine Heaven 4.0 where there were solid-filled
boxes popping up.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89455
Cc: "10.4 10.5" <mesa-stable at lists.freedesktop.org>
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
(cherry picked from commit 6fe0d4f0354418c6e68dd352996e9891ddd4dfd6)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
index c234131..4000812 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
@@ -73,6 +73,26 @@ NVC0LegalizeSSA::handleRCPRSQ(Instruction *i)
// TODO
}
+void
+NVC0LegalizeSSA::handleFTZ(Instruction *i)
+{
+ // Only want to flush float inputs
+ if (i->sType != TYPE_F32)
+ return;
+
+ // If we're already flushing denorms (and NaN's) to zero, no need for this.
+ if (i->dnz)
+ return;
+
+ // Only certain classes of operations can flush
+ OpClass cls = prog->getTarget()->getOpClass(i->op);
+ if (cls != OPCLASS_ARITH && cls != OPCLASS_COMPARE &&
+ cls != OPCLASS_CONVERT)
+ return;
+
+ i->ftz = true;
+}
+
bool
NVC0LegalizeSSA::visit(Function *fn)
{
@@ -86,8 +106,11 @@ NVC0LegalizeSSA::visit(BasicBlock *bb)
Instruction *next;
for (Instruction *i = bb->getEntry(); i; i = next) {
next = i->next;
- if (i->dType == TYPE_F32)
+ if (i->dType == TYPE_F32) {
+ if (prog->getType() != Program::TYPE_COMPUTE)
+ handleFTZ(i);
continue;
+ }
switch (i->op) {
case OP_DIV:
case OP_MOD:
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.h b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.h
index d8ff5cd..260e101 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.h
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.h
@@ -36,6 +36,7 @@ private:
// we want to insert calls to the builtin library only after optimization
void handleDIV(Instruction *); // integer division, modulus
void handleRCPRSQ(Instruction *); // double precision float recip/rsqrt
+ void handleFTZ(Instruction *);
private:
BuildUtil bld;
commit 1176e5862ac656f1c1a790ea5b49ced4fcb3f480
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Tue Apr 21 12:32:38 2015 -0700
i965: Disallow linear blits that are not cacheline aligned.
The BLT engine on Gen8+ requires linear surfaces to be cacheline
aligned. This restriction was added as part of converting the BLT to
use 48-bit addressing.
The main user, intel_emit_linear_blit, now handles this properly.
But we might also have linear miptrees; just refuse to blit those.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=88521
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat at gmail.com>
Cc: mesa-stable at lists.freedesktop.org
(cherry picked from commit 5957da1edb9ad504d8af83878c10c3a24e41fc6c)
diff --git a/src/mesa/drivers/dri/i965/intel_blit.c b/src/mesa/drivers/dri/i965/intel_blit.c
index 770acf3..7252e5d 100644
--- a/src/mesa/drivers/dri/i965/intel_blit.c
+++ b/src/mesa/drivers/dri/i965/intel_blit.c
@@ -271,6 +271,20 @@ intel_miptree_blit(struct brw_context *brw,
return true;
}
+static bool
+alignment_valid(struct brw_context *brw, unsigned offset, uint32_t tiling)
+{
+ /* Tiled buffers must be page-aligned (4K). */
+ if (tiling != I915_TILING_NONE)
+ return (offset & 4095) == 0;
+
+ /* On Gen8+, linear buffers must be cacheline-aligned. */
+ if (brw->gen >= 8)
+ return (offset & 63) == 0;
+
+ return true;
+}
+
/* Copy BitBlt
*/
bool
@@ -296,14 +310,11 @@ intelEmitCopyBlit(struct brw_context *brw,
bool dst_y_tiled = dst_tiling == I915_TILING_Y;
bool src_y_tiled = src_tiling == I915_TILING_Y;
- if (dst_tiling != I915_TILING_NONE) {
- if (dst_offset & 4095)
- return false;
- }
- if (src_tiling != I915_TILING_NONE) {
- if (src_offset & 4095)
- return false;
- }
+ if (!alignment_valid(brw, dst_offset, dst_tiling))
+ return false;
+ if (!alignment_valid(brw, src_offset, src_tiling))
+ return false;
+
if ((dst_y_tiled || src_y_tiled) && brw->gen < 6)
return false;
commit 716b5f7cbe9cb7611d593f170a98facef58e3d0a
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Wed Apr 15 03:04:33 2015 -0700
i965: Make intel_emit_linear_blit handle Gen8+ alignment restrictions.
The BLT engine on Gen8+ requires linear surfaces to be cacheline
aligned. This restriction was added as part of converting the BLT to
use 48-bit addressing.
intel_emit_linear_blit needs to handle blits that are not cacheline
aligned, as we use it for arbitrary glBufferSubData calls and subrange
mappings.
Since intel_emit_linear_blit uses 1 byte per pixel, we can use the src/dst
pixel X offset field to represent the unaligned portion, and subtract
that from the address so it's cacheline aligned.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=88521
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat at gmail.com>
Cc: mesa-stable at lists.freedesktop.org
(cherry picked from commit 8c17d53823c77ac1c56b0548e4e54f69a33285f1)
diff --git a/src/mesa/drivers/dri/i965/intel_blit.c b/src/mesa/drivers/dri/i965/intel_blit.c
index 9500bd7..770acf3 100644
--- a/src/mesa/drivers/dri/i965/intel_blit.c
+++ b/src/mesa/drivers/dri/i965/intel_blit.c
@@ -524,6 +524,7 @@ intel_emit_linear_blit(struct brw_context *brw,
{
struct gl_context *ctx = &brw->ctx;
GLuint pitch, height;
+ int16_t src_x, dst_x;
bool ok;
/* The pitch given to the GPU must be DWORD aligned, and
@@ -532,11 +533,13 @@ intel_emit_linear_blit(struct brw_context *brw,
*/
pitch = ROUND_DOWN_TO(MIN2(size, (1 << 15) - 1), 4);
height = (pitch == 0) ? 1 : size / pitch;
+ src_x = src_offset % 64;
+ dst_x = dst_offset % 64;
ok = intelEmitCopyBlit(brw, 1,
- pitch, src_bo, src_offset, I915_TILING_NONE,
- pitch, dst_bo, dst_offset, I915_TILING_NONE,
- 0, 0, /* src x/y */
- 0, 0, /* dst x/y */
+ pitch, src_bo, src_offset - src_x, I915_TILING_NONE,
+ pitch, dst_bo, dst_offset - dst_x, I915_TILING_NONE,
+ src_x, 0, /* src x/y */
+ dst_x, 0, /* dst x/y */
pitch, height, /* w, h */
GL_COPY);
if (!ok)
@@ -544,15 +547,18 @@ intel_emit_linear_blit(struct brw_context *brw,
src_offset += pitch * height;
dst_offset += pitch * height;
+ src_x = src_offset % 64;
+ dst_x = dst_offset % 64;
size -= pitch * height;
assert (size < (1 << 15));
pitch = ALIGN(size, 4);
+
if (size != 0) {
ok = intelEmitCopyBlit(brw, 1,
- pitch, src_bo, src_offset, I915_TILING_NONE,
- pitch, dst_bo, dst_offset, I915_TILING_NONE,
- 0, 0, /* src x/y */
- 0, 0, /* dst x/y */
+ pitch, src_bo, src_offset - src_x, I915_TILING_NONE,
+ pitch, dst_bo, dst_offset - dst_x, I915_TILING_NONE,
+ src_x, 0, /* src x/y */
+ dst_x, 0, /* dst x/y */
size, 1, /* w, h */
GL_COPY);
if (!ok)
commit cf60503378f75ef2e9079092a0e6d26a589336dc
Author: Roland Scheidegger <sroland at vmware.com>
Date: Thu Apr 23 18:13:32 2015 +0200
draw: fix prim ids when there's no gs
We were resetting the prim id count for each run of the prim assembler,
hence this only worked when the draw calls were very small (the exact limit
depending on the vertex size), since larger draw calls get split up.
So, do the same as we do already if there's a gs, reset it to zero explicitly
for every new instance (this possibly could use the same variable but that
isn't doable without some heavy refactoring and I'm not sure it makes sense).
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90130.
Reviewed-by: Jose Fonseca <jfonseca at vmware.com>
CC: <mesa-stable at lists.freedesktop.org>
(cherry picked from commit f2a7fd9943fcb7d3de3bc2b21907e0a157b88e96)
diff --git a/src/gallium/auxiliary/draw/draw_context.c b/src/gallium/auxiliary/draw/draw_context.c
index 04cf5b7..ee009c1 100644
--- a/src/gallium/auxiliary/draw/draw_context.c
+++ b/src/gallium/auxiliary/draw/draw_context.c
@@ -182,6 +182,7 @@ boolean draw_init(struct draw_context *draw)
void draw_new_instance(struct draw_context *draw)
{
draw_geometry_shader_new_instance(draw->gs.geometry_shader);
+ draw_prim_assembler_new_instance(draw->ia);
}
diff --git a/src/gallium/auxiliary/draw/draw_prim_assembler.c b/src/gallium/auxiliary/draw/draw_prim_assembler.c
index 776c172..7ff705a 100644
--- a/src/gallium/auxiliary/draw/draw_prim_assembler.c
+++ b/src/gallium/auxiliary/draw/draw_prim_assembler.c
@@ -189,7 +189,6 @@ draw_prim_assembler_prepare_outputs(struct draw_assembler *ia)
} else {
ia->primid_slot = -1;
}
- ia->primid = 0;
}
@@ -233,7 +232,6 @@ draw_prim_assembler_run(struct draw_context *draw,
asmblr->input_prims = input_prims;
asmblr->input_verts = input_verts;
asmblr->needs_primid = needs_primid(asmblr->draw);
- asmblr->primid = 0;
asmblr->num_prims = 0;
output_prims->linear = TRUE;
@@ -284,3 +282,14 @@ draw_prim_assembler_destroy(struct draw_assembler *ia)
{
FREE(ia);
}
+
+
+/*
+ * Called at the very begin of the draw call with a new instance
+ * Used to reset state that should persist between primitive restart.
+ */
+void
+draw_prim_assembler_new_instance(struct draw_assembler *asmblr)
+{
+ asmblr->primid = 0;
+}
diff --git a/src/gallium/auxiliary/draw/draw_prim_assembler.h b/src/gallium/auxiliary/draw/draw_prim_assembler.h
index 5ba715b..5ee7317 100644
--- a/src/gallium/auxiliary/draw/draw_prim_assembler.h
+++ b/src/gallium/auxiliary/draw/draw_prim_assembler.h
@@ -70,5 +70,8 @@ draw_prim_assembler_run(struct draw_context *draw,
void
draw_prim_assembler_prepare_outputs(struct draw_assembler *ia);
+void
+draw_prim_assembler_new_instance(struct draw_assembler *ia);
+
#endif
commit adb47b5b279b6fd920151aa7926af6ffd2069339
Author: Emil Velikov <emil.l.velikov at gmail.com>
Date: Fri Apr 24 22:51:25 2015 +0100
docs: Add sha256 sums for the 10.5.4 release
Signed-off-by: Emil Velikov <emil.l.velikov at gmail.com>
diff --git a/docs/relnotes/10.5.4.html b/docs/relnotes/10.5.4.html
index 78767cc..4c466d0 100644
--- a/docs/relnotes/10.5.4.html
+++ b/docs/relnotes/10.5.4.html
@@ -31,7 +31,8 @@ because compatibility contexts are not supported.
<h2>SHA256 checksums</h2>
<pre>
-TBD
+e1089567fc7bf8d9b2d8badcc9f2fc3b758701c8c0ccfe7af1805549fea53f11 mesa-10.5.4.tar.gz
+b51e723f3a20d842c88a92d809435b229fc4744ca0dbec0317d9d4a3ac4c6803 mesa-10.5.4.tar.xz
</pre>
commit ea0d1f575c214c09ba3df12644a960e86e031766
Author: Emil Velikov <emil.l.velikov at gmail.com>
Date: Fri Apr 24 22:27:09 2015 +0100
Add release notes for the 10.5.4 release
Signed-off-by: Emil Velikov <emil.l.velikov at gmail.com>
diff --git a/docs/relnotes/10.5.4.html b/docs/relnotes/10.5.4.html
new file mode 100644
index 0000000..78767cc
--- /dev/null
+++ b/docs/relnotes/10.5.4.html
@@ -0,0 +1,124 @@
+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
+<html lang="en">
+<head>
+ <meta http-equiv="content-type" content="text/html; charset=utf-8">
+ <title>Mesa Release Notes</title>
+ <link rel="stylesheet" type="text/css" href="../mesa.css">
+</head>
+<body>
+
+<div class="header">
+ <h1>The Mesa 3D Graphics Library</h1>
+</div>
+
+<iframe src="../contents.html"></iframe>
+<div class="content">
+
+<h1>Mesa 10.5.4 Release Notes / April 24, 2015</h1>
+
+<p>
+Mesa 10.5.4 is a bug fix release which fixes bugs found since the 10.5.3 release.
+</p>
+<p>
+Mesa 10.5.4 implements the OpenGL 3.3 API, but the version reported by
+glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
+glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
+Some drivers don't support all the features required in OpenGL 3.3. OpenGL
+3.3 is <strong>only</strong> available if requested at context creation
+because compatibility contexts are not supported.
+</p>
+
+
+<h2>SHA256 checksums</h2>
+<pre>
+TBD
+</pre>
+
+
+<h2>New features</h2>
+<p>None</p>
+
+<h2>Bug fixes</h2>
+
+<p>This list is likely incomplete.</p>
+
+<ul>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=69226">Bug 69226</a> - Cannot enable basic shaders with Second Life aborts attempt</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=71591">Bug 71591</a> - Second Life shaders fail to compile (extension declared in middle of shader)</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=81025">Bug 81025</a> - [IVB/BYT Bisected]Piglit spec_ARB_draw_indirect_arb_draw_indirect-draw-elements-prim-restart-ugly fails</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89457">Bug 89457</a> - [BSW Bisected]ogles3conform ES3-CTS.gtf.GL3Tests.shadow.shadow_execution_vert fails</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89957">Bug 89957</a> - vm protection faults in piglit lest: texsubimage cube_map_array pbo</li>
+
+</ul>
+
+
+<h2>Changes</h2>
+
+<p>Brian Paul (1):</p>
+<ul>
+ <li>glsl: rewrite glsl_type::record_key_hash() to avoid buffer overflow</li>
+</ul>
+
+<p>Dave Airlie (2):</p>
+<ul>
+ <li>st/mesa: convert sub image for cube map arrays to 2d arrays for upload</li>
+ <li>st/mesa: align cube map arrays layers</li>
+</ul>
+
+<p>Emil Velikov (11):</p>
+<ul>
+ <li>docs: Add 256 sums for the 10.5.3 release</li>
+ <li>radeonsi: remove unused si_dump_key()</li>
+ <li>android: use LOCAL_SHARED_LIBRARIES over TARGET_OUT_HEADERS</li>
+ <li>android: add $(mesa_top)/src include to the whole of mesa</li>
+ <li>android: egl: add libsync_cflags to the build</li>
+ <li>android: dri/common: conditionally include drm_cflags/set __NOT_HAVE_DRM_H</li>
+ <li>android: add HAVE__BUILTIN_* and HAVE_FUNC_ATTRIBUTE_* defines</li>
+ <li>android: add $(mesa_top)/src/mesa/main to the includes list</li>
+ <li>android: dri: link against libmesa_util</li>
+ <li>android: mesa: fix the path of the SSE4_1 optimisations</li>
+ <li>Update version to 10.5.4</li>
+</ul>
+
+<p>Ian Romanick (1):</p>
+<ul>
+ <li>nir: Fix typo in "ushr by 0" algebraic replacement</li>
+</ul>
+
+<p>Kenneth Graunke (2):</p>
+<ul>
+ <li>i965: Fix software primitive restart with indirect draws.</li>
+ <li>drirc: Add "Second Life" quirk (allow_glsl_extension_directive_midshader).</li>
+</ul>
+
+<p>Kristian Høgsberg (1):</p>
+<ul>
+ <li>i965: Rewrite ir_tex to ir_txl with lod 0 for vertex shaders</li>
+</ul>
+
+<p>Marek Olšák (2):</p>
+<ul>
+ <li>glsl_to_tgsi: fix out-of-bounds constant access and crash for uniforms</li>
+ <li>glsl_to_tgsi: don't use a potentially-undefined immediate for ir_query_levels</li>
+</ul>
+
+<p>Mathias Froehlich (1):</p>
+<ul>
+ <li>i965: Flush batchbuffer containing the query on glQueryCounter.</li>
+</ul>
+
+<p>Mauro Rossi (2):</p>
+<ul>
+ <li>android: mesa: generate the format_{un,}pack.[ch] sources</li>
+ <li>android: add inital NIR build</li>
+</ul>
+
+
+</div>
+</body>
+</html>
commit 776e47a305d33ec04a05ac2d81691b884baa9e62
Author: Emil Velikov <emil.l.velikov at gmail.com>
Date: Fri Apr 24 22:22:47 2015 +0100
Update version to 10.5.4
Signed-off-by: Emil Velikov <emil.l.velikov at gmail.com>
diff --git a/VERSION b/VERSION
index 1e9c35f..927fa80 100644
--- a/VERSION
+++ b/VERSION
@@ -1 +1 @@
-10.5.3
+10.5.4
commit e2dd5546517dd8d3b6790cea3c74c038629256b4
Author: Brian Paul <brianp at vmware.com>
Date: Thu Apr 16 15:29:18 2015 -0600
glsl: rewrite glsl_type::record_key_hash() to avoid buffer overflow
This should be more efficient than the previous snprintf() solution.
But more importantly, it avoids a buffer overflow bug that could result
in crashes or unpredictable results when processing very large interface
blocks.
For the app in question, key->length = 103 for some interfaces. The check
if size >= sizeof(hash_key) was insufficient to prevent overflows of the
hash_key[128] array because it didn't account for the terminating zero.
In this case, this caused the call to hash_table_string_hash() to return
different results for identical inputs, and then shader linking failed.
This new solution also takes all structure fields into account instead
of just the first 15 when sizeof(pointer)==8.
Cc: mesa-stable at lists.freedesktop.org
Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
(cherry picked from commit 31667e6237d30188d0b29e17f5b9892f10c0d83a)
diff --git a/src/glsl/glsl_types.cpp b/src/glsl/glsl_types.cpp
index b4223f4..970bcd8 100644
--- a/src/glsl/glsl_types.cpp
+++ b/src/glsl/glsl_types.cpp
@@ -690,24 +690,27 @@ glsl_type::record_key_compare(const void *a, const void *b)
}
+/**
+ * Generate an integer hash value for a glsl_type structure type.
+ */
unsigned
glsl_type::record_key_hash(const void *a)
{
const glsl_type *const key = (glsl_type *) a;
- char hash_key[128];
- unsigned size = 0;
-
- size = snprintf(hash_key, sizeof(hash_key), "%08x", key->length);
+ uintptr_t hash = key->length;
+ unsigned retval;
for (unsigned i = 0; i < key->length; i++) {
- if (size >= sizeof(hash_key))
- break;
-
- size += snprintf(& hash_key[size], sizeof(hash_key) - size,
- "%p", (void *) key->fields.structure[i].type);
+ /* casting pointer to uintptr_t */
+ hash = (hash * 13 ) + (uintptr_t) key->fields.structure[i].type;
}
- return hash_table_string_hash(& hash_key);
+ if (sizeof(hash) == 8)
+ retval = (hash & 0xffffffff) ^ ((uint64_t) hash >> 32);
+ else
+ retval = hash;
+
+ return retval;
}
commit 0f5ec7250d3e19eda1121f1bf3f340aedcc26dc5
Author: Emil Velikov <emil.l.velikov at gmail.com>
Date: Sat Mar 28 18:23:01 2015 +0000
android: mesa: fix the path of the SSE4_1 optimisations
Commit dd6f641303c(mesa: Build with subdir-objects.) removed the SRCDIR
variable, but forgot to update all references of it.
v2: Fix path - must be relative to LOCAL_PATH. (Chih-Wei)
Cc: "10.5" <mesa-stable at lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov at gmail.com>
Reviewed-by: Chih-Wei Huang <cwhuang at linux.org.tw>
(cherry picked from commit 669cfc267a1102ff903b3e562f9aa45a410e0312)
diff --git a/src/mesa/Android.libmesa_dricore.mk b/src/mesa/Android.libmesa_dricore.mk
index c0770ca..c684017 100644
--- a/src/mesa/Android.libmesa_dricore.mk
+++ b/src/mesa/Android.libmesa_dricore.mk
@@ -49,8 +49,8 @@ endif # MESA_ENABLE_ASM
ifeq ($(ARCH_X86_HAVE_SSE4_1),true)
LOCAL_SRC_FILES += \
- $(SRCDIR)main/streaming-load-memcpy.c \
- $(SRCDIR)main/sse_minmax.c
+ main/streaming-load-memcpy.c \
+ mesa/main/sse_minmax.c
LOCAL_CFLAGS := -msse4.1
endif
commit a2785a23e694df2213c9afe6d6f062cc366d24f1
Author: Mauro Rossi <issor.oruam at gmail.com>
Date: Fri Mar 27 22:25:45 2015 +0000
android: add inital NIR build
Required by the i965 driver.
v2:
- Split out the nir_builder_opcodes.h rules.
- Do not unconditionally hide the python command - use $(hide)
- Use LOCAL_EXPORT_C_INCLUDE_DIRS to manage includes for the generated
sources.
Cc: "10.5" <mesa-stable at lists.freedesktop.org>
[Emil Velikov: Split from a larger commit, v2]
Signed-off-by: Emil Velikov <emil.l.velikov at gmail.com>
Reviewed-by: Chih-Wei Huang <cwhuang at linux.org.tw>
(cherry picked from commit 06619749a11651a50e353168c7c793082820585d)
diff --git a/src/glsl/Android.gen.mk b/src/glsl/Android.gen.mk
index 7ec56d4..e161bd8 100644
--- a/src/glsl/Android.gen.mk
+++ b/src/glsl/Android.gen.mk
@@ -33,11 +33,23 @@ sources := \
glsl_lexer.cpp \
glsl_parser.cpp \
glcpp/glcpp-lex.c \
- glcpp/glcpp-parse.c
+ glcpp/glcpp-parse.c \
+ nir/nir_constant_expressions.c \
+ nir/nir_opcodes.c \
+ nir/nir_opcodes.h \
+ nir/nir_opt_algebraic.c
LOCAL_SRC_FILES := $(filter-out $(sources), $(LOCAL_SRC_FILES))
-LOCAL_C_INCLUDES += $(intermediates) $(intermediates)/glcpp $(MESA_TOP)/src/glsl/glcpp
+LOCAL_C_INCLUDES += \
+ $(intermediates) \
+ $(intermediates)/glcpp \
+ $(intermediates)/nir \
+ $(MESA_TOP)/src/glsl/glcpp \
+ $(MESA_TOP)/src/glsl/nir
+
+LOCAL_EXPORT_C_INCLUDE_DIRS += \
+ $(intermediates)/nir
sources := $(addprefix $(intermediates)/, $(sources))
LOCAL_GENERATED_SOURCES += $(sources)
@@ -77,3 +89,42 @@ $(intermediates)/glcpp/glcpp-lex.c: $(LOCAL_PATH)/glcpp/glcpp-lex.l
$(intermediates)/glcpp/glcpp-parse.c: $(LOCAL_PATH)/glcpp/glcpp-parse.y
$(call glsl_local-y-to-c-and-h)
+
+nir_constant_expressions_gen := $(LOCAL_PATH)/nir/nir_constant_expressions.py
+nir_constant_expressions_deps := \
+ $(LOCAL_PATH)/nir/nir_opcodes.py \
+ $(LOCAL_PATH)/nir/nir_constant_expressions.py \
+ $(LOCAL_PATH)/nir/nir_constant_expressions.h
+
+$(intermediates)/nir/nir_constant_expressions.c: $(nir_constant_expressions_deps)
+ @mkdir -p $(dir $@)
+ $(hide) $(MESA_PYTHON2) $(nir_constant_expressions_gen) $< > $@
+
+nir_opcodes_h_gen := $(LOCAL_PATH)/nir/nir_opcodes_h.py
+nir_opcodes_h_deps := \
+ $(LOCAL_PATH)/nir/nir_opcodes.py \
+ $(LOCAL_PATH)/nir/nir_opcodes_h.py
+
+$(intermediates)/nir/nir_opcodes.h: $(nir_opcodes_h_deps)
+ @mkdir -p $(dir $@)
+ $(hide) $(MESA_PYTHON2) $(nir_opcodes_h_gen) $< > $@
+
+$(LOCAL_PATH)/nir/nir.h: $(intermediates)/nir/nir_opcodes.h
+
+nir_opcodes_c_gen := $(LOCAL_PATH)/nir/nir_opcodes_c.py
+nir_opcodes_c_deps := \
+ $(LOCAL_PATH)/nir/nir_opcodes.py \
+ $(LOCAL_PATH)/nir/nir_opcodes_c.py
+
+$(intermediates)/nir/nir_opcodes.c: $(nir_opcodes_c_deps)
+ @mkdir -p $(dir $@)
+ $(hide) $(MESA_PYTHON2) $(nir_opcodes_c_gen) $< > $@
+
+nir_opt_algebraic_gen := $(LOCAL_PATH)/nir/nir_opt_algebraic.py
+nir_opt_algebraic_deps := \
+ $(LOCAL_PATH)/nir/nir_opt_algebraic.py \
+ $(LOCAL_PATH)/nir/nir_algebraic.py
+
+$(intermediates)/nir/nir_opt_algebraic.c: $(nir_opt_algebraic_deps)
+ @mkdir -p $(dir $@)
+ $(hide) $(MESA_PYTHON2) $(nir_opt_algebraic_gen) $< > $@
diff --git a/src/glsl/Android.mk b/src/glsl/Android.mk
index 2ac1ffb..b5c05ab 100644
--- a/src/glsl/Android.mk
+++ b/src/glsl/Android.mk
@@ -35,7 +35,8 @@ include $(CLEAR_VARS)
LOCAL_SRC_FILES := \
$(LIBGLCPP_FILES) \
- $(LIBGLSL_FILES)
+ $(LIBGLSL_FILES) \
+ $(NIR_FILES)
LOCAL_C_INCLUDES := \
$(MESA_TOP)/src/mapi \
commit 2ad5a068faa9f9cbd789d3a988a14f973a5f8720
Author: Emil Velikov <emil.l.velikov at gmail.com>
Date: Fri Mar 27 21:39:15 2015 +0000
android: dri: link against libmesa_util
The dri modules depend on symbols provided by it.
Cc: "10.5" <mesa-stable at lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov at gmail.com>
Reviewed-by: Chih-Wei Huang <cwhuang at linux.org.tw>
(cherry picked from commit 618885f71fcacb3d68bf37fa23be36830d4178d2)
diff --git a/src/mesa/drivers/dri/Android.mk b/src/mesa/drivers/dri/Android.mk
index e168fe0..ab347fa 100644
--- a/src/mesa/drivers/dri/Android.mk
+++ b/src/mesa/drivers/dri/Android.mk
@@ -43,7 +43,8 @@ MESA_DRI_WHOLE_STATIC_LIBRARIES := \
libmesa_glsl \
libmesa_megadriver_stub \
libmesa_dri_common \
- libmesa_dricore
+ libmesa_dricore \
+ libmesa_util
MESA_DRI_SHARED_LIBRARIES := \
libcutils \
commit 1dfbc95b7664d3f52179870c016477d0ea950c91
Author: Emil Velikov <emil.l.velikov at gmail.com>
Date: Sat Mar 28 01:11:54 2015 +0000
android: add $(mesa_top)/src/mesa/main to the includes list
Required by the format_{un,}pack rework. Otherwise the build will fail
to locate the respective headers - format_{un,}pack.h
Cc: "10.5" <mesa-stable at lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov at gmail.com>
Reviewed-by: Chih-Wei Huang <cwhuang at linux.org.tw>
(cherry picked from commit 0afbd2df0485cd480979d9f4cdae00262d1a3c62)
diff --git a/src/mesa/Android.libmesa_dricore.mk b/src/mesa/Android.libmesa_dricore.mk
index 73afcc7..c0770ca 100644
--- a/src/mesa/Android.libmesa_dricore.mk
+++ b/src/mesa/Android.libmesa_dricore.mk
@@ -62,6 +62,7 @@ endif
LOCAL_C_INCLUDES := \
$(call intermediates-dir-for STATIC_LIBRARIES,libmesa_program,,) \
$(MESA_TOP)/src/mapi \
+ $(MESA_TOP)/src/mesa/main \
$(MESA_TOP)/src/glsl \
$(MESA_TOP)/src/gallium/auxiliary
diff --git a/src/mesa/Android.libmesa_st_mesa.mk b/src/mesa/Android.libmesa_st_mesa.mk
index fdf847a..e02030b 100644
--- a/src/mesa/Android.libmesa_st_mesa.mk
+++ b/src/mesa/Android.libmesa_st_mesa.mk
@@ -53,10 +53,11 @@ endif
LOCAL_C_INCLUDES := \
$(call intermediates-dir-for STATIC_LIBRARIES,libmesa_program,,) \
- $(MESA_TOP)/src/gallium/auxiliary \
- $(MESA_TOP)/src/gallium/include \
+ $(MESA_TOP)/src/mapi \
+ $(MESA_TOP)/src/mesa/main \
$(MESA_TOP)/src/glsl \
- $(MESA_TOP)/src/mapi
+ $(MESA_TOP)/src/gallium/auxiliary \
+ $(MESA_TOP)/src/gallium/include
LOCAL_WHOLE_STATIC_LIBRARIES := \
libmesa_program
commit 215f28c695f8902a609ff01e1cbfbe2fa8783adc
Author: Emil Velikov <emil.l.velikov at gmail.com>
Date: Fri Mar 27 20:10:35 2015 +0000
android: add HAVE__BUILTIN_* and HAVE_FUNC_ATTRIBUTE_* defines
All of those are available on gcc 4.5 and later with the current android
build using gcc 4.7.
Cc: "10.4 10.5" <mesa-stable at lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov at gmail.com>
Reviewed-by: Chih-Wei Huang <cwhuang at linux.org.tw>
(cherry picked from commit 39a175e0c792f569dfe73de1b4d01b0caea43a01)
diff --git a/Android.common.mk b/Android.common.mk
index ca62f79..527fe2f 100644
--- a/Android.common.mk
+++ b/Android.common.mk
@@ -42,6 +42,19 @@ LOCAL_CFLAGS += \
-DANDROID_VERSION=0x0$(MESA_ANDROID_MAJOR_VERSION)0$(MESA_ANDROID_MINOR_VERSION)
LOCAL_CFLAGS += \
+ -DHAVE___BUILTIN_EXPECT \
+ -DHAVE___BUILTIN_FFS \
+ -DHAVE___BUILTIN_FFSLL \
+ -DHAVE_FUNC_ATTRIBUTE_FLATTEN \
+ -DHAVE_FUNC_ATTRIBUTE_UNUSED \
+ -DHAVE_FUNC_ATTRIBUTE_FORMAT \
+ -DHAVE_FUNC_ATTRIBUTE_PACKED \
+ -DHAVE___BUILTIN_CTZ \
+ -DHAVE___BUILTIN_POPCOUNT \
+ -DHAVE___BUILTIN_POPCOUNTLL \
+ -DHAVE___BUILTIN_CLZ \
+ -DHAVE___BUILTIN_CLZLL \
+ -DHAVE___BUILTIN_UNREACHABLE \
-DHAVE_PTHREAD=1 \
-fvisibility=hidden \
-Wno-sign-compare
commit 95633d09e82116a6e502ac53d4563bca1bcc9e8f
Author: Emil Velikov <emil.l.velikov at gmail.com>
Date: Fri Mar 27 18:57:46 2015 +0000
android: dri/common: conditionally include drm_cflags/set __NOT_HAVE_DRM_H
Otherwise we'll fail to find the drm.h header.
Cc: "10.4 10.5" <mesa-stable at lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov at gmail.com>
(cherry picked from commit 8d90bfb724f89b04d703f869362cf2fc2a3d7567)
diff --git a/src/mesa/drivers/dri/common/Android.mk b/src/mesa/drivers/dri/common/Android.mk
index b95feb6..03ea564 100644
--- a/src/mesa/drivers/dri/common/Android.mk
+++ b/src/mesa/drivers/dri/common/Android.mk
@@ -40,6 +40,13 @@ LOCAL_C_INCLUDES := \
$(intermediates) \
$(MESA_DRI_C_INCLUDES)
+# swrast only
+ifeq ($(MESA_GPU_DRIVERS),swrast)
+LOCAL_CFLAGS := -D__NOT_HAVE_DRM_H
+else
+LOCAL_SHARED_LIBRARIES := libdrm
+endif
+
LOCAL_SRC_FILES := $(DRI_COMMON_FILES)
LOCAL_GENERATED_SOURCES := \
@@ -99,6 +106,13 @@ LOCAL_MODULE_CLASS := STATIC_LIBRARIES
LOCAL_C_INCLUDES := \
$(MESA_DRI_C_INCLUDES)
+# swrast only
+ifeq ($(MESA_GPU_DRIVERS),swrast)
+LOCAL_CFLAGS := -D__NOT_HAVE_DRM_H
+else
+LOCAL_SHARED_LIBRARIES := libdrm
+endif
+
LOCAL_SRC_FILES := $(megadriver_stub_FILES)
include $(MESA_COMMON_MK)
commit 33c6a4c018976a673df7e94df5d43ea40369f878
Author: Emil Velikov <emil.l.velikov at gmail.com>
Date: Fri Mar 27 18:36:10 2015 +0000
android: egl: add libsync_cflags to the build
... via local_shared_libraries. Otherwise the sync/sync.h header won't
be found.
Note: 10.5 and earlier will need similar change in st/egl.
v2: Append the library to the local_shared_libraries list. (Chih-Wei)
Cc: "10.4 10.5" <mesa-stable at lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov at gmail.com>
Reviewed-by: Chih-Wei Huang <cwhuang at linux.org.tw>
(cherry picked from commit 2d06791f6f9e8ab37109be52e63d247bbbcb42d4)
diff --git a/src/egl/drivers/dri2/Android.mk b/src/egl/drivers/dri2/Android.mk
index d5ac8ee..d48506a 100644
--- a/src/egl/drivers/dri2/Android.mk
+++ b/src/egl/drivers/dri2/Android.mk
@@ -46,6 +46,12 @@ LOCAL_STATIC_LIBRARIES := \
libmesa_loader
LOCAL_SHARED_LIBRARIES := libdrm
+
+ifeq ($(shell echo "$(MESA_ANDROID_VERSION) >= 4.2" | bc),1)
+LOCAL_SHARED_LIBRARIES += \
+ libsync
+endif
+
LOCAL_MODULE := libmesa_egl_dri2
include $(MESA_COMMON_MK)
commit 548fc14d362fd4ea49e0742aaaf1de04184f93d0
Author: Mauro Rossi <issor.oruam at gmail.com>
Date: Fri Mar 27 18:20:53 2015 +0000
android: mesa: generate the format_{un,}pack.[ch] sources
Missed out with commit e1fdcddafe9(mesa: Autogenerate format_unpack.c)
v2: Conditionaly print the python commands - s/@/$(hide) / (Chih-Wei)
Cc: "10.5" <mesa-stable at lists.freedesktop.org>
[Emil Velikov: Split our from a larger commit.]
Signed-off-by: Emil Velikov <emil.l.velikov at gmail.com>
(cherry picked from commit 5f7081eb90bc5a25f0740314fa22e04d189238ca)
diff --git a/src/mesa/Android.gen.mk b/src/mesa/Android.gen.mk
index caae2c1..c7a4f6b 100644
--- a/src/mesa/Android.gen.mk
+++ b/src/mesa/Android.gen.mk
@@ -34,6 +34,9 @@ sources := \
main/enums.c \
main/api_exec.c \
main/dispatch.h \
+ main/format_pack.c \
+ main/format_unpack.c \
+ main/format_info.h \
main/remap_helper.h \
main/get_hash.h
@@ -124,3 +127,21 @@ format_info_deps := \
$(intermediates)/main/format_info.h: $(format_info_deps)
@$(MESA_PYTHON2) $(FORMAT_INFO) $< > $@
+
+FORMAT_PACK := $(LOCAL_PATH)/main/format_pack.py
+format_pack_deps := \
+ $(LOCAL_PATH)/main/formats.csv \
+ $(LOCAL_PATH)/main/format_parser.py \
+ $(FORMAT_PACK)
+
+$(intermediates)/main/format_pack.c: $(format_pack_deps)
+ $(hide) $(MESA_PYTHON2) $(FORMAT_PACK) $< > $@
+
+FORMAT_UNPACK := $(LOCAL_PATH)/main/format_unpack.py
+format_unpack_deps := \
+ $(LOCAL_PATH)/main/formats.csv \
+ $(LOCAL_PATH)/main/format_parser.py \
+ $(FORMAT_UNPACK)
+
+$(intermediates)/main/format_unpack.c: $(format_unpack_deps)
+ $(hide) $(MESA_PYTHON2) $(FORMAT_UNPACK) $< > $@
commit c614fef0929e44fc627d49a4c16b623c630b2b71
Author: Emil Velikov <emil.l.velikov at gmail.com>
Date: Fri Mar 27 16:13:50 2015 +0000
android: add $(mesa_top)/src include to the whole of mesa
Many parts of mesa already have the include with others depending on it
but it's missing. Add it once at the top makefile and be done with it.
Cc: "10.4 10.5" <mesa-stable at lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov at gmail.com>
Reviewed-by: Chih-Wei Huang <cwhuang at linux.org.tw>
(cherry picked from commit 6fb801786604c270fae99c3d665dcebaa0bff3a6)
diff --git a/Android.common.mk b/Android.common.mk
index 3e6d4c3..ca62f79 100644
--- a/Android.common.mk
+++ b/Android.common.mk
@@ -31,6 +31,7 @@ endif
endif
LOCAL_C_INCLUDES += \
+ $(MESA_TOP)/src \
$(MESA_TOP)/include
MESA_VERSION=$(shell cat $(MESA_TOP)/VERSION)
diff --git a/src/gallium/auxiliary/Android.mk b/src/gallium/auxiliary/Android.mk
index 0bc1831..c7b2634 100644
--- a/src/gallium/auxiliary/Android.mk
+++ b/src/gallium/auxiliary/Android.mk
@@ -33,8 +33,7 @@ LOCAL_SRC_FILES := \
$(VL_STUB_SOURCES)
LOCAL_C_INCLUDES := \
- $(GALLIUM_TOP)/auxiliary/util \
- $(MESA_TOP)/src
+ $(GALLIUM_TOP)/auxiliary/util
LOCAL_MODULE := libmesa_gallium
diff --git a/src/glsl/Android.mk b/src/glsl/Android.mk
index 38c2087..2ac1ffb 100644
--- a/src/glsl/Android.mk
+++ b/src/glsl/Android.mk
@@ -38,7 +38,6 @@ LOCAL_SRC_FILES := \
$(LIBGLSL_FILES)
LOCAL_C_INCLUDES := \
- $(MESA_TOP)/src \
$(MESA_TOP)/src/mapi \
$(MESA_TOP)/src/mesa
@@ -59,7 +58,6 @@ LOCAL_SRC_FILES := \
$(GLSL_COMPILER_CXX_FILES)
LOCAL_C_INCLUDES := \
- $(MESA_TOP)/src \
$(MESA_TOP)/src/mapi \
$(MESA_TOP)/src/mesa
diff --git a/src/mesa/Android.libmesa_dricore.mk b/src/mesa/Android.libmesa_dricore.mk
index e4a5267..73afcc7 100644
--- a/src/mesa/Android.libmesa_dricore.mk
+++ b/src/mesa/Android.libmesa_dricore.mk
@@ -61,7 +61,6 @@ endif
LOCAL_C_INCLUDES := \
$(call intermediates-dir-for STATIC_LIBRARIES,libmesa_program,,) \
- $(MESA_TOP)/src \
$(MESA_TOP)/src/mapi \
$(MESA_TOP)/src/glsl \
$(MESA_TOP)/src/gallium/auxiliary
diff --git a/src/mesa/Android.libmesa_glsl_utils.mk b/src/mesa/Android.libmesa_glsl_utils.mk
index a9f6ff5..b7e64c5 100644
--- a/src/mesa/Android.libmesa_glsl_utils.mk
+++ b/src/mesa/Android.libmesa_glsl_utils.mk
@@ -36,7 +36,6 @@ include $(CLEAR_VARS)
LOCAL_MODULE := libmesa_glsl_utils
LOCAL_C_INCLUDES := \
- $(MESA_TOP)/src \
$(MESA_TOP)/src/glsl \
$(MESA_TOP)/src/mapi
@@ -59,7 +58,6 @@ LOCAL_IS_HOST_MODULE := true
LOCAL_CFLAGS := -D_POSIX_C_SOURCE=199309L
LOCAL_C_INCLUDES := \
- $(MESA_TOP)/src \
$(MESA_TOP)/src/glsl \
$(MESA_TOP)/src/mapi
diff --git a/src/mesa/Android.libmesa_st_mesa.mk b/src/mesa/Android.libmesa_st_mesa.mk
index a08366d..fdf847a 100644
--- a/src/mesa/Android.libmesa_st_mesa.mk
+++ b/src/mesa/Android.libmesa_st_mesa.mk
@@ -55,7 +55,6 @@ LOCAL_C_INCLUDES := \
$(call intermediates-dir-for STATIC_LIBRARIES,libmesa_program,,) \
$(MESA_TOP)/src/gallium/auxiliary \
$(MESA_TOP)/src/gallium/include \
- $(MESA_TOP)/src \
$(MESA_TOP)/src/glsl \
$(MESA_TOP)/src/mapi
diff --git a/src/mesa/drivers/dri/Android.mk b/src/mesa/drivers/dri/Android.mk
index d1c836b..e168fe0 100644
--- a/src/mesa/drivers/dri/Android.mk
+++ b/src/mesa/drivers/dri/Android.mk
@@ -35,7 +35,6 @@ MESA_DRI_CFLAGS := \
-DHAVE_ANDROID_PLATFORM
MESA_DRI_C_INCLUDES := \
- $(MESA_TOP)/src \
$(call intermediates-dir-for,STATIC_LIBRARIES,libmesa_dri_common) \
$(addprefix $(MESA_TOP)/, $(mesa_dri_common_INCLUDES)) \
external/expat/lib
diff --git a/src/mesa/program/Android.mk b/src/mesa/program/Android.mk
index a237b65..e85afe6 100644
--- a/src/mesa/program/Android.mk
+++ b/src/mesa/program/Android.mk
@@ -71,7 +71,6 @@ $(intermediates)/program/lex.yy.c: $(LOCAL_PATH)/program_lexer.l
LOCAL_C_INCLUDES := \
$(intermediates) \
- $(MESA_TOP)/src \
$(MESA_TOP)/src/mapi \
$(MESA_TOP)/src/mesa \
$(MESA_TOP)/src/glsl
diff --git a/src/util/Android.mk b/src/util/Android.mk
index 6b38cf9..1ece69b 100644
--- a/src/util/Android.mk
+++ b/src/util/Android.mk
@@ -35,8 +35,7 @@ LOCAL_SRC_FILES := \
LOCAL_C_INCLUDES := \
$(MESA_TOP)/src/mesa \
- $(MESA_TOP)/src/mapi \
- $(MESA_TOP)/src
+ $(MESA_TOP)/src/mapi
LOCAL_MODULE := libmesa_util
@@ -75,8 +74,7 @@ LOCAL_SRC_FILES := \
LOCAL_C_INCLUDES := \
$(MESA_TOP)/src/mesa \
- $(MESA_TOP)/src/mapi \
- $(MESA_TOP)/src
+ $(MESA_TOP)/src/mapi
LOCAL_MODULE := libmesa_util
commit 8ba18d75d66e3694923f04435670aef2db567798
Author: Emil Velikov <emil.l.velikov at gmail.com>
Date: Fri Mar 27 11:40:42 2015 +0000
android: use LOCAL_SHARED_LIBRARIES over TARGET_OUT_HEADERS
... to manage the LIBDRM*_CFLAGS. The former is the recommended approach
by the Android build system developers while the latter has been
depreciated for quite some time.
Cc: "10.4 10.5" <mesa-stable at lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov at gmail.com>
(cherry picked from commit 86919352e3da1c80409fdcb67c36f29a9687b7a9)
diff --git a/src/egl/drivers/dri2/Android.mk b/src/egl/drivers/dri2/Android.mk
index f91a903..d5ac8ee 100644
--- a/src/egl/drivers/dri2/Android.mk
+++ b/src/egl/drivers/dri2/Android.mk
@@ -40,12 +40,12 @@ LOCAL_C_INCLUDES := \
$(MESA_TOP)/src/mapi \
$(MESA_TOP)/src/egl/main \
$(MESA_TOP)/src/loader \
- $(TARGET_OUT_HEADERS)/libdrm \
$(DRM_GRALLOC_TOP)
LOCAL_STATIC_LIBRARIES := \
libmesa_loader
+LOCAL_SHARED_LIBRARIES := libdrm
LOCAL_MODULE := libmesa_egl_dri2
include $(MESA_COMMON_MK)
diff --git a/src/gallium/drivers/freedreno/Android.mk b/src/gallium/drivers/freedreno/Android.mk
index 6cab31f..a6712b2 100644
--- a/src/gallium/drivers/freedreno/Android.mk
+++ b/src/gallium/drivers/freedreno/Android.mk
@@ -34,10 +34,9 @@ LOCAL_CFLAGS := \
-Wno-packed-bitfield-compat
LOCAL_C_INCLUDES := \
- $(LOCAL_PATH)/ir3 \
- $(TARGET_OUT_HEADERS)/libdrm \
- $(TARGET_OUT_HEADERS)/freedreno
+ $(LOCAL_PATH)/ir3
+LOCAL_SHARED_LIBRARIES := libdrm libdrm_freedreno
LOCAL_MODULE := libmesa_pipe_freedreno
include $(GALLIUM_COMMON_MK)
diff --git a/src/gallium/drivers/nouveau/Android.mk b/src/gallium/drivers/nouveau/Android.mk
index 3f6ec5b..420c8e5 100644
--- a/src/gallium/drivers/nouveau/Android.mk
+++ b/src/gallium/drivers/nouveau/Android.mk
@@ -36,9 +36,7 @@ LOCAL_SRC_FILES := \
$(NVC0_CODEGEN_SOURCES) \
$(NVC0_C_SOURCES)
-LOCAL_C_INCLUDES := \
- $(TARGET_OUT_HEADERS)/libdrm
-
+LOCAL_SHARED_LIBRARIES := libdrm libdrm_nouveau
LOCAL_MODULE := libmesa_pipe_nouveau
include external/stlport/libstlport.mk
diff --git a/src/gallium/drivers/r300/Android.mk b/src/gallium/drivers/r300/Android.mk
index d3ef76d..7ff4f86 100644
--- a/src/gallium/drivers/r300/Android.mk
+++ b/src/gallium/drivers/r300/Android.mk
@@ -33,9 +33,10 @@ LOCAL_SRC_FILES := $(C_SOURCES)
LOCAL_C_INCLUDES := \
$(MESA_TOP)/src/mapi \
$(MESA_TOP)/src/glsl \
- $(MESA_TOP)/src/mesa \
- $(TARGET_OUT_HEADERS)/libdrm
+ $(MESA_TOP)/src/mesa
+
+LOCAL_SHARED_LIBRARIES := libdrm libdrm_radeon
LOCAL_MODULE := libmesa_pipe_r300
include $(GALLIUM_COMMON_MK)
diff --git a/src/gallium/drivers/r600/Android.mk b/src/gallium/drivers/r600/Android.mk
index 3b12dd6..e935759 100644
--- a/src/gallium/drivers/r600/Android.mk
+++ b/src/gallium/drivers/r600/Android.mk
@@ -30,8 +30,7 @@ include $(CLEAR_VARS)
LOCAL_SRC_FILES := $(C_SOURCES) $(CXX_SOURCES)
-LOCAL_C_INCLUDES := $(TARGET_OUT_HEADERS)/libdrm
-
+LOCAL_SHARED_LIBRARIES := libdrm libdrm_radeon
LOCAL_MODULE := libmesa_pipe_r600
include external/stlport/libstlport.mk
diff --git a/src/gallium/drivers/radeon/Android.mk b/src/gallium/drivers/radeon/Android.mk
index d562f4c..d615792 100644
--- a/src/gallium/drivers/radeon/Android.mk
+++ b/src/gallium/drivers/radeon/Android.mk
@@ -30,8 +30,7 @@ include $(CLEAR_VARS)
LOCAL_SRC_FILES := $(C_SOURCES)
-LOCAL_C_INCLUDES := $(TARGET_OUT_HEADERS)/libdrm
-
+LOCAL_SHARED_LIBRARIES := libdrm libdrm_radeon
LOCAL_MODULE := libmesa_pipe_radeon
include $(GALLIUM_COMMON_MK)
diff --git a/src/gallium/drivers/radeonsi/Android.mk b/src/gallium/drivers/radeonsi/Android.mk
index 22c0fdc..57f3bef 100644
--- a/src/gallium/drivers/radeonsi/Android.mk
+++ b/src/gallium/drivers/radeonsi/Android.mk
@@ -30,8 +30,7 @@ include $(CLEAR_VARS)
LOCAL_SRC_FILES := $(C_SOURCES)
-LOCAL_C_INCLUDES := $(TARGET_OUT_HEADERS)/libdrm
-
+LOCAL_SHARED_LIBRARIES := libdrm libdrm_radeon
LOCAL_MODULE := libmesa_pipe_radeonsi
include $(GALLIUM_COMMON_MK)
diff --git a/src/gallium/winsys/freedreno/drm/Android.mk b/src/gallium/winsys/freedreno/drm/Android.mk
index 7bd31d9..b45d3d4 100644
--- a/src/gallium/winsys/freedreno/drm/Android.mk
+++ b/src/gallium/winsys/freedreno/drm/Android.mk
@@ -27,10 +27,7 @@ include $(CLEAR_VARS)
LOCAL_SRC_FILES := $(C_SOURCES)
-LOCAL_C_INCLUDES := \
- $(TARGET_OUT_HEADERS)/libdrm \
- $(TARGET_OUT_HEADERS)/freedreno
-
+LOCAL_SHARED_LIBRARIES := libdrm libdrm_freedreno
LOCAL_MODULE := libmesa_winsys_freedreno
include $(GALLIUM_COMMON_MK)
diff --git a/src/gallium/winsys/i915/drm/Android.mk b/src/gallium/winsys/i915/drm/Android.mk
index ffcf4d5..5c9107b 100644
--- a/src/gallium/winsys/i915/drm/Android.mk
+++ b/src/gallium/winsys/i915/drm/Android.mk
@@ -30,8 +30,7 @@ include $(CLEAR_VARS)
LOCAL_SRC_FILES := $(C_SOURCES)
-LOCAL_C_INCLUDES := $(TARGET_OUT_HEADERS)/libdrm
-
+LOCAL_SHARED_LIBRARIES := libdrm libdrm_intel
LOCAL_MODULE := libmesa_winsys_i915
include $(GALLIUM_COMMON_MK)
diff --git a/src/gallium/winsys/intel/drm/Android.mk b/src/gallium/winsys/intel/drm/Android.mk
index a391883..463d315 100644
--- a/src/gallium/winsys/intel/drm/Android.mk
+++ b/src/gallium/winsys/intel/drm/Android.mk
@@ -29,8 +29,7 @@ include $(CLEAR_VARS)
LOCAL_SRC_FILES := $(C_SOURCES)
-LOCAL_C_INCLUDES := $(TARGET_OUT_HEADERS)/libdrm
-
+LOCAL_SHARED_LIBRARIES := libdrm libdrm_intel
LOCAL_MODULE := libmesa_winsys_intel
include $(GALLIUM_COMMON_MK)
diff --git a/src/gallium/winsys/nouveau/drm/Android.mk b/src/gallium/winsys/nouveau/drm/Android.mk
index 142cc6b..2841080 100644
--- a/src/gallium/winsys/nouveau/drm/Android.mk
+++ b/src/gallium/winsys/nouveau/drm/Android.mk
@@ -30,8 +30,7 @@ include $(CLEAR_VARS)
LOCAL_SRC_FILES := $(C_SOURCES)
-LOCAL_C_INCLUDES := $(TARGET_OUT_HEADERS)/libdrm
-
+LOCAL_SHARED_LIBRARIES := libdrm libdrm_nouveau
LOCAL_MODULE := libmesa_winsys_nouveau
include $(GALLIUM_COMMON_MK)
diff --git a/src/gallium/winsys/radeon/drm/Android.mk b/src/gallium/winsys/radeon/drm/Android.mk
index 3165ba4..eacb35f 100644
--- a/src/gallium/winsys/radeon/drm/Android.mk
+++ b/src/gallium/winsys/radeon/drm/Android.mk
@@ -30,8 +30,7 @@ include $(CLEAR_VARS)
LOCAL_SRC_FILES := $(C_SOURCES)
-LOCAL_C_INCLUDES := $(TARGET_OUT_HEADERS)/libdrm
-
+LOCAL_SHARED_LIBRARIES := libdrm libdrm_radeon
LOCAL_MODULE := libmesa_winsys_radeon
include $(GALLIUM_COMMON_MK)
diff --git a/src/gallium/winsys/svga/drm/Android.mk b/src/gallium/winsys/svga/drm/Android.mk
index a26138e..f57225e 100644
--- a/src/gallium/winsys/svga/drm/Android.mk
+++ b/src/gallium/winsys/svga/drm/Android.mk
@@ -34,9 +34,9 @@ LOCAL_CFLAGS := -D_FILE_OFFSET_BITS=64
LOCAL_C_INCLUDES := \
$(GALLIUM_TOP)/drivers/svga \
- $(GALLIUM_TOP)/drivers/svga/include \
- $(TARGET_OUT_HEADERS)/libdrm
+ $(GALLIUM_TOP)/drivers/svga/include
+LOCAL_SHARED_LIBRARIES := libdrm
LOCAL_MODULE := libmesa_winsys_svga
include $(GALLIUM_COMMON_MK)
diff --git a/src/loader/Android.mk b/src/loader/Android.mk
index 8daeedf..8e215de 100644
--- a/src/loader/Android.mk
+++ b/src/loader/Android.mk
@@ -37,7 +37,7 @@ LOCAL_SRC_FILES := \
ifeq ($(MESA_GPU_DRIVERS),swrast)
LOCAL_CFLAGS += -D__NOT_HAVE_DRM_H
else
-LOCAL_C_INCLUDES += $(TARGET_OUT_HEADERS)/libdrm
+LOCAL_SHARED_LIBRARIES := libdrm
endif
LOCAL_MODULE := libmesa_loader
diff --git a/src/mesa/drivers/dri/Android.mk b/src/mesa/drivers/dri/Android.mk
index 935722c..d1c836b 100644
--- a/src/mesa/drivers/dri/Android.mk
+++ b/src/mesa/drivers/dri/Android.mk
@@ -38,7 +38,6 @@ MESA_DRI_C_INCLUDES := \
$(MESA_TOP)/src \
$(call intermediates-dir-for,STATIC_LIBRARIES,libmesa_dri_common) \
$(addprefix $(MESA_TOP)/, $(mesa_dri_common_INCLUDES)) \
- $(TARGET_OUT_HEADERS)/libdrm \
external/expat/lib
MESA_DRI_WHOLE_STATIC_LIBRARIES := \
commit 597d85c6b761028e00d9a75405afcba7612f9d58
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Fri Apr 10 10:24:33 2015 -0700
drirc: Add "Second Life" quirk (allow_glsl_extension_directive_midshader).
Appears to fix shader compilation. Tested by starting the client,
dragging the "quality and speed" slider back and forth, and watching the
console output - instead of piles of "shader failed to compile", the CPU
seems to be busy compiling shaders. I haven't actually tried to play.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=69226
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=71591
Cc: mesa-stable at lists.freedesktop.org
(cherry picked from commit 00bf7d2e9cd60dbd82d25b459c448e11c545a89a)
diff --git a/src/mesa/drivers/dri/common/drirc b/src/mesa/drivers/dri/common/drirc
index cecd6a9..145e707 100644
--- a/src/mesa/drivers/dri/common/drirc
+++ b/src/mesa/drivers/dri/common/drirc
@@ -91,5 +91,9 @@ TODO: document the other workarounds.
<application name="Dead Island" executable="DeadIslandGame">
<option name="allow_glsl_extension_directive_midshader" value="true" />
</application>
+
+ <application name="Second Life" executable="do-not-directly-run-secondlife-bin">
+ <option name="allow_glsl_extension_directive_midshader" value="true" />
+ </application>
</device>
</driconf>
commit ef0e335c1422b8a394073d89a781ed5847da0eb1
Author: Marek Olšák <marek.olsak at amd.com>
Date: Sat Apr 11 14:55:26 2015 +0200
glsl_to_tgsi: don't use a potentially-undefined immediate for ir_query_levels
Cc: 10.4 10.5 <mesa-stable at lists.freedesktop.org>
Reviewed-by: Brian Paul <brianp at vmware.com>
(cherry picked from commit dcc74d47c40bf117f2dfaa359f9de7faef2c2200)
diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
index eba8af0..0d7145e 100644
--- a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
+++ b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
@@ -2860,7 +2860,7 @@ glsl_to_tgsi_visitor::visit(ir_texture *ir)
break;
case ir_query_levels:
opcode = TGSI_OPCODE_TXQ;
- lod_info = st_src_reg(PROGRAM_IMMEDIATE, 0, GLSL_TYPE_INT);
+ lod_info = undef_src;
levels_src = get_temp(ir->type);
break;
case ir_txf:
@@ -4353,7 +4353,7 @@ src_register(struct st_translate *t, const struct st_src_reg *reg)
{
switch(reg->file) {
case PROGRAM_UNDEFINED:
- return ureg_src_undef();
+ return ureg_imm4f(t->ureg, 0, 0, 0, 0);
case PROGRAM_TEMPORARY:
case PROGRAM_ARRAY:
@@ -4551,10 +4551,8 @@ compile_tgsi_instruction(struct st_translate *t,
inst->saturate,
clamp_dst_color_output);
- for (i = 0; i < num_src; i++) {
- assert(inst->src[i].file != PROGRAM_UNDEFINED);
+ for (i = 0; i < num_src; i++)
src[i] = translate_src(t, &inst->src[i]);
- }
switch(inst->op) {
case TGSI_OPCODE_BGNLOOP:
commit f8966a07d94bb3e49db31b92ee01e339a908bd50
Author: Marek Olšák <marek.olsak at amd.com>
Date: Sat Apr 11 13:49:38 2015 +0200
glsl_to_tgsi: fix out-of-bounds constant access and crash for uniforms
This fixes piglit shaders at glsl-fs-uniform-array-loop-unroll with immediate
shader compilation - it's a compiler test, so it has never been translated
to TGSI before.
Cc: 10.4 10.5 <mesa-stable at lists.freedesktop.org>
Reviewed-by: Brian Paul <brianp at vmware.com>
(cherry picked from commit 14c5bc3b9a6b03a8e42ef79da66d8b81b239cf96)
diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
index 7abb85a..eba8af0 100644
--- a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
+++ b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
@@ -4152,6 +4152,7 @@ struct st_translate {
struct ureg_dst arrays[MAX_ARRAYS];
struct ureg_src *constants;
+ int num_constants;
struct ureg_src *immediates;
struct ureg_dst outputs[PIPE_MAX_SHADER_OUTPUTS];
struct ureg_src inputs[PIPE_MAX_SHADER_INPUTS];
@@ -4360,15 +4361,15 @@ src_register(struct st_translate *t, const struct st_src_reg *reg)
case PROGRAM_UNIFORM:
assert(reg->index >= 0);
- return t->constants[reg->index];
+ return reg->index < t->num_constants ?
+ t->constants[reg->index] : ureg_imm4f(t->ureg, 0, 0, 0, 0);
case PROGRAM_STATE_VAR:
case PROGRAM_CONSTANT: /* ie, immediate */
if (reg->has_index2)
return ureg_src_register(TGSI_FILE_CONSTANT, reg->index);
- else if (reg->index < 0)
- return ureg_DECL_constant(t->ureg, 0);
else
- return t->constants[reg->index];
+ return reg->index >= 0 && reg->index < t->num_constants ?
+ t->constants[reg->index] : ureg_imm4f(t->ureg, 0, 0, 0, 0);
case PROGRAM_IMMEDIATE:
return t->immediates[reg->index];
@@ -5083,6 +5084,7 @@ st_translate_program(
ret = PIPE_ERROR_OUT_OF_MEMORY;
goto out;
}
+ t->num_constants = proginfo->Parameters->NumParameters;
for (i = 0; i < proginfo->Parameters->NumParameters; i++) {
switch (proginfo->Parameters->Parameters[i].Type) {
@@ -5182,6 +5184,7 @@ out:
free(t->insn);
free(t->labels);
free(t->constants);
+ t->num_constants = 0;
free(t->immediates);
if (t->error) {
commit ee63b31594a5919f93240fa209c0ffa74ec5b081
Author: Kristian Høgsberg <krh at bitplanet.net>
Date: Tue Apr 14 15:02:18 2015 +0000
i965: Rewrite ir_tex to ir_txl with lod 0 for vertex shaders
The ir_tex opcode turns into a sample or sample_c message, which will try to
compute derivatives to determine the lod. This produces garbage for
non-fragment shaders where the sample coordinates don't correspond to
subspans.
We fix this by rewriting the opcode from ir_tex to ir_txl and setting the
lod to 0.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89457
Cc: "10.5" <mesa-stable at lists.freedesktop.org>
Signed-off-by: Kristian Høgsberg <kristian.h.kristensen at intel.com>
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
(cherry picked from commit 993a6288f72fa98932df7cdb6f64d9dd645e670d)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
index 8048892..7613da0 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
@@ -1683,6 +1683,15 @@ fs_visitor::emit_texture_gen7(ir_texture_opcode op, fs_reg dst,
offset_value.file != BAD_FILE && offset_value.file != IMM;
bool coordinate_done = false;
+ /* The sampler can only meaningfully compute LOD for fragment shader
+ * messages. For all other stages, we change the opcode to ir_txl and
+ * hardcode the LOD to 0.
+ */
+ if (stage != MESA_SHADER_FRAGMENT && op == ir_tex) {
+ op = ir_txl;
+ lod = fs_reg(0.0f);
+ }
+
/* Set up the LOD info */
switch (op) {
case ir_tex:
commit 1ebb42a6b2c21673aeb7ba09327043d278b0fe78
Author: Ian Romanick <ian.d.romanick at intel.com>
Date: Tue Apr 14 08:40:22 2015 -0700
nir: Fix typo in "ushr by 0" algebraic replacement
Signed-off-by: Ian Romanick <ian.d.romanick at intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen at intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand at intel.com>
Reviewed-by: Connor Abbott <cwabbott0 at gmail.com>
Cc: "10.5" <mesa-stable at lists.freedestkop.org>
(cherry picked from commit bc672e261c5f7ff56cd2b8f6b518ebfdc0163bb7)
diff --git a/src/glsl/nir/nir_opt_algebraic.py b/src/glsl/nir/nir_opt_algebraic.py
index a5fe19a..c9766f4 100644
--- a/src/glsl/nir/nir_opt_algebraic.py
+++ b/src/glsl/nir/nir_opt_algebraic.py
@@ -101,7 +101,7 @@ optimizations = [
(('ishr', 0, a), 0),
(('ishr', a, 0), a),
(('ushr', 0, a), 0),
- (('ushr', a, 0), 0),
+ (('ushr', a, 0), a),
# Exponential/logarithmic identities
(('fexp2', ('flog2', a)), a), # 2^lg2(a) = a
(('fexp', ('flog', a)), a), # e^ln(a) = a
commit a968edae6cdf5340785e94a78742df9b49bf7071
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Sat Apr 11 02:21:48 2015 -0700
i965: Fix software primitive restart with indirect draws.
new_prim was declared as a stack variable within a nested scope; we
tried to retain a pointer to that data beyond the scope, which is bogus.
GCC with -O1 eliminated most of the code that set new_prim's fields.
Move the declaration to fix the bug.
v2: Also fix new_ib (thanks to Matt Turner and Ben Widawsky).
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=81025
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Matt Turner <mattst88 at gmail.com>
Reviewed-by: Ben Widawsky <ben at bwidawsk.net>
Cc: mesa-stable at lists.freedesktop.org
(cherry picked from commit 406df68736a213f17f21a38a7c2da4ea15acd053)
diff --git a/src/mesa/vbo/vbo_primitive_restart.c b/src/mesa/vbo/vbo_primitive_restart.c
index 562dedc..dafc4fd 100644
--- a/src/mesa/vbo/vbo_primitive_restart.c
+++ b/src/mesa/vbo/vbo_primitive_restart.c
@@ -167,6 +167,8 @@ vbo_sw_primitive_restart(struct gl_context *ctx,
struct gl_buffer_object *indirect)
{
GLuint prim_num;
+ struct _mesa_prim new_prim;
+ struct _mesa_index_buffer new_ib;
struct sub_primitive *sub_prims;
struct sub_primitive *sub_prim;
GLuint num_sub_prims;
@@ -182,8 +184,6 @@ vbo_sw_primitive_restart(struct gl_context *ctx,
/* If there is an indirect buffer, map it and extract the draw params */
if (indirect && prims[0].is_indirect) {
- struct _mesa_prim new_prim = *prims;
- struct _mesa_index_buffer new_ib = *ib;
const uint32_t *indirect_params;
if (!ctx->Driver.MapBufferRange(ctx, 0, indirect->Size, GL_MAP_READ_BIT,
indirect, MAP_INTERNAL)) {
@@ -195,6 +195,7 @@ vbo_sw_primitive_restart(struct gl_context *ctx,
}
assert(nr_prims == 1);
+ new_prim = prims[0];
indirect_params = (const uint32_t *)
ADD_POINTERS(indirect->Mappings[MAP_INTERNAL].Pointer,
new_prim.indirect_offset);
@@ -206,6 +207,7 @@ vbo_sw_primitive_restart(struct gl_context *ctx,
new_prim.basevertex = indirect_params[3];
new_prim.base_instance = indirect_params[4];
+ new_ib = *ib;
new_ib.count = new_prim.count;
prims = &new_prim;
commit f44e518364876dbc210370edd2a8b7b0890e8aab
Author: Dave Airlie <airlied at redhat.com>
Date: Wed Apr 8 10:00:27 2015 +1000
st/mesa: align cube map arrays layers
We create textures internally for texsubimage, and we use
the values from sub image to create a new texture, however
we don't align these to valid sizes, and cube map arrays
must have an array size aligned to 6.
This fixes texsubimage cube_map_array on CAYMAN at least,
(it was causing GPU hang and bad values), it probably
also fixes it on radeonsi and evergreen.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89957
Tested-by: Tom Stellard <thomas.stellard at amd.com>
Cc: mesa-stable at lists.freedesktop.org
Reviewed-by: Marek Olšák <marek.olsak at amd.com>
Signed-off-by: Dave Airlie <airlied at redhat.com>
(cherry picked from commit cc5860e40787b3afe36856674f028e830685271b)
diff --git a/src/mesa/state_tracker/st_texture.c b/src/mesa/state_tracker/st_texture.c
index ada9841..9dabca8 100644
--- a/src/mesa/state_tracker/st_texture.c
+++ b/src/mesa/state_tracker/st_texture.c
@@ -177,7 +177,7 @@ st_gl_texture_dims_to_pipe_dims(GLenum texture,
*widthOut = widthIn;
*heightOut = heightIn;
*depthOut = 1;
- *layersOut = depthIn;
+ *layersOut = util_align_npot(depthIn, 6);
break;
default:
assert(0 && "Unexpected texture in st_gl_texture_dims_to_pipe_dims()");
commit b2a6b01082e45fb32c607cfc64cd780185be62e3
Author: Dave Airlie <airlied at redhat.com>
Date: Wed Apr 8 10:59:20 2015 +1000
st/mesa: convert sub image for cube map arrays to 2d arrays for upload
Since we can subimage upload a number of cube map array layers,
that aren't a complete cube map array, we should specify things
as a 2D array and blit from that.
Suggested by Ilia Mirkin as an alternate fix for texsubimage
cube map array issues.
seems to work just as well.
Cc: mesa-stable at lists.freedesktop.org
Reviewed-by: Marek Olšák <marek.olsak at amd.com>
Signed-off-by: Dave Airlie <airlied at redhat.com>
(cherry picked from commit 5ed79312ed99f3b141c35569b9767f82f5ba0a93)
diff --git a/src/mesa/state_tracker/st_cb_texture.c b/src/mesa/state_tracker/st_cb_texture.c
index abc68c0..889eb6a 100644
--- a/src/mesa/state_tracker/st_cb_texture.c
+++ b/src/mesa/state_tracker/st_cb_texture.c
@@ -741,6 +741,11 @@ st_TexSubImage(struct gl_context *ctx, GLuint dims,
if (gl_target == GL_TEXTURE_CUBE_MAP) {
gl_target = GL_TEXTURE_2D;
}
+ /* TexSubImage can specify subsets of cube map array faces
+ * so we need to upload via 2D array instead */
+ if (gl_target == GL_TEXTURE_CUBE_MAP_ARRAY) {
+ gl_target = GL_TEXTURE_2D_ARRAY;
+ }
/* Initialize the source texture description. */
memset(&src_templ, 0, sizeof(src_templ));
commit abdae1c4d1af084aca56c89a20db85c867ce412d
Author: Mathias Froehlich <Mathias.Froehlich at gmx.net>
Date: Sun Apr 12 18:23:58 2015 +0200
i965: Flush batchbuffer containing the query on glQueryCounter.
This change fixes a regression with timer queries introduced with
commit 3eb6258. There the pending batchbuffer is flushed
only if glEndQuery is executed. This present change adds such
a flush to glQueryCounter which also schedules a value query
just like glEndQuery does. The patch fixes GPU timer queries
going mad from within osgviewer.
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
Signed-off-by: Mathias Froehlich <Mathias.Froehlich at web.de>
Cc: mesa-stable at lists.freedesktop.org
(cherry picked from commit 1e1d5456ba3dff82301ad4bbdde2fb6e2f562fe3)
diff --git a/src/mesa/drivers/dri/i965/brw_queryobj.c b/src/mesa/drivers/dri/i965/brw_queryobj.c
index c053c34..796c1de 100644
--- a/src/mesa/drivers/dri/i965/brw_queryobj.c
+++ b/src/mesa/drivers/dri/i965/brw_queryobj.c
@@ -476,6 +476,8 @@ brw_query_counter(struct gl_context *ctx, struct gl_query_object *q)
drm_intel_bo_unreference(query->bo);
query->bo = drm_intel_bo_alloc(brw->bufmgr, "timestamp query", 4096, 4096);
brw_write_timestamp(brw, query->bo, 0);
+
+ query->flushed = false;
}
/**
commit f73954e0a799fd9d2e64d62e2ee8c999a7c18126
Author: Emil Velikov <emil.l.velikov at gmail.com>
Date: Wed Apr 22 16:10:47 2015 +0100
radeonsi: remove unused si_dump_key()
Accidentally added with commit 64d0f0e3b24(radeonsi: Cache
LLVMTargetMachineRef in context instead of in screen)
Reported-by: Michel Dänzer <michel.daenzer at amd.com>
Signed-off-by: Emil Velikov <emil.l.velikov at gmail.com>
diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c
index a86d4b1..a32ffce 100644
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++ b/src/gallium/drivers/radeonsi/si_shader.c
@@ -2741,43 +2741,6 @@ static int si_generate_gs_copy_shader(struct si_screen *sscreen,
return r;
}
-static void si_dump_key(unsigned shader, union si_shader_key *key)
-{
- int i;
-
- fprintf(stderr, "SHADER KEY\n");
-
- switch (shader) {
- case PIPE_SHADER_VERTEX:
- fprintf(stderr, " instance_divisors = {");
- for (i = 0; i < Elements(key->vs.instance_divisors); i++)
- fprintf(stderr, !i ? "%u" : ", %u",
- key->vs.instance_divisors[i]);
- fprintf(stderr, "}\n");
-
- if (key->vs.as_es)
- fprintf(stderr, " gs_used_inputs = 0x%"PRIx64"\n",
- key->vs.gs_used_inputs);
- fprintf(stderr, " as_es = %u\n", key->vs.as_es);
- break;
-
- case PIPE_SHADER_GEOMETRY:
- break;
-
- case PIPE_SHADER_FRAGMENT:
- fprintf(stderr, " export_16bpc = 0x%X\n", key->ps.export_16bpc);
- fprintf(stderr, " last_cbuf = %u\n", key->ps.last_cbuf);
- fprintf(stderr, " color_two_side = %u\n", key->ps.color_two_side);
- fprintf(stderr, " alpha_func = %u\n", key->ps.alpha_func);
- fprintf(stderr, " alpha_to_one = %u\n", key->ps.alpha_to_one);
- fprintf(stderr, " poly_stipple = %u\n", key->ps.poly_stipple);
- break;
-
- default:
- assert(0);
- }
-}
-
int si_shader_create(struct si_screen *sscreen, LLVMTargetMachineRef tm,
struct si_shader *shader)
{
commit 65776421fe59a0ffd5388c0968c9b0b1c1b230ed
Author: Emil Velikov <emil.l.velikov at gmail.com>
Date: Sun Apr 12 23:10:42 2015 +0100
docs: Add 256 sums for the 10.5.3 release
Signed-off-by: Emil Velikov <emil.l.velikov at gmail.com>
diff --git a/docs/relnotes/10.5.3.html b/docs/relnotes/10.5.3.html
index 8fe8390..e5e0d30 100644
--- a/docs/relnotes/10.5.3.html
+++ b/docs/relnotes/10.5.3.html
@@ -31,7 +31,8 @@ because compatibility contexts are not supported.
<h2>SHA256 checksums</h2>
<pre>
-TBD
+2371b8e210ccd19f61dd94b6664d612e5a479ba7d431a074512d87633bd6aeb4 mesa-10.5.3.tar.gz
+8701ee1be4f5c03238f5e63c1a9bd4cc03a2f6c0155ed42a1ae7d58f18912ba2 mesa-10.5.3.tar.xz
</pre>
commit c4b8bff6e24c6661a8a05ec05f8ed5762e95021b
Author: Emil Velikov <emil.l.velikov at gmail.com>
Date: Sun Apr 12 22:29:06 2015 +0100
Add release notes for the 10.5.3 release
Signed-off-by: Emil Velikov <emil.l.velikov at gmail.com>
diff --git a/docs/relnotes/10.5.3.html b/docs/relnotes/10.5.3.html
new file mode 100644
index 0000000..8fe8390
--- /dev/null
+++ b/docs/relnotes/10.5.3.html
@@ -0,0 +1,124 @@
+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
+<html lang="en">
+<head>
+ <meta http-equiv="content-type" content="text/html; charset=utf-8">
+ <title>Mesa Release Notes</title>
+ <link rel="stylesheet" type="text/css" href="../mesa.css">
+</head>
+<body>
+
+<div class="header">
+ <h1>The Mesa 3D Graphics Library</h1>
+</div>
+
+<iframe src="../contents.html"></iframe>
+<div class="content">
+
+<h1>Mesa 10.5.3 Release Notes / April 12, 2015</h1>
+
+<p>
+Mesa 10.5.3 is a bug fix release which fixes bugs found since the 10.5.2 release.
+</p>
+<p>
+Mesa 10.5.3 implements the OpenGL 3.3 API, but the version reported by
+glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
+glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
+Some drivers don't support all the features required in OpenGL 3.3. OpenGL
+3.3 is <strong>only</strong> available if requested at context creation
+because compatibility contexts are not supported.
+</p>
+
+
+<h2>SHA256 checksums</h2>
+<pre>
+TBD
+</pre>
+
+
+<h2>New features</h2>
+<p>None</p>
+
+<h2>Bug fixes</h2>
+
+<p>This list is likely incomplete.</p>
+
+<ul>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=83962">Bug 83962</a> - [HSW/BYT]Piglit spec_ARB_gpu_shader5_arb_gpu_shader5-emitstreamvertex_nodraw fails</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89679">Bug 89679</a> - [NV50] Portal/Half-Life 2 will not start (native Steam)</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89746">Bug 89746</a> - Mesa and LLVM 3.6+ break opengl for genymotion</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89754">Bug 89754</a> - vertexAttrib fails WebGL Conformance test with mesa drivers</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89758">Bug 89758</a> - pow WebGL Conformance test with mesa drivers</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89759">Bug 89759</a> - WebGL OGL ES GLSL conformance test with mesa drivers fails</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89905">Bug 89905</a> - scons build broken on 10.5.2 due to activated vega st</li>
+
+</ul>
+
+<h2>Changes</h2>
+
+<p>Dave Airlie (1):</p>
+<ul>
+ <li>st_glsl_to_tgsi: only do mov copy propagation on temps (v2)</li>
+</ul>
+
+<p>Emil Velikov (5):</p>
+<ul>
+ <li>docs: Add sha256 sums for the 10.5.2 release</li>
+ <li>xmlpool: don't forget to ship the MOS</li>
+ <li>configure.ac: error out if python/mako is not found when required</li>
+ <li>dist: add the VG depedencies into the tarball</li>
+ <li>Update version to 10.5.3</li>
+</ul>
+
+<p>Iago Toral Quiroga (1):</p>
+<ul>
+ <li>i965: Do not render primitives in non-zero streams then TF is disabled</li>
+</ul>
+
+<p>Ilia Mirkin (7):</p>
+<ul>
+ <li>st/mesa: update arrays when the current attrib has been updated</li>
+ <li>nv50/ir: take postFactor into account when doing peephole optimizations</li>
+ <li>nv50/ir/gk110: fix offset flag position for TXD opcode</li>
+ <li>freedreno/a3xx: fix 3d texture layout</li>
+ <li>freedreno/a3xx: point size should not be divided by 2</li>
+ <li>nv50: allocate more offset space for occlusion queries</li>
+ <li>nv50,nvc0: limit the y-tiling of 3d textures to the first level's tiling</li>
+</ul>
+
+<p>Kenneth Graunke (2):</p>
+<ul>
+ <li>i965: Fix instanced geometry shaders on Gen8+.</li>
+ <li>i965: Add forgotten multi-stream code to Gen8 SOL state.</li>
+</ul>
+
+<p>Marcin Åšlusarz (1):</p>
+<ul>
+ <li>nouveau: synchronize "scratch runout" destruction with the command stream</li>
+</ul>
+
+<p>Michel Dänzer (1):</p>
+<ul>
+ <li>radeonsi: Cache LLVMTargetMachineRef in context instead of in screen</li>
+</ul>
+
+<p>Tom Stellard (1):</p>
+<ul>
+ <li>clover: Return CL_BUILD_ERROR for CL_PROGRAM_BUILD_STATUS when compilation fails v2</li>
+</ul>
+
+<p>Ville Syrjälä (1):</p>
+<ul>
+ <li>i965: Fix URB size for CHV</li>
+</ul>
+
+
+</div>
+</body>
+</html>
commit b17312cac2618d28decf32912d3e96364b9db42f
Author: Emil Velikov <emil.l.velikov at gmail.com>
Date: Sun Apr 12 22:21:07 2015 +0100
Update version to 10.5.3
Signed-off-by: Emil Velikov <emil.l.velikov at gmail.com>
diff --git a/VERSION b/VERSION
index a39233b..1e9c35f 100644
--- a/VERSION
+++ b/VERSION
@@ -1 +1 @@
-10.5.2
+10.5.3
commit 37d925a63538bde60aae4d185c4017c0b8d210b6
Author: Emil Velikov <emil.l.velikov at gmail.com>
Date: Wed Apr 8 18:23:13 2015 +0100
dist: add the VG depedencies into the tarball
Otherwise the scons build will fail.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89905
Signed-off-by: Emil Velikov <emil.l.velikov at gmail.com>
diff --git a/Makefile.am b/Makefile.am
index f4f0912..82db4be 100644
--- a/Makefile.am
+++ b/Makefile.am
@@ -49,6 +49,7 @@ noinst_HEADERS = \
include/c99 \
include/c11 \
include/D3D9 \
+ include/VG \
include/HaikuGL \
include/pci_ids
diff --git a/src/mapi/Makefile.am b/src/mapi/Makefile.am
index 572f340..d18c464 100644
--- a/src/mapi/Makefile.am
+++ b/src/mapi/Makefile.am
@@ -231,7 +231,7 @@ es2api/glapi_mapi_tmp.h: glapi/gen/gl_and_es_API.xml $(glapi_gen_mapi_deps)
$(call glapi_gen_mapi,$<,es2api)
# XXX: Inline vgapi's Makefile.am here.
-EXTRA_DIST += vgapi
+EXTRA_DIST += vgapi mapi.c mapi.h
# if HAVE_OPENVG
# SUBDIRS += vgapi
# endif
commit b3bb6b19637561171f286af7342266cac63b8fcd
Author: Emil Velikov <emil.l.velikov at gmail.com>
Date: Mon Mar 23 17:49:24 2015 +0000
configure.ac: error out if python/mako is not found when required
In case of using a distribution tarball (or a dirty git tree) one can
have the generated sources locally. Make configure.ac error out
otherwise, to alert that about the unmet requirement(s) of python/mako.
v2: Check only for a single file for each dependency.
Suggested-by: Matt Turner <mattst88 at gmail.com>
Signed-off-by: Emil Velikov <emil.l.velikov at gmail.com>
Reviewed-by: Matt Turner <mattst88 at gmail.com>
(cherry picked from commit 4008975e6f4b2e15fceed4f07d8ec763dd0949d1)
diff --git a/configure.ac b/configure.ac
index 20e6d62..101cf66 100644
--- a/configure.ac
+++ b/configure.ac
@@ -115,8 +115,17 @@ if test "x$INDENT" != "xcat"; then
fi
AX_CHECK_PYTHON_MAKO_MODULE($PYTHON_MAKO_REQUIRED)
-if test -n "$PYTHON2" -a "x$acv_mako_found" != "xyes"; then
- AC_MSG_ERROR([Python mako module v$PYTHON_MAKO_REQUIRED or higher not found])
+
+if test -z "$PYTHON2"; then
+ if test ! -f "$srcdir/src/util/format_srgb.c"; then
+ AC_MSG_ERROR([Python not found - unable to generate sources])
+ fi
+else
+ if test "x$acv_mako_found" = xno; then
+ if test ! -f "$srcdir/src/mesa/main/format_unpack.c"; then
+ AC_MSG_ERROR([Python mako module v$PYTHON_MAKO_REQUIRED or higher not found])
+ fi
+ fi
fi
AC_PROG_INSTALL
commit 42854fdf2c1123d10ba6915fc6fb32de093d7785
Author: Ville Syrjälä <ville.syrjala at linux.intel.com>
Date: Mon Jan 19 16:08:31 2015 +0200
i965: Fix URB size for CHV
Increase the device info .urb.size for CHV to match the default URB
size (192kB).
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
(cherry picked from commit 970dc2360372a7859691d690bd2f1976c3c97fb0)
diff --git a/src/mesa/drivers/dri/i965/brw_device_info.c b/src/mesa/drivers/dri/i965/brw_device_info.c
index 3c3c564..ba65584 100644
--- a/src/mesa/drivers/dri/i965/brw_device_info.c
+++ b/src/mesa/drivers/dri/i965/brw_device_info.c
@@ -241,7 +241,7 @@ static const struct brw_device_info brw_device_info_chv = {
.max_gs_threads = 80,
.max_wm_threads = 128,
.urb = {
- .size = 128,
+ .size = 192,
.min_vs_entries = 34,
.max_vs_entries = 640,
.max_gs_entries = 256,
commit 64bb117f6dc80103b7be6a3971a93195dc5f1917
Author: Marcin Åšlusarz <marcin.slusarz at gmail.com>
Date: Tue Mar 31 22:04:31 2015 +0200
nouveau: synchronize "scratch runout" destruction with the command stream
When nvc0_push_vbo calls nouveau_scratch_done it does not mean
scratch buffers can be freed immediately. It means "when hardware
advances to this place in the command stream the scratch buffers
can be freed".
To fix it, just postpone scratch runout destruction after current
fence is signalled.
The bug existed for a very long time. Nobody noticed, because
"scratch runout" code path is rarely executed.
Fixes hang at the very beginning of first mission in "Serious Sam 3"
on nve7/gk107. It manifested as:
nouveau E[ PFIFO][0000:01:00.0] read fault at 0x000a9e0000 [PTE] from GR/GPC0/PE_2 on channel 0x007f853000 [Sam3[17056]]
Cc: "10.4 10.5" <mesa-stable at lists.freedesktop.org>
Reviewed-by: Ilia Mirkin <imirkin at alum.mit.edu>
(cherry picked from commit f9e2295560f9b4869fa2a94933c1881ec7970af4)
diff --git a/src/gallium/drivers/nouveau/nouveau_buffer.c b/src/gallium/drivers/nouveau/nouveau_buffer.c
index 49ff100..32fa65c 100644
--- a/src/gallium/drivers/nouveau/nouveau_buffer.c
+++ b/src/gallium/drivers/nouveau/nouveau_buffer.c
@@ -846,17 +846,28 @@ nouveau_scratch_bo_alloc(struct nouveau_context *nv, struct nouveau_bo **pbo,
4096, size, NULL, pbo);
}
+static void
+nouveau_scratch_unref_bos(void *d)
+{
+ struct runout *b = d;
+ int i;
+
+ for (i = 0; i < b->nr; ++i)
+ nouveau_bo_ref(NULL, &b->bo[i]);
+
+ FREE(b);
+}
+
void
nouveau_scratch_runout_release(struct nouveau_context *nv)
{
- if (!nv->scratch.nr_runout)
+ if (!nv->scratch.runout)
+ return;
+
+ if (!nouveau_fence_work(nv->screen->fence.current, nouveau_scratch_unref_bos,
+ nv->scratch.runout))
return;
- do {
- --nv->scratch.nr_runout;
- nouveau_bo_ref(NULL, &nv->scratch.runout[nv->scratch.nr_runout]);
- } while (nv->scratch.nr_runout);
- FREE(nv->scratch.runout);
nv->scratch.end = 0;
nv->scratch.runout = NULL;
}
@@ -868,21 +879,26 @@ static INLINE boolean
nouveau_scratch_runout(struct nouveau_context *nv, unsigned size)
{
int ret;
- const unsigned n = nv->scratch.nr_runout++;
+ unsigned n;
- nv->scratch.runout = REALLOC(nv->scratch.runout,
- (n + 0) * sizeof(*nv->scratch.runout),
- (n + 1) * sizeof(*nv->scratch.runout));
- nv->scratch.runout[n] = NULL;
-
- ret = nouveau_scratch_bo_alloc(nv, &nv->scratch.runout[n], size);
+ if (nv->scratch.runout)
+ n = nv->scratch.runout->nr;
+ else
+ n = 0;
+ nv->scratch.runout = REALLOC(nv->scratch.runout, n == 0 ? 0 :
+ (sizeof(*nv->scratch.runout) + (n + 0) * sizeof(void *)),
+ sizeof(*nv->scratch.runout) + (n + 1) * sizeof(void *));
+ nv->scratch.runout->nr = n + 1;
+ nv->scratch.runout->bo[n] = NULL;
+
+ ret = nouveau_scratch_bo_alloc(nv, &nv->scratch.runout->bo[n], size);
if (!ret) {
- ret = nouveau_bo_map(nv->scratch.runout[n], 0, NULL);
+ ret = nouveau_bo_map(nv->scratch.runout->bo[n], 0, NULL);
if (ret)
- nouveau_bo_ref(NULL, &nv->scratch.runout[--nv->scratch.nr_runout]);
+ nouveau_bo_ref(NULL, &nv->scratch.runout->bo[--nv->scratch.runout->nr]);
}
if (!ret) {
- nv->scratch.current = nv->scratch.runout[n];
+ nv->scratch.current = nv->scratch.runout->bo[n];
nv->scratch.offset = 0;
nv->scratch.end = size;
nv->scratch.map = nv->scratch.current->map;
diff --git a/src/gallium/drivers/nouveau/nouveau_context.h b/src/gallium/drivers/nouveau/nouveau_context.h
index 14608d3..c2ba015 100644
--- a/src/gallium/drivers/nouveau/nouveau_context.h
+++ b/src/gallium/drivers/nouveau/nouveau_context.h
@@ -40,8 +40,10 @@ struct nouveau_context {
unsigned end;
struct nouveau_bo *bo[NOUVEAU_MAX_SCRATCH_BUFS];
struct nouveau_bo *current;
- struct nouveau_bo **runout;
- unsigned nr_runout;
+ struct runout {
+ unsigned nr;
+ struct nouveau_bo *bo[0];
+ } *runout;
unsigned bo_size;
} scratch;
@@ -71,7 +73,7 @@ static INLINE void
nouveau_scratch_done(struct nouveau_context *nv)
{
nv->scratch.wrap = nv->scratch.id;
- if (unlikely(nv->scratch.nr_runout))
+ if (unlikely(nv->scratch.runout))
nouveau_scratch_runout_release(nv);
}
commit b7c44cd5abcd2d6dd7b525368ed93f0f35d87644
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date: Sun Apr 5 17:40:44 2015 -0400
nv50,nvc0: limit the y-tiling of 3d textures to the first level's tiling
We limit y-tiling to 0x20 when depth is involved. However the function is
run for each miplevel, and the hardware expects miplevel 0 to have the
highest tiling settings. Perform the y-tiling limit on all levels of a
3d texture, not just the ones that have depth.
Fixes:
texelFetch fs sampler3D 98x129x1-98x129x9
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
Tested-by: Nick Tenney <nick.tenney at gmail.com> # GT216
Cc: "10.4 10.5" <mesa-stable at lists.freedesktop.org>
(cherry picked from commit ae720c66cb91c2640dfd6707446899694a24ab5b)
diff --git a/src/gallium/drivers/nouveau/nv50/nv50_miptree.c b/src/gallium/drivers/nouveau/nv50/nv50_miptree.c
index 2e41091..744a3a5 100644
--- a/src/gallium/drivers/nouveau/nv50/nv50_miptree.c
+++ b/src/gallium/drivers/nouveau/nv50/nv50_miptree.c
@@ -29,7 +29,8 @@
#include "nv50/nv50_resource.h"
uint32_t
-nv50_tex_choose_tile_dims_helper(unsigned nx, unsigned ny, unsigned nz)
+nv50_tex_choose_tile_dims_helper(unsigned nx, unsigned ny, unsigned nz,
+ boolean is_3d)
{
uint32_t tile_mode = 0x000;
@@ -41,7 +42,7 @@ nv50_tex_choose_tile_dims_helper(unsigned nx, unsigned ny, unsigned nz)
else
if (ny > 8) tile_mode = 0x010; /* height 16 tiles */
- if (nz == 1)
+ if (!is_3d)
return tile_mode;
else
if (tile_mode > 0x020)
@@ -52,14 +53,15 @@ nv50_tex_choose_tile_dims_helper(unsigned nx, unsigned ny, unsigned nz)
if (nz > 8) return tile_mode | 0x400; /* depth 16 tiles */
if (nz > 4) return tile_mode | 0x300; /* depth 8 tiles */
if (nz > 2) return tile_mode | 0x200; /* depth 4 tiles */
+ if (nz > 1) return tile_mode | 0x100; /* depth 2 tiles */
- return tile_mode | 0x100;
+ return tile_mode;
}
static uint32_t
-nv50_tex_choose_tile_dims(unsigned nx, unsigned ny, unsigned nz)
+nv50_tex_choose_tile_dims(unsigned nx, unsigned ny, unsigned nz, boolean is_3d)
{
- return nv50_tex_choose_tile_dims_helper(nx, ny * 2, nz);
+ return nv50_tex_choose_tile_dims_helper(nx, ny * 2, nz, is_3d);
}
static uint32_t
@@ -304,7 +306,7 @@ nv50_miptree_init_layout_tiled(struct nv50_miptree *mt)
lvl->offset = mt->total_size;
- lvl->tile_mode = nv50_tex_choose_tile_dims(nbx, nby, d);
+ lvl->tile_mode = nv50_tex_choose_tile_dims(nbx, nby, d, mt->layout_3d);
tsx = NV50_TILE_SIZE_X(lvl->tile_mode); /* x is tile row pitch in bytes */
tsy = NV50_TILE_SIZE_Y(lvl->tile_mode);
diff --git a/src/gallium/drivers/nouveau/nv50/nv50_resource.h b/src/gallium/drivers/nouveau/nv50/nv50_resource.h
index c06daa3..36d70d8 100644
--- a/src/gallium/drivers/nouveau/nv50/nv50_resource.h
+++ b/src/gallium/drivers/nouveau/nv50/nv50_resource.h
@@ -34,7 +34,8 @@ nv50_screen_init_resource_functions(struct pipe_screen *pscreen);
#endif /* __NVC0_RESOURCE_H__ */
uint32_t
-nv50_tex_choose_tile_dims_helper(unsigned nx, unsigned ny, unsigned nz);
+nv50_tex_choose_tile_dims_helper(unsigned nx, unsigned ny, unsigned nz,
+ boolean is_3d);
struct nv50_miptree_level {
uint32_t offset;
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_miptree.c b/src/gallium/drivers/nouveau/nvc0/nvc0_miptree.c
index 1beda7d..fc75fc6 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_miptree.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_miptree.c
@@ -29,9 +29,9 @@
#include "nvc0/nvc0_resource.h"
static uint32_t
-nvc0_tex_choose_tile_dims(unsigned nx, unsigned ny, unsigned nz)
+nvc0_tex_choose_tile_dims(unsigned nx, unsigned ny, unsigned nz, boolean is_3d)
{
- return nv50_tex_choose_tile_dims_helper(nx, ny, nz);
+ return nv50_tex_choose_tile_dims_helper(nx, ny, nz, is_3d);
}
static uint32_t
@@ -211,7 +211,7 @@ nvc0_miptree_init_layout_tiled(struct nv50_miptree *mt)
lvl->offset = mt->total_size;
- lvl->tile_mode = nvc0_tex_choose_tile_dims(nbx, nby, d);
+ lvl->tile_mode = nvc0_tex_choose_tile_dims(nbx, nby, d, mt->layout_3d);
tsx = NVC0_TILE_SIZE_X(lvl->tile_mode); /* x is tile row pitch in bytes */
tsy = NVC0_TILE_SIZE_Y(lvl->tile_mode);
commit a02e05f0fa071a002edffa84b2fd34be78075795
Author: Iago Toral Quiroga <itoral at igalia.com>
Date: Mon Mar 9 15:17:03 2015 +0100
i965: Do not render primitives in non-zero streams then TF is disabled
Haswell hardware seems to ignore Render Stream Select bits from
3DSTATE_STREAMOUT packet when the SOL stage is disabled even if
the PRM says otherwise. Because of this, all primitives are sent
down the pipeline for rasterization, which is wrong. If SOL is
enabled, Render Stream Select is honored and primitives bound to
non-zero streams are discarded after stream output.
Since the only purpose of primives sent to non-zero streams is to
be recorded by transform feedback, we can simply discard all geometry
bound to non-zero streams then transform feedback is disabled
to prevent it from ever reaching the rasterization stage.
Notice that this patch introduces a small change in the behavior we
get when a geometry shader emits more vertices than the maximum declared:
before, a vertex that was emitted to a non-zero stream when TF was
disabled would still count for the purposes of checking that we don't
exceed the maximum number of output vertices declared by the shader. With
this change, these vertices are completely ignored and won't increase
the output vertex count, making more room for other (hopefully more
useful) vertices.
Fixes piglit test arb_gpu_shader5-emitstreamvertex_nodraw on Haswell
and Broadwell.
v2 (Ken): Drop is_haswell check in favor of doing this unconditionally.
Broadwell needs the workaround as well, and it doesn't hurt to do it in
general. Also tweak comments - the Haswell PRM does actually mention
this ("Command Reference: Instructions" page 797).
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=83962
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
Cc: mesa-stable at lists.freedesktop.org
(cherry picked from commit 2042a2f961a07e04eaca0347e42859c249325531)
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp b/src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp
index 7a0ea3c..97cfd5d 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp
@@ -476,6 +476,19 @@ vec4_gs_visitor::visit(ir_emit_vertex *ir)
{
this->current_annotation = "emit vertex: safety check";
+ /* Haswell and later hardware ignores the "Render Stream Select" bits
+ * from the 3DSTATE_STREAMOUT packet when the SOL stage is disabled,
+ * and instead sends all primitives down the pipeline for rasterization.
+ * If the SOL stage is enabled, "Render Stream Select" is honored and
+ * primitives bound to non-zero streams are discarded after stream output.
+ *
+ * Since the only purpose of primives sent to non-zero streams is to
+ * be recorded by transform feedback, we can simply discard all geometry
+ * bound to these streams when transform feedback is disabled.
+ */
+ if (ir->stream_id() > 0 && shader_prog->TransformFeedback.NumVarying == 0)
+ return;
+
/* To ensure that we don't output more vertices than the shader specified
* using max_vertices, do the logic inside a conditional of the form "if
* (vertex_count < MAX)"
commit 11e7ae07417870241597a306ba202973088cbe57
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Thu Mar 26 17:21:10 2015 -0700
i965: Add forgotten multi-stream code to Gen8 SOL state.
Fixes Piglit's arb_gpu_shader5-xfb-streams-without-invocations.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Chris Forbes <chrisf at ijw.co.nz>
Cc: mesa-stable at lists.freedesktop.org
(cherry picked from commit f368d0fa1fe37a58780ee555d4a9ccf15474782b)
diff --git a/src/mesa/drivers/dri/i965/gen8_sol_state.c b/src/mesa/drivers/dri/i965/gen8_sol_state.c
index 1f122ec..d98a226 100644
--- a/src/mesa/drivers/dri/i965/gen8_sol_state.c
+++ b/src/mesa/drivers/dri/i965/gen8_sol_state.c
@@ -128,6 +128,15 @@ gen8_upload_3dstate_streamout(struct brw_context *brw, bool active,
dw2 |= urb_entry_read_offset << SO_STREAM_0_VERTEX_READ_OFFSET_SHIFT;
dw2 |= (urb_entry_read_length - 1) << SO_STREAM_0_VERTEX_READ_LENGTH_SHIFT;
+ dw2 |= urb_entry_read_offset << SO_STREAM_1_VERTEX_READ_OFFSET_SHIFT;
+ dw2 |= (urb_entry_read_length - 1) << SO_STREAM_1_VERTEX_READ_LENGTH_SHIFT;
+
+ dw2 |= urb_entry_read_offset << SO_STREAM_2_VERTEX_READ_OFFSET_SHIFT;
+ dw2 |= (urb_entry_read_length - 1) << SO_STREAM_2_VERTEX_READ_LENGTH_SHIFT;
+
+ dw2 |= urb_entry_read_offset << SO_STREAM_3_VERTEX_READ_OFFSET_SHIFT;
+ dw2 |= (urb_entry_read_length - 1) << SO_STREAM_3_VERTEX_READ_LENGTH_SHIFT;
+
/* Set buffer pitches; 0 means unbound. */
if (xfb_obj->Buffers[0])
dw3 |= linked_xfb_info->BufferStride[0] * 4;
commit b6ce705dac84ee95a640ba5828864681ec2f2887
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Sat Apr 4 02:00:52 2015 -0700
i965: Fix instanced geometry shaders on Gen8+.
Jordan added this in commit 741782b5948bb3d01d699f062a37513c2e73b076 for
Gen7 platforms. I missed this when adding the Broadwell code.
Fixes Piglit's spec/arb_gpu_shader5/invocation-id-{basic,in-separate-gs}
with MESA_EXTENSION_OVERRIDE=GL_ARB_gpu_shader5 set.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen at intel.com>
Reviewed-by: Chris Forbes <chrisf at ijw.co.nz>
Cc: mesa-stable at lists.freedesktop.org
(cherry picked from commit f9e5dc0a85df8dbfb8213ff772dfeb218972db12)
diff --git a/src/mesa/drivers/dri/i965/gen8_gs_state.c b/src/mesa/drivers/dri/i965/gen8_gs_state.c
index 95cc123..46b9713 100644
--- a/src/mesa/drivers/dri/i965/gen8_gs_state.c
+++ b/src/mesa/drivers/dri/i965/gen8_gs_state.c
@@ -82,6 +82,8 @@ gen8_upload_gs_state(struct brw_context *brw)
uint32_t dw7 = (brw->gs.prog_data->control_data_header_size_hwords <<
GEN7_GS_CONTROL_DATA_HEADER_SIZE_SHIFT) |
brw->gs.prog_data->dispatch_mode |
+ ((brw->gs.prog_data->invocations - 1) <<
+ GEN7_GS_INSTANCE_CONTROL_SHIFT) |
GEN6_GS_STATISTICS_ENABLE |
(brw->gs.prog_data->include_primitive_id ?
GEN7_GS_INCLUDE_PRIMITIVE_ID : 0) |
commit 71367a1bb4003434e12c229748afc7e89688e67c
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date: Fri Apr 3 23:57:43 2015 -0400
nv50: allocate more offset space for occlusion queries
Commit 1a170980a09 started writing to q->data[4]/[5] but kept the
per-query space at 16, which meant that in some cases we would write
past the end of the buffer. Rotate by 32, like nvc0 does. This ensures
that we always have 32 bytes in front of us, and the data writes will go
within the allocated space.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89679
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
Tested-by: Nick Tenney <nick.tenney at gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Reviewed-by: Tobias Klausmann <tobias.johannes.klausmann at mni.thm.de>
Cc: "10.4 10.5" <mesa-stable at lists.freedesktop.org>
(cherry picked from commit ba353935a392d2a43422f1d258456336b40b60ea)
diff --git a/src/gallium/drivers/nouveau/nv50/nv50_query.c b/src/gallium/drivers/nouveau/nv50/nv50_query.c
index e0671ce..c867bca 100644
--- a/src/gallium/drivers/nouveau/nv50/nv50_query.c
+++ b/src/gallium/drivers/nouveau/nv50/nv50_query.c
@@ -41,7 +41,7 @@ struct nv50_query {
uint32_t sequence;
struct nouveau_bo *bo;
uint32_t base;
- uint32_t offset; /* base + i * 16 */
+ uint32_t offset; /* base + i * 32 */
boolean ready;
boolean flushed;
boolean is64bit;
@@ -116,8 +116,8 @@ nv50_query_create(struct pipe_context *pipe, unsigned type, unsigned index)
q->type = type;
if (q->type == PIPE_QUERY_OCCLUSION_COUNTER) {
- q->offset -= 16;
- q->data -= 16 / sizeof(*q->data); /* we advance before query_begin ! */
+ q->offset -= 32;
+ q->data -= 32 / sizeof(*q->data); /* we advance before query_begin ! */
}
return (struct pipe_query *)q;
@@ -150,8 +150,8 @@ nv50_query_begin(struct pipe_context *pipe, struct pipe_query *pq)
* initialized it to TRUE.
*/
if (q->type == PIPE_QUERY_OCCLUSION_COUNTER) {
- q->offset += 16;
- q->data += 16 / sizeof(*q->data);
+ q->offset += 32;
+ q->data += 32 / sizeof(*q->data);
if (q->offset - q->base == NV50_QUERY_ALLOC_SPACE)
nv50_query_allocate(nv50, q, NV50_QUERY_ALLOC_SPACE);
commit f3b2698f6a0d3c74896d00630957deec018ebada
Author: Emil Velikov <emil.l.velikov at gmail.com>
Date: Sun Mar 29 13:46:31 2015 +0100
xmlpool: don't forget to ship the MOS
This will allow us to finally remove python from the build time
dependencies list. Considering that you're building from a release
tarball of course :-)
Cc: Bernd Kuhls <bernd.kuhls at t-online.de>
Reported-by: Bernd Kuhls <bernd.kuhls at t-online.de>
Cc: "10.5" <mesa-stable at lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov at gmail.com>
Reviewed-by: Matt Turner <mattst88 at gmail.com>
(cherry picked from commit a665b9b3c89095923cf2251895afc69c9f79aafe)
diff --git a/src/mesa/drivers/dri/common/xmlpool/Makefile.am b/src/mesa/drivers/dri/common/xmlpool/Makefile.am
index 5557716..9700499 100644
--- a/src/mesa/drivers/dri/common/xmlpool/Makefile.am
+++ b/src/mesa/drivers/dri/common/xmlpool/Makefile.am
@@ -52,7 +52,14 @@ POT=xmlpool.pot
.PHONY: all clean pot po mo
-EXTRA_DIST = gen_xmlpool.py options.h t_options.h $(POS) SConscript
+EXTRA_DIST = \
+ gen_xmlpool.py \
+ options.h \
+ t_options.h \
+ $(POS) \
+ $(MOS) \
+ SConscript
+
BUILT_SOURCES = options.h
CLEANFILES = $(MOS) options.h
commit 88e05a251fba232e2313e4bf81d2430ecdcadf10
Author: Tom Stellard <thomas.stellard at amd.com>
Date: Tue Mar 24 17:17:22 2015 +0000
clover: Return CL_BUILD_ERROR for CL_PROGRAM_BUILD_STATUS when compilation fails v2
v2:
- Don't use _errs map
Cc: 10.5 10.4 <mesa-stable at lists.freedesktop.org>
Reviewed-by: Francisco Jerez <currojerez at riseup.net>
(cherry picked from commit fda7558057a301a5a0ee1cb4d68f09ea39b03bb3)
diff --git a/src/gallium/state_trackers/clover/core/program.cpp b/src/gallium/state_trackers/clover/core/program.cpp
index 8553ca7..c07548c 100644
--- a/src/gallium/state_trackers/clover/core/program.cpp
+++ b/src/gallium/state_trackers/clover/core/program.cpp
@@ -90,6 +90,8 @@ cl_build_status
program::build_status(const device &dev) const {
if (_binaries.count(&dev))
return CL_BUILD_SUCCESS;
+ else if (_logs.count(&dev))
+ return CL_BUILD_ERROR;
else
return CL_BUILD_NONE;
}
commit 64d0f0e3b24c7d3ffd7bde921aadfccf3f12df0c
Author: Michel Dänzer <michel.daenzer at amd.com>
Date: Thu Mar 26 11:32:59 2015 +0900
radeonsi: Cache LLVMTargetMachineRef in context instead of in screen
Fixes a crash in genymotion with several threads compiling shaders
concurrently.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89746
Cc: 10.5 <mesa-stable at lists.freedesktop.org>
Reviewed-by: Tom Stellard <thomas.stellard at amd.com>
(cherry picked from commit d64adc3a79e419062432cfa8d1cbc437676a3fbd)
Conflicts:
src/gallium/drivers/radeonsi/si_shader.c
diff --git a/src/gallium/drivers/radeonsi/si_compute.c b/src/gallium/drivers/radeonsi/si_compute.c
index 5009f69..8ebcb8d 100644
--- a/src/gallium/drivers/radeonsi/si_compute.c
+++ b/src/gallium/drivers/radeonsi/si_compute.c
@@ -130,7 +130,8 @@ static void *si_create_compute_state(
for (i = 0; i < program->num_kernels; i++) {
LLVMModuleRef mod = radeon_llvm_get_kernel_module(program->llvm_ctx, i,
code, header->num_bytes);
- si_compile_llvm(sctx->screen, &program->kernels[i], mod);
+ si_compile_llvm(sctx->screen, &program->kernels[i], sctx->tm,
+ mod);
LLVMDisposeModule(mod);
}
}
diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c
index 26182c2..e761d20 100644
--- a/src/gallium/drivers/radeonsi/si_pipe.c
+++ b/src/gallium/drivers/radeonsi/si_pipe.c
@@ -69,6 +69,11 @@ static void si_destroy_context(struct pipe_context *context)
si_pm4_cleanup(sctx);
r600_common_context_cleanup(&sctx->b);
+
+#if HAVE_LLVM >= 0x0306
+ LLVMDisposeTargetMachine(sctx->tm);
+#endif
+
FREE(sctx);
}
@@ -77,6 +82,12 @@ static struct pipe_context *si_create_context(struct pipe_screen *screen, void *
struct si_context *sctx = CALLOC_STRUCT(si_context);
struct si_screen* sscreen = (struct si_screen *)screen;
struct radeon_winsys *ws = sscreen->b.ws;
+ LLVMTargetRef r600_target;
+#if HAVE_LLVM >= 0x0306
+ const char *triple = "amdgcn--";
+#else
+ const char *triple = "r600--";
+#endif
int shader, i;
if (sctx == NULL)
@@ -167,6 +178,17 @@ static struct pipe_context *si_create_context(struct pipe_screen *screen, void *
*/
sctx->scratch_waves = 32 * sscreen->b.info.max_compute_units;
+#if HAVE_LLVM >= 0x0306
+ /* Initialize LLVM TargetMachine */
+ r600_target = radeon_llvm_get_r600_target(triple);
+ sctx->tm = LLVMCreateTargetMachine(r600_target, triple,
+ r600_get_llvm_processor_name(sscreen->b.family),
+ "+DumpCode,+vgpr-spilling",
+ LLVMCodeGenLevelDefault,
+ LLVMRelocDefault,
+ LLVMCodeModelDefault);
+#endif
+
return &sctx->b.b;
fail:
si_destroy_context(&sctx->b.b);
@@ -435,12 +457,6 @@ static void si_destroy_screen(struct pipe_screen* pscreen)
if (!sscreen->b.ws->unref(sscreen->b.ws))
return;
-#if HAVE_LLVM >= 0x0306
- // r600_destroy_common_screen() frees sscreen, so we need to make
- // sure to dispose the TargetMachine before we call it.
- LLVMDisposeTargetMachine(sscreen->tm);
-#endif
-
r600_destroy_common_screen(&sscreen->b);
}
@@ -498,12 +514,7 @@ static bool si_initialize_pipe_config(struct si_screen *sscreen)
struct pipe_screen *radeonsi_screen_create(struct radeon_winsys *ws)
{
struct si_screen *sscreen = CALLOC_STRUCT(si_screen);
- LLVMTargetRef r600_target;
-#if HAVE_LLVM >= 0x0306
- const char *triple = "amdgcn--";
-#else
- const char *triple = "r600--";
-#endif
+
if (sscreen == NULL) {
return NULL;
}
@@ -531,13 +542,5 @@ struct pipe_screen *radeonsi_screen_create(struct radeon_winsys *ws)
/* Create the auxiliary context. This must be done last. */
sscreen->b.aux_context = sscreen->b.b.context_create(&sscreen->b.b, NULL);
-#if HAVE_LLVM >= 0x0306
- /* Initialize LLVM TargetMachine */
- r600_target = radeon_llvm_get_r600_target(triple);
- sscreen->tm = LLVMCreateTargetMachine(r600_target, triple,
- r600_get_llvm_processor_name(sscreen->b.family),
- "+DumpCode,+vgpr-spilling", LLVMCodeGenLevelDefault, LLVMRelocDefault,
- LLVMCodeModelDefault);
-#endif
return &sscreen->b.b;
}
diff --git a/src/gallium/drivers/radeonsi/si_pipe.h b/src/gallium/drivers/radeonsi/si_pipe.h
index 059fe0d..63fe54f 100644
--- a/src/gallium/drivers/radeonsi/si_pipe.h
+++ b/src/gallium/drivers/radeonsi/si_pipe.h
@@ -83,7 +83,6 @@ struct si_compute;
struct si_screen {
struct r600_common_screen b;
- LLVMTargetMachineRef tm;
};
struct si_sampler_view {
@@ -200,6 +199,8 @@ struct si_context {
struct pipe_resource *esgs_ring;
struct pipe_resource *gsvs_ring;
+ LLVMTargetMachineRef tm;
+
/* SI state handling */
union si_state queued;
union si_state emitted;
diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c
index 81ce3f6..a86d4b1 100644
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++ b/src/gallium/drivers/radeonsi/si_shader.c
@@ -72,6 +72,7 @@ struct si_shader_context
int param_streamout_offset[4];
int param_vertex_id;
int param_instance_id;
+ LLVMTargetMachineRef tm;
LLVMValueRef const_md;
LLVMValueRef const_resource[SI_NUM_CONST_BUFFERS];
LLVMValueRef ddxy_lds;
@@ -2638,13 +2639,13 @@ int si_shader_binary_read(struct si_screen *sscreen,
}
int si_compile_llvm(struct si_screen *sscreen, struct si_shader *shader,
- LLVMModuleRef mod)
+ LLVMTargetMachineRef tm, LLVMModuleRef mod)
{
int r = 0;
bool dump = r600_can_dump_shader(&sscreen->b,
shader->selector ? shader->selector->tokens : NULL);
r = radeon_llvm_compile(mod, &shader->binary,
- r600_get_llvm_processor_name(sscreen->b.family), dump, sscreen->tm);
+ r600_get_llvm_processor_name(sscreen->b.family), dump, tm);
if (r) {
return r;
@@ -2732,7 +2733,7 @@ static int si_generate_gs_copy_shader(struct si_screen *sscreen,
fprintf(stderr, "Copy Vertex Shader for Geometry Shader:\n\n");
r = si_compile_llvm(sscreen, si_shader_ctx->shader,
- bld_base->base.gallivm->module);
+ si_shader_ctx->tm, bld_base->base.gallivm->module);
radeon_llvm_dispose(&si_shader_ctx->radeon_bld);
@@ -2740,7 +2741,45 @@ static int si_generate_gs_copy_shader(struct si_screen *sscreen,
return r;
}
-int si_shader_create(struct si_screen *sscreen, struct si_shader *shader)
+static void si_dump_key(unsigned shader, union si_shader_key *key)
+{
+ int i;
+
+ fprintf(stderr, "SHADER KEY\n");
+
+ switch (shader) {
+ case PIPE_SHADER_VERTEX:
+ fprintf(stderr, " instance_divisors = {");
+ for (i = 0; i < Elements(key->vs.instance_divisors); i++)
+ fprintf(stderr, !i ? "%u" : ", %u",
+ key->vs.instance_divisors[i]);
+ fprintf(stderr, "}\n");
+
+ if (key->vs.as_es)
+ fprintf(stderr, " gs_used_inputs = 0x%"PRIx64"\n",
+ key->vs.gs_used_inputs);
+ fprintf(stderr, " as_es = %u\n", key->vs.as_es);
+ break;
+
+ case PIPE_SHADER_GEOMETRY:
+ break;
+
+ case PIPE_SHADER_FRAGMENT:
+ fprintf(stderr, " export_16bpc = 0x%X\n", key->ps.export_16bpc);
+ fprintf(stderr, " last_cbuf = %u\n", key->ps.last_cbuf);
+ fprintf(stderr, " color_two_side = %u\n", key->ps.color_two_side);
+ fprintf(stderr, " alpha_func = %u\n", key->ps.alpha_func);
+ fprintf(stderr, " alpha_to_one = %u\n", key->ps.alpha_to_one);
+ fprintf(stderr, " poly_stipple = %u\n", key->ps.poly_stipple);
+ break;
+
+ default:
+ assert(0);
+ }
+}
+
+int si_shader_create(struct si_screen *sscreen, LLVMTargetMachineRef tm,
+ struct si_shader *shader)
{
struct si_shader_selector *sel = shader->selector;
struct tgsi_token *tokens = sel->tokens;
@@ -2812,6 +2851,7 @@ int si_shader_create(struct si_screen *sscreen, struct si_shader *shader)
si_shader_ctx.shader = shader;
si_shader_ctx.type = tgsi_get_processor_type(tokens);
si_shader_ctx.screen = sscreen;
+ si_shader_ctx.tm = tm;
switch (si_shader_ctx.type) {
case TGSI_PROCESSOR_VERTEX:
@@ -2867,7 +2907,7 @@ int si_shader_create(struct si_screen *sscreen, struct si_shader *shader)
radeon_llvm_finalize_module(&si_shader_ctx.radeon_bld);
mod = bld_base->base.gallivm->module;
- r = si_compile_llvm(sscreen, shader, mod);
+ r = si_compile_llvm(sscreen, shader, tm, mod);
if (r) {
fprintf(stderr, "LLVM failed to compile shader\n");
goto out;
diff --git a/src/gallium/drivers/radeonsi/si_shader.h b/src/gallium/drivers/radeonsi/si_shader.h
index 551c7dc..0727b53 100644
--- a/src/gallium/drivers/radeonsi/si_shader.h
+++ b/src/gallium/drivers/radeonsi/si_shader.h
@@ -181,9 +181,10 @@ static inline struct si_shader* si_get_vs_state(struct si_context *sctx)
}
/* radeonsi_shader.c */
-int si_shader_create(struct si_screen *sscreen, struct si_shader *shader);
+int si_shader_create(struct si_screen *sscreen, LLVMTargetMachineRef tm,
+ struct si_shader *shader);
int si_compile_llvm(struct si_screen *sscreen, struct si_shader *shader,
- LLVMModuleRef mod);
+ LLVMTargetMachineRef tm, LLVMModuleRef mod);
void si_shader_destroy(struct pipe_context *ctx, struct si_shader *shader);
unsigned si_shader_io_get_unique_index(unsigned semantic_name, unsigned index);
int si_shader_binary_read(struct si_screen *sscreen, struct si_shader *shader,
diff --git a/src/gallium/drivers/radeonsi/si_state_shaders.c b/src/gallium/drivers/radeonsi/si_state_shaders.c
index 5b46336..ba3b31e 100644
--- a/src/gallium/drivers/radeonsi/si_state_shaders.c
+++ b/src/gallium/drivers/radeonsi/si_state_shaders.c
@@ -398,6 +398,7 @@ static INLINE void si_shader_selector_key(struct pipe_context *ctx,
static int si_shader_select(struct pipe_context *ctx,
struct si_shader_selector *sel)
{
+ struct si_context *sctx = (struct si_context *)ctx;
union si_shader_key key;
struct si_shader * shader = NULL;
int r;
@@ -437,7 +438,8 @@ static int si_shader_select(struct pipe_context *ctx,
shader->next_variant = sel->current;
sel->current = shader;
- r = si_shader_create((struct si_screen*)ctx->screen, shader);
+ r = si_shader_create((struct si_screen*)ctx->screen, sctx->tm,
+ shader);
if (unlikely(r)) {
R600_ERR("Failed to build shader variant (type=%u) %d\n",
sel->type, r);
commit 9a3a2479d49ac2e22e4c4b253a20e75aca38a77a
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date: Tue Mar 17 01:00:38 2015 -0400
freedreno/a3xx: point size should not be divided by 2
The division is probably a holdover from the days when the fixed point
inline functions generated by headergen were broken.
Also reduce the maximum point size to 4092 (vs 4096), which is what the
blob does.
Cc: "10.4 10.5" <mesa-stable at lists.freedesktop.org>
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
(cherry picked from commit 7fc5da8b9392042b5f8a989d2afa49ea1944f9a9)
diff --git a/src/gallium/drivers/freedreno/a3xx/fd3_rasterizer.c b/src/gallium/drivers/freedreno/a3xx/fd3_rasterizer.c
index 4b926b5..345f688 100644
--- a/src/gallium/drivers/freedreno/a3xx/fd3_rasterizer.c
+++ b/src/gallium/drivers/freedreno/a3xx/fd3_rasterizer.c
@@ -50,7 +50,7 @@ fd3_rasterizer_state_create(struct pipe_context *pctx,
if (cso->point_size_per_vertex) {
psize_min = util_get_min_point_size(cso);
- psize_max = 8192;
+ psize_max = 4092;
} else {
/* Force the point size to be as if the vertex output was disabled. */
psize_min = cso->point_size;
@@ -67,9 +67,9 @@ fd3_rasterizer_state_create(struct pipe_context *pctx,
*/
so->gras_cl_clip_cntl = A3XX_GRAS_CL_CLIP_CNTL_IJ_PERSP_CENTER; /* ??? */
so->gras_su_point_minmax =
- A3XX_GRAS_SU_POINT_MINMAX_MIN(psize_min/2) |
- A3XX_GRAS_SU_POINT_MINMAX_MAX(psize_max/2);
- so->gras_su_point_size = A3XX_GRAS_SU_POINT_SIZE(cso->point_size/2);
+ A3XX_GRAS_SU_POINT_MINMAX_MIN(psize_min) |
+ A3XX_GRAS_SU_POINT_MINMAX_MAX(psize_max);
+ so->gras_su_point_size = A3XX_GRAS_SU_POINT_SIZE(cso->point_size);
so->gras_su_poly_offset_scale =
A3XX_GRAS_SU_POLY_OFFSET_SCALE_VAL(cso->offset_scale);
so->gras_su_poly_offset_offset =
diff --git a/src/gallium/drivers/freedreno/freedreno_screen.c b/src/gallium/drivers/freedreno/freedreno_screen.c
index 1ce96d3..f4ae624 100644
--- a/src/gallium/drivers/freedreno/freedreno_screen.c
+++ b/src/gallium/drivers/freedreno/freedreno_screen.c
@@ -314,7 +314,7 @@ fd_screen_get_paramf(struct pipe_screen *pscreen, enum pipe_capf param)
case PIPE_CAPF_MAX_LINE_WIDTH_AA:
case PIPE_CAPF_MAX_POINT_WIDTH:
case PIPE_CAPF_MAX_POINT_WIDTH_AA:
- return 8192.0f;
+ return 4092.0f;
case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
return 16.0f;
case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
commit 61fc1295af5bbde3abe755fb263c1827c58688ae
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date: Sun Mar 15 16:38:42 2015 -0400
freedreno/a3xx: fix 3d texture layout
The SZ2 field contains the layer size of a lower miplevel. It only
contains 4 bits, which limits the maximum layer size it can describe. In
situations where the next miplevel would be too big, the hardware
appears to keep minifying the size until it hits one of that size.
Unfortunately the hardware's ideas about sizes can differ from
freedreno's which can still lead to issues. Minimize those by stopping
to minify as soon as possible.
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
Cc: "10.4 10.5" <mesa-stable at lists.freedesktop.org>
(cherry picked from commit 738c8319ac85b175994b35d1fdc4860e18184b93)
diff --git a/src/gallium/drivers/freedreno/a3xx/fd3_texture.c b/src/gallium/drivers/freedreno/a3xx/fd3_texture.c
index 567f6c7..59b3a93 100644
--- a/src/gallium/drivers/freedreno/a3xx/fd3_texture.c
+++ b/src/gallium/drivers/freedreno/a3xx/fd3_texture.c
@@ -212,6 +212,7 @@ fd3_sampler_view_create(struct pipe_context *pctx, struct pipe_resource *prsc,
struct fd_resource *rsc = fd_resource(prsc);
unsigned lvl = cso->u.tex.first_level;
unsigned miplevels = cso->u.tex.last_level - lvl;
+ uint32_t sz2 = 0;
if (!so)
return NULL;
@@ -252,8 +253,10 @@ fd3_sampler_view_create(struct pipe_context *pctx, struct pipe_resource *prsc,
case PIPE_TEXTURE_3D:
so->texconst3 =
A3XX_TEX_CONST_3_DEPTH(u_minify(prsc->depth0, lvl)) |
- A3XX_TEX_CONST_3_LAYERSZ1(rsc->slices[0].size0) |
- A3XX_TEX_CONST_3_LAYERSZ2(rsc->slices[0].size0);
+ A3XX_TEX_CONST_3_LAYERSZ1(rsc->slices[lvl].size0);
+ while (lvl < cso->u.tex.last_level && sz2 != rsc->slices[lvl+1].size0)
+ sz2 = rsc->slices[++lvl].size0;
+ so->texconst3 |= A3XX_TEX_CONST_3_LAYERSZ2(sz2);
break;
default:
so->texconst3 = 0x00000000;
diff --git a/src/gallium/drivers/freedreno/freedreno_resource.c b/src/gallium/drivers/freedreno/freedreno_resource.c
index 69e5452..efafb89 100644
--- a/src/gallium/drivers/freedreno/freedreno_resource.c
+++ b/src/gallium/drivers/freedreno/freedreno_resource.c
@@ -215,14 +215,20 @@ setup_slices(struct fd_resource *rsc, uint32_t alignment)
slice->pitch = width = align(width, 32);
slice->offset = size;
- /* 1d array, 2d array, 3d textures (but not cube!) must all have the
- * same layer size for each miplevel on a3xx. These are also the
- * targets that have non-1 alignment.
+ /* 1d array and 2d array textures must all have the same layer size
+ * for each miplevel on a3xx. 3d textures can have different layer
+ * sizes for high levels, but the hw auto-sizer is buggy (or at least
+ * different than what this code does), so as soon as the layer size
+ * range gets into range, we stop reducing it.
*/
- if (level == 0 || layers_in_level == 1 || alignment == 1)
+ if (prsc->target == PIPE_TEXTURE_3D && (
+ level == 1 ||
+ (level > 1 && rsc->slices[level - 1].size0 > 0xf000)))
+ slice->size0 = align(slice->pitch * height * rsc->cpp, alignment);
+ else if (level == 0 || rsc->layer_first || alignment == 1)
slice->size0 = align(slice->pitch * height * rsc->cpp, alignment);
else
- slice->size0 = rsc->slices[0].size0;
+ slice->size0 = rsc->slices[level - 1].size0;
size += slice->size0 * depth * layers_in_level;
commit ac46cf31fc897cad098901686cc2caf5921a39cb
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date: Fri Mar 27 18:38:24 2015 -0400
nv50/ir/gk110: fix offset flag position for TXD opcode
Cc: "10.4 10.5" <mesa-stable at lists.freedesktop.org>
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
(cherry picked from commit 58030a8f99d94d6c1bab02ef113d93c6c2636216)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp
index d8adc93..a8c2619 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp
@@ -1116,6 +1116,7 @@ CodeEmitterGK110::emitTEX(const TexInstruction *i)
if (i->tex.useOffsets == 1) {
switch (i->op) {
case OP_TXF: code[1] |= 0x200; break;
+ case OP_TXD: code[1] |= 0x00400000; break;
default: code[1] |= 0x800; break;
}
}
commit c8d962c205bc5d6f81f3d083d90ecaf66f78b1e8
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date: Wed Mar 25 18:00:00 2015 -0400
nv50/ir: take postFactor into account when doing peephole optimizations
Multiply operations can have a post-factor on them, which other ops
don't support. Only perform the peephole optimizations when there is no
post-factor involved.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89758
Cc: "10.4 10.5" <mesa-stable at lists.freedesktop.org>
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
(cherry picked from commit 49b86007aa2bb599ada6cdbed7ff56246917f12e)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
index 21d20ca..9e2a933 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
@@ -422,7 +422,9 @@ ConstantFolding::expr(Instruction *i,
b->data.f32 = 0.0f;
}
switch (i->dType) {
- case TYPE_F32: res.data.f32 = a->data.f32 * b->data.f32; break;
+ case TYPE_F32:
+ res.data.f32 = a->data.f32 * b->data.f32 * exp2f(i->postFactor);
+ break;
case TYPE_F64: res.data.f64 = a->data.f64 * b->data.f64; break;
case TYPE_S32:
if (i->subOp == NV50_IR_SUBOP_MUL_HIGH) {
@@ -550,6 +552,7 @@ ConstantFolding::expr(Instruction *i,
i->src(0).mod = Modifier(0);
i->src(1).mod = Modifier(0);
+ i->postFactor = 0;
i->setSrc(0, new_ImmediateValue(i->bb->getProgram(), res.data.u32));
i->setSrc(1, NULL);
@@ -653,7 +656,7 @@ ConstantFolding::tryCollapseChainedMULs(Instruction *mul2,
Instruction *insn;
Instruction *mul1 = NULL; // mul1 before mul2
int e = 0;
- float f = imm2.reg.data.f32;
+ float f = imm2.reg.data.f32 * exp2f(mul2->postFactor);
ImmediateValue imm1;
assert(mul2->op == OP_MUL && mul2->dType == TYPE_F32);
@@ -753,9 +756,10 @@ ConstantFolding::opnd(Instruction *i, ImmediateValue &imm0, int s)
i->op = OP_MOV;
i->setSrc(0, new_ImmediateValue(prog, 0u));
i->src(0).mod = Modifier(0);
+ i->postFactor = 0;
i->setSrc(1, NULL);
} else
- if (imm0.isInteger(1) || imm0.isInteger(-1)) {
+ if (!i->postFactor && (imm0.isInteger(1) || imm0.isInteger(-1))) {
if (imm0.isNegative())
i->src(t).mod = i->src(t).mod ^ Modifier(NV50_IR_MOD_NEG);
i->op = i->src(t).mod.getOp();
@@ -768,7 +772,7 @@ ConstantFolding::opnd(Instruction *i, ImmediateValue &imm0, int s)
i->src(0).mod = 0;
i->setSrc(1, NULL);
} else
- if (imm0.isInteger(2) || imm0.isInteger(-2)) {
+ if (!i->postFactor && (imm0.isInteger(2) || imm0.isInteger(-2))) {
if (imm0.isNegative())
i->src(t).mod = i->src(t).mod ^ Modifier(NV50_IR_MOD_NEG);
i->op = OP_ADD;
commit 407365e375ca7ba78d95c2e3f189a837201bcc22
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date: Thu Mar 26 15:14:22 2015 -0400
st/mesa: update arrays when the current attrib has been updated
Fixes the recently-sent gl-2.0-vertex-const-attr piglit test. Makes sure
to revalidate arrays when only the current attribute has been updated
via glVertexAttrib*.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89754
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak at amd.com>
Cc: "10.4 10.5" <mesa-stable at lists.freedesktop.org>
(cherry picked from commit 9d1b5febb62d74c9fc564635d4e0fa5207928c46)
diff --git a/src/mesa/state_tracker/st_atom_array.c b/src/mesa/state_tracker/st_atom_array.c
index 9b52f97..d4fb8b8 100644
--- a/src/mesa/state_tracker/st_atom_array.c
+++ b/src/mesa/state_tracker/st_atom_array.c
@@ -598,7 +598,7 @@ static void update_array(struct st_context *st)
const struct st_tracked_state st_update_array = {
"st_update_array", /* name */
{ /* dirty */
- 0, /* mesa */
+ _NEW_CURRENT_ATTRIB, /* mesa */
ST_NEW_VERTEX_ARRAYS | ST_NEW_VERTEX_PROGRAM, /* st */
},
update_array /* update */
commit 712466fb53b5f5086159a8bb883adfdf169f4f00
Author: Dave Airlie <airlied at redhat.com>
Date: Thu Mar 26 09:17:39 2015 +1000
st_glsl_to_tgsi: only do mov copy propagation on temps (v2)
Don't propagate ARRAYs
This should fix:
https://bugs.freedesktop.org/show_bug.cgi?id=89759
v2: just specify arrays so we get input propagation
Signed-off-by: Dave Airlie <airlied at redhat.com>
Cc: mesa-stable at lists.freedesktop.org
Reviewed-by: Ilia Mirkin <imirkin at alum.mit.edu>
(cherry picked from commit 91e3533481d6921c4b46109742d6f67b7f897f86)
diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
index a9ea8c8..7abb85a 100644
--- a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
+++ b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
@@ -3668,6 +3668,7 @@ glsl_to_tgsi_visitor::copy_propagate(void)
inst->dst.index == inst->src[0].index) &&
!inst->dst.reladdr &&
!inst->saturate &&
+ inst->src[0].file != PROGRAM_ARRAY &&
!inst->src[0].reladdr &&
!inst->src[0].reladdr2 &&
!inst->src[0].negate) {
commit ff87ae1e003be7104d3550250af3343c01cea882
Author: Emil Velikov <emil.l.velikov at gmail.com>
Date: Sat Mar 28 18:50:31 2015 +0000
docs: Add sha256 sums for the 10.5.2 release
Signed-off-by: Emil Velikov <emil.l.velikov at gmail.com>
diff --git a/docs/relnotes/10.5.2.html b/docs/relnotes/10.5.2.html
index b094b98..9114199 100644
--- a/docs/relnotes/10.5.2.html
+++ b/docs/relnotes/10.5.2.html
@@ -31,7 +31,8 @@ because compatibility contexts are not supported.
<h2>SHA256 checksums</h2>
<pre>
-TBD
+755220e160a9f22fda0dffd47746f997b6e196d03f8edc390df7793aecaaa541 mesa-10.5.2.tar.gz
+2f4b6fb77c3e7d6f861558d0884a3073f575e1e673dad8d1b0624e78e9c4dd44 mesa-10.5.2.tar.xz
</pre>
commit 5e59f895c468c1ac497ad925b8bddd7f227c89a2
Author: Emil Velikov <emil.l.velikov at gmail.com>
Date: Sat Mar 28 18:42:51 2015 +0000
Add release notes for the 10.5.2 release
Signed-off-by: Emil Velikov <emil.l.velikov at gmail.com>
diff --git a/docs/relnotes/10.5.2.html b/docs/relnotes/10.5.2.html
new file mode 100644
index 0000000..b094b98
--- /dev/null
+++ b/docs/relnotes/10.5.2.html
@@ -0,0 +1,129 @@
+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
+<html lang="en">
+<head>
+ <meta http-equiv="content-type" content="text/html; charset=utf-8">
+ <title>Mesa Release Notes</title>
+ <link rel="stylesheet" type="text/css" href="../mesa.css">
+</head>
+<body>
+
+<div class="header">
+ <h1>The Mesa 3D Graphics Library</h1>
+</div>
+
+<iframe src="../contents.html"></iframe>
+<div class="content">
+
+<h1>Mesa 10.5.2 Release Notes / March 28, 2015</h1>
+
+<p>
+Mesa 10.5.2 is a bug fix release which fixes bugs found since the 10.5.1 release.
+</p>
+<p>
+Mesa 10.5.2 implements the OpenGL 3.3 API, but the version reported by
+glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
+glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
+Some drivers don't support all the features required in OpenGL 3.3. OpenGL
+3.3 is <strong>only</strong> available if requested at context creation
+because compatibility contexts are not supported.
+</p>
+
+
+<h2>SHA256 checksums</h2>
+<pre>
+TBD
+</pre>
+
+
+<h2>New features</h2>
+<p>None</p>
+
+<h2>Bug fixes</h2>
+
+<p>This list is likely incomplete.</p>
+
+<ul>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=88534">Bug 88534</a> - include/c11/threads_posix.h PTHREAD_MUTEX_RECURSIVE_NP not defined</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89328">Bug 89328</a> - python required to build Mesa release tarballs</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89530">Bug 89530</a> - FTBFS in loader: missing fstat</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89590">Bug 89590</a> - Crash in glLinkProgram with shaders with multiple constant arrays</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89680">Bug 89680</a> - Hard link exist in Mesa 10.5.1 sources</li>
+
+</ul>
+
+
+<h2>Changes</h2>
+
+<p>Anuj Phogat (1):</p>
+<ul>
+ <li>glsl: Generate link error for non-matching gl_FragCoord redeclarations</li>
+</ul>
+
+<p>Emil Velikov (7):</p>
+<ul>
+ <li>docs: Add sha256 sums for the 10.5.1 release</li>
+ <li>automake: add missing egl files to the tarball</li>
+ <li>st/egl: don't ship the dri2.c link at the tarball</li>
+ <li>loader: include <sys/stat.h> for non-sysfs builds</li>
+ <li>auxiliary/os: fix the android build - s/drm_munmap/os_munmap/</li>
+ <li>cherry-ignore: add commit non applicable for 10.5</li>
+ <li>Update version to 10.5.2</li>
+</ul>
+
+<p>Felix Janda (1):</p>
+<ul>
+ <li>c11/threads: Use PTHREAD_MUTEX_RECURSIVE by default</li>
+</ul>
+
+<p>Francisco Jerez (1):</p>
+<ul>
+ <li>i965: Set nr_params to the number of uniform components in the VS/GS path.</li>
+</ul>
+
+<p>Ilia Mirkin (2):</p>
+<ul>
+ <li>freedreno/a3xx: use the same layer size for all slices</li>
+ <li>freedreno: fix slice pitch calculations</li>
+</ul>
+
+<p>Marek Olšák (1):</p>
+<ul>
+ <li>radeonsi: increase coords array size for radeon_llvm_emit_prepare_cube_coords</li>
+</ul>
+
+<p>Mario Kleiner (2):</p>
+<ul>
+ <li>glx: Handle out-of-sequence swap completion events correctly. (v2)</li>
+ <li>mapi: Make private copies of name strings provided by client.</li>
+</ul>
+
+<p>Rob Clark (1):</p>
+<ul>
+ <li>freedreno: update generated headers</li>
+</ul>
+
+<p>Samuel Iglesias Gonsalvez (2):</p>
+<ul>
+ <li>glsl: optimize (0 cmp x + y) into (-x cmp y).</li>
+ <li>configure: Introduce new output variable to ax_check_python_mako_module.m4</li>
+</ul>
+
+<p>Tapani Pälli (1):</p>
+<ul>
+ <li>glsl: fix names in lower_constant_arrays_to_uniforms</li>
+</ul>
+
+<p>Tom Stellard (1):</p>
+<ul>
+ <li>clover: Return 0 as storage size for local kernel args that are not set v2</li>
+</ul>
+
+
+</div>
+</body>
+</html>
commit ebbfa79755b09701db9381171d22cab48e947bfa
Author: Emil Velikov <emil.l.velikov at gmail.com>
Date: Sat Mar 28 18:36:03 2015 +0000
Update version to 10.5.2
Signed-off-by: Emil Velikov <emil.l.velikov at gmail.com>
diff --git a/VERSION b/VERSION
index 4a6e70e..a39233b 100644
--- a/VERSION
+++ b/VERSION
@@ -1 +1 @@
-10.5.1
+10.5.2
commit fda3bc1e039c8a97a2f204ca5746a02045719259
Author: Emil Velikov <emil.l.velikov at gmail.com>
Date: Sat Mar 28 18:33:46 2015 +0000
cherry-ignore: add commit non applicable for 10.5
Signed-off-by: Emil Velikov <emil.l.velikov at gmail.com>
diff --git a/bin/.cherry-ignore b/bin/.cherry-ignore
index 58c07fb..ec06241 100644
--- a/bin/.cherry-ignore
+++ b/bin/.cherry-ignore
@@ -21,3 +21,6 @@ d22391cb165af4ed2f9a9e5d6233072a432cc969
fe5fddd7e2df74233a2a02ae021418485f39d11c
# xmlpool: make sure we ship options.h
8d8ca64c28170ec7e9ffa01638bcf8fd30a96088
+
+# The optimisations mentioned are not available in 10.5
+627c68308683abbd6e563a09af6013a33938a790 i965/fs: in MAD optimizations, switch last argument to be immediate
commit e98909b0567b8a83a6a953cfa4ee4e7beef436b9
Author: Samuel Iglesias Gonsalvez <siglesias at igalia.com>
Date: Mon Mar 2 10:49:31 2015 +0100
configure: Introduce new output variable to ax_check_python_mako_module.m4
This output variables gives more flexibility for future changes
in autoconf to detect if it is needed to auto-generate files and
check for the auto-generation dependencies.
It is still returning error when Python is not installed.
Signed-off-by: Samuel Iglesias Gonsalvez <siglesias at igalia.com>
Reviewed-by: Kai Wasserbäch <kai at dev.carbon-project.org>
(cherry picked from commit ced9425327be6cb557a4a1217a1dac29b18d1a09)
Squashed with commit
configure.ac: move AC_MSG_RESULT reporting back into the m4 macro
The one who does AC_MSG_CHECKING should provide the AC_MSG_RESULT.
Fixes: ced9425327b (configure: Introduce new output variable to
ax_check_python_mako_module.m4"
Cc: "10.5" <mesa-stable at lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89328
Signed-off-by: Emil Velikov <emil.l.velikov at gmail.com>
Reviewed-by: Samuel Iglesias Gonsalvez <siglesias at igalia.com>
(cherry picked from commit 248eb54eb6117cc5a863ba2deaa14c3bee0b5d41)
diff --git a/configure.ac b/configure.ac
index f596a9d..20e6d62 100644
--- a/configure.ac
+++ b/configure.ac
@@ -78,6 +78,7 @@ XCBDRI2_REQUIRED=1.8
XCBGLX_REQUIRED=1.8.1
XSHMFENCE_REQUIRED=1.1
XVMC_REQUIRED=1.0.6
+PYTHON_MAKO_REQUIRED=0.3.4
dnl Check for progs
AC_PROG_CPP
@@ -113,7 +114,10 @@ if test "x$INDENT" != "xcat"; then
fi
fi
-AX_CHECK_PYTHON_MAKO_MODULE(0.3.4)
+AX_CHECK_PYTHON_MAKO_MODULE($PYTHON_MAKO_REQUIRED)
+if test -n "$PYTHON2" -a "x$acv_mako_found" != "xyes"; then
+ AC_MSG_ERROR([Python mako module v$PYTHON_MAKO_REQUIRED or higher not found])
+fi
AC_PROG_INSTALL
diff --git a/m4/ax_check_python_mako_module.m4 b/m4/ax_check_python_mako_module.m4
index 2fc029b..7d9bb51 100644
--- a/m4/ax_check_python_mako_module.m4
+++ b/m4/ax_check_python_mako_module.m4
@@ -54,8 +54,10 @@ else:
" | $PYTHON2 -
if test $? -ne 0 ; then
- AC_MSG_ERROR(mako $1 or later is required.)
+ AC_MSG_RESULT(no)
+ AC_SUBST(acv_mako_found, 'no')
else
- AC_MSG_RESULT(yes)
+ AC_MSG_RESULT(yes)
+ AC_SUBST(acv_mako_found, 'yes')
fi
])
commit d83d2ea9a6562314388c0a1941137001960b6453
Author: Anuj Phogat <anuj.phogat at gmail.com>
Date: Thu Mar 5 11:07:52 2015 -0800
glsl: Generate link error for non-matching gl_FragCoord redeclarations
in different fragment shaders. This also applies to a case when gl_FragCoord
is redeclared with no layout qualifiers in one fragment shader and not
declared but used in other fragment shader.
Signed-off-by: Anuj Phogat <anuj.phogat at gmail.com>
Khronos Bug#12957
Cc: "10.5" <mesa-stable at lists.freedesktop.org>
Reviewed-by: Chris Forbes <chrisf at ijw.co.nz>
(cherry picked from commit d8208312a3a200b4e6d71ce533d835b2d705234a)
diff --git a/src/glsl/linker.cpp b/src/glsl/linker.cpp
index 3f5eac1..01526de 100644
--- a/src/glsl/linker.cpp
+++ b/src/glsl/linker.cpp
@@ -1364,24 +1364,13 @@ link_fs_input_layout_qualifiers(struct gl_shader_program *prog,
* "If gl_FragCoord is redeclared in any fragment shader in a program,
* it must be redeclared in all the fragment shaders in that program
* that have a static use gl_FragCoord."
- *
- * Exclude the case when one of the 'linked_shader' or 'shader' redeclares
- * gl_FragCoord with no layout qualifiers but the other one doesn't
- * redeclare it. If we strictly follow GLSL 1.50 spec's language, it
- * should be a link error. But, generating link error for this case will
- * be a wrong behaviour which spec didn't intend to do and it could also
- * break some applications.
*/
if ((linked_shader->redeclares_gl_fragcoord
&& !shader->redeclares_gl_fragcoord
- && shader->uses_gl_fragcoord
- && (linked_shader->origin_upper_left
- || linked_shader->pixel_center_integer))
+ && shader->uses_gl_fragcoord)
|| (shader->redeclares_gl_fragcoord
&& !linked_shader->redeclares_gl_fragcoord
- && linked_shader->uses_gl_fragcoord
- && (shader->origin_upper_left
- || shader->pixel_center_integer))) {
+ && linked_shader->uses_gl_fragcoord)) {
linker_error(prog, "fragment shader defined with conflicting "
"layout qualifiers for gl_FragCoord\n");
}
commit d6413ed98fe07479d16cd2033d5379e06e5ce6d7
Author: Mario Kleiner <mario.kleiner.de at gmail.com>
Date: Thu Mar 12 23:34:12 2015 +0100
mapi: Make private copies of name strings provided by client.
glXGetProcAddress("glFoo") ends up in stub_add_dynamic() to
create dynamic stubs for dynamic functions. stub_add_dynamic()
doesn't store the caller provided name string "Foo" in a mesa
private copy, but just stores a pointer to the "glFoo" string
passed to glXGetProcAddress - a pointer into arbitrary memory
outside mesa's control.
If the caller passes some dynamically allocated/changing
memory buffer to glXGetProcAddress(), or the caller gets unmapped
from memory, e.g., some dynamically loaded application
plugin which uses OpenGL, this ends badly - with a dangling
pointer.
strdup() the name string provided by the client to avoid
this problem.
Cc: "10.3 10.4 10.5" <mesa-stable at lists.freedesktop.org>
Signed-off-by: Mario Kleiner <mario.kleiner.de at gmail.com>
Reviewed-by: Brian Paul <brianp at vmware.com>
(cherry picked from commit 1110113a7f0b6f9b21dd26dee8e95a021041c71c)
diff --git a/src/mapi/stub.c b/src/mapi/stub.c
index dfadbe1..45ccc6a 100644
--- a/src/mapi/stub.c
+++ b/src/mapi/stub.c
@@ -110,7 +110,7 @@ stub_add_dynamic(const char *name)
if (!stub->addr)
return NULL;
- stub->name = (const void *) name;
+ stub->name = (const void *) strdup(name);
/* to be fixed later */
stub->slot = -1;
commit 3147f0bd25c45c9bd2a2b1fec622eb1821e11df8
Author: Tom Stellard <thomas.stellard at amd.com>
Date: Fri Mar 20 22:19:43 2015 +0000
clover: Return 0 as storage size for local kernel args that are not set v2
The storage size for local kernel args can be queried before the
arguments are set by using the CL_KERNEL_LOCAL_MEM_SIZE param
of clGetKernelWorkGroupInfo().
The spec says that if local kernel arguments have not been specified,
then we should assume their size is 0.
v2:
- Implement using c++11 member initialization.
Reviewed-by: Jan Vesely <jan.vesely at rutgers.edu>
Reviewed-by: Francisco Jerez <currojerez at riseup.net>
Cc: 10.5 10.4 <mesa-stable at lists.freedesktop.org>
(cherry picked from commit dfb1ae9d914b7723ef50fdd2efe811feebc045ad)
diff --git a/src/gallium/state_trackers/clover/core/kernel.hpp b/src/gallium/state_trackers/clover/core/kernel.hpp
index bf5998d..d6432a4 100644
--- a/src/gallium/state_trackers/clover/core/kernel.hpp
+++ b/src/gallium/state_trackers/clover/core/kernel.hpp
@@ -175,7 +175,7 @@ namespace clover {
virtual void unbind(exec_context &ctx);
private:
- size_t _storage;
+ size_t _storage = 0;
};
class constant_argument : public argument {
commit c2760f0a1603b12b64237252d12b611b1d7883f3
Author: Tapani Pälli <tapani.palli at intel.com>
Date: Mon Mar 23 09:12:35 2015 +0200
glsl: fix names in lower_constant_arrays_to_uniforms
Patch changes lowering pass to use unique name for each uniform
so that arrays from different stages cannot end up having same
name.
v2: instead of global counter, use pointer to achieve
unique name (Kenneth Graunke)
Signed-off-by: Tapani Pälli <tapani.palli at intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89590
Reviewed-by: Chris Forbes <chrisf at ijw.co.nz>
Cc: 10.5 10.4 <mesa-stable at lists.freedesktop.org>
(cherry picked from commit 3cf99701ba6c9e56c9126fdbb74107a31ffcbcfb)
diff --git a/src/glsl/lower_const_arrays_to_uniforms.cpp b/src/glsl/lower_const_arrays_to_uniforms.cpp
index 2243f47..44967dc 100644
--- a/src/glsl/lower_const_arrays_to_uniforms.cpp
+++ b/src/glsl/lower_const_arrays_to_uniforms.cpp
@@ -49,7 +49,6 @@ public:
{
instructions = insts;
progress = false;
- index = 0;
}
bool run()
@@ -63,7 +62,6 @@ public:
private:
exec_list *instructions;
bool progress;
- unsigned index;
};
void
@@ -82,7 +80,7 @@ lower_const_array_visitor::handle_rvalue(ir_rvalue **rvalue)
void *mem_ctx = ralloc_parent(con);
- char *uniform_name = ralloc_asprintf(mem_ctx, "constarray__%d", index++);
+ char *uniform_name = ralloc_asprintf(mem_ctx, "constarray__%p", dra);
ir_variable *uni =
new(mem_ctx) ir_variable(con->type, uniform_name, ir_var_uniform);
commit 859b4afc973a27f4aeb6ee68d5a019d9210c0ac9
Author: Francisco Jerez <currojerez at riseup.net>
Date: Thu Jan 22 17:08:23 2015 +0200
i965: Set nr_params to the number of uniform components in the VS/GS path.
Both do_vs_prog and do_gs_prog initialize brw_stage_prog_data::nr_params to
the number of uniform *vectors* required by the shader rather than the number
of uniform components, contradicting the comment. This is inconsistent with
what the state upload code and scalar path expect but it happens to work until
Gen8 because vec4_visitor interprets it as a number of vectors on construction
and later on overwrites its original value with the number of uniform
components referenced by the shader.
Also there's no need to add the number of samplers, they're not actually
passed in as uniforms.
Fixes a memory corruption issue on BDW with SIMD8 VS.
Cc: "10.5" <mesa-stable at lists.freedesktop.org>
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
(cherry picked from commit fd149628e142af769c1c0ec037bc297d8a3e871f)
[Emil Velikov: s/DIV_ROUND_UP/CEILING/]
Signed-off-by: Emil Velikov <emil.l.velikov at gmail.com>
diff --git a/src/mesa/drivers/dri/i965/brw_gs.c b/src/mesa/drivers/dri/i965/brw_gs.c
index d96a21e..aad9b0c 100644
--- a/src/mesa/drivers/dri/i965/brw_gs.c
+++ b/src/mesa/drivers/dri/i965/brw_gs.c
@@ -69,11 +69,7 @@ do_gs_prog(struct brw_context *brw,
rzalloc_array(NULL, const gl_constant_value *, param_count);
c.prog_data.base.base.pull_param =
rzalloc_array(NULL, const gl_constant_value *, param_count);
- /* Setting nr_params here NOT to the size of the param and pull_param
- * arrays, but to the number of uniform components vec4_visitor
- * needs. vec4_visitor::setup_uniforms() will set it back to a proper value.
- */
- c.prog_data.base.base.nr_params = ALIGN(param_count, 4) / 4 + gs->num_samplers;
+ c.prog_data.base.base.nr_params = param_count;
if (brw->gen >= 7) {
if (gp->program.OutputType == GL_POINTS) {
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
index 3912a49..1add0bd 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
@@ -3628,7 +3628,8 @@ vec4_visitor::vec4_visitor(struct brw_context *brw,
*/
this->uniform_array_size = 1;
if (prog_data) {
- this->uniform_array_size = MAX2(stage_prog_data->nr_params, 1);
+ this->uniform_array_size =
+ MAX2(CEILING(stage_prog_data->nr_params, 4), 1);
}
this->uniform_size = rzalloc_array(mem_ctx, int, this->uniform_array_size);
diff --git a/src/mesa/drivers/dri/i965/brw_vs.c b/src/mesa/drivers/dri/i965/brw_vs.c
index 2d56b74..f360d4e 100644
--- a/src/mesa/drivers/dri/i965/brw_vs.c
+++ b/src/mesa/drivers/dri/i965/brw_vs.c
@@ -241,15 +241,7 @@ do_vs_prog(struct brw_context *brw,
rzalloc_array(NULL, const gl_constant_value *, param_count);
stage_prog_data->pull_param =
rzalloc_array(NULL, const gl_constant_value *, param_count);
-
- /* Setting nr_params here NOT to the size of the param and pull_param
- * arrays, but to the number of uniform components vec4_visitor
- * needs. vec4_visitor::setup_uniforms() will set it back to a proper value.
- */
- stage_prog_data->nr_params = ALIGN(param_count, 4) / 4;
- if (vs) {
- stage_prog_data->nr_params += vs->num_samplers;
- }
+ stage_prog_data->nr_params = param_count;
GLbitfield64 outputs_written = vp->program.Base.OutputsWritten;
prog_data.inputs_read = vp->program.Base.InputsRead;
commit d33bf8150f96fdb8c6c1ff1acf6870dbe54ca715
Author: Marek Olšák <marek.olsak at amd.com>
Date: Tue Mar 17 17:47:17 2015 +0100
radeonsi: increase coords array size for radeon_llvm_emit_prepare_cube_coords
radeon_llvm_emit_prepare_cube_coords uses coords[4] in some cases (TXB2 etc.)
Discovered by Coverity. Reported by Ilia Mirkin.
Cc: 10.5 10.4 <mesa-stable at lists.freedesktop.org>
Reviewed-by: Michel Dänzer <michel.daenzer at amd.com>
(cherry picked from commit a984abdad39df2d8ceb4c46e11f4ce1344c36c86)
diff --git a/src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c b/src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c
index dce5b55..7f52d44 100644
--- a/src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c
+++ b/src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c
@@ -748,7 +748,7 @@ static void txp_fetch_args(
const struct tgsi_full_instruction * inst = emit_data->inst;
LLVMValueRef src_w;
unsigned chan;
- LLVMValueRef coords[4];
+ LLVMValueRef coords[5];
emit_data->dst_type = LLVMVectorType(bld_base->base.elem_type, 4);
src_w = lp_build_emit_fetch(bld_base, emit_data->inst, 0, TGSI_CHAN_W);
diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c
index e6849ad..81ce3f6 100644
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++ b/src/gallium/drivers/radeonsi/si_shader.c
@@ -1520,7 +1520,7 @@ static void tex_fetch_args(
const struct tgsi_full_instruction * inst = emit_data->inst;
unsigned opcode = inst->Instruction.Opcode;
unsigned target = inst->Texture.Texture;
- LLVMValueRef coords[4];
+ LLVMValueRef coords[5];
LLVMValueRef address[16];
int ref_pos;
unsigned num_coords = tgsi_util_get_texture_coord_dim(target, &ref_pos);
commit 8ebda1f1448c20adf2ff1ffbe31fd8aa52a27718
Author: Mario Kleiner <mario.kleiner.de at gmail.com>
Date: Thu Mar 12 20:34:06 2015 +0100
glx: Handle out-of-sequence swap completion events correctly. (v2)
The code for emitting INTEL_swap_events swap completion
events needs to translate from 32-Bit sbc on the wire to
64-Bit sbc for the events and handle wraparound accordingly.
It assumed that events would be sent by the server in the
order their corresponding swap requests were emitted from
the client, iow. sbc count should be always increasing. This
was correct for DRI2.
This is not always the case under the DRI3/Present backend,
where the Present extension can execute presents and send out
completion events in a different order than the submission
order of the present requests, due to client code specifying
targetMSC target vblank counts which are not strictly
monotonically increasing. This confused the wraparound
handling. This patch fixes the problem by handling 32-Bit
wraparound in both directions. As long as successive swap
completion events real 64-Bit sbc's don't differ by more
than 2^30, this should be able to do the right thing.
How this is supposed to work:
awire->sbc contains the low 32-Bits of the true 64-Bit sbc
of the current swap event, transmitted over the wire.
glxDraw->lastEventSbc contains the low 32-Bits of the 64-Bit
sbc of the most recently processed swap event.
glxDraw->eventSbcWrap is a 64-Bit offset which tracks the upper
32-Bits of the current sbc. The final 64-Bit output sbc
aevent->sbc is computed from the sum of awire->sbc and
glxDraw->eventSbcWrap.
Under DRI3/Present, swap completion events can be received
slightly out of order due to non-monotic targetMsc specified
by client code, e.g., present request submission:
Submission sbc: 1 2 3
targetMsc: 10 11 9
Reception of completion events:
Completion sbc: 3 1 2
The completion sequence 3, 1, 2 would confuse the old wraparound
handling made for DRI2 as 1 < 3 --> Assumes a 32-Bit wraparound
has happened when it hasn't.
The client can queue multiple present requests, in the case of
Mesa up to n requests for n-buffered rendering, e.g., n = 2-4 in
the current Mesa GLX DRI3/Present implementation. In the case of
direct Pixmap presents via xcb_present_pixmap() the number n is
limited by the amount of memory available.
We reasonably assume that the number of outstanding requests n is
much less than 2 billion due to memory contraints and common sense.
Therefore while the order of received sbc's can be a bit scrambled,
successive 64-Bit sbc's won't deviate by much, a given sbc may be
a few counts lower or higher than the previous received sbc.
Therefore any large difference between the incoming awire->sbc and
the last recorded glxDraw->lastEventSbc will be due to 32-Bit
wraparound and we need to adapt glxDraw->eventSbcWrap accordingly
to adjust the upper 32-Bits of the sbc.
Two cases, correponding to the two if-statements in the patch:
a) Previous sbc event was below the last 2^32 boundary, in the previous
glxDraw->eventSbcWrap epoch, the new sbc event is in the next 2^32
epoch, therefore the low 32-Bit awire->sbc wrapped around to zero,
or close to zero --> awire->sbc is apparently much lower than the
glxDraw->lastEventSbc recorded for the previous epoch
--> We need to increment glxDraw->eventSbcWrap by 2^32 to adjust
the current epoch to be one higher than the previous one.
--> Case a) also handles the old DRI2 behaviour.
b) Previous sbc event was above closest 2^32 boundary, but now a
late event from the previous 2^32 epoch arrives, with a true sbc
that belongs to the previous 2^32 segment, so the awire->sbc of
this late event has a high count close to 2^32, whereas
glxDraw->lastEventSbc is closer to zero --> awire->sbc is much
greater than glXDraw->lastEventSbc.
--> We need to decrement glxDraw->eventSbcWrap by 2^32 to adjust
the current epoch back to the previous lower epoch of this late
completion event.
We assume such a wraparound to a higher (a) epoch or lower (b)
epoch has happened if awire->sbc and glxDraw->lastEventSbc differ
by more than 2^30 counts, as such a difference can only happen
on wraparound, or if somehow 2^30 present requests would be pending
for a given drawable inside the server, which is rather unlikely.
v2: Explain the reason for this patch and the new wraparound handling
much more extensive in commit message, no code change wrt. initial
version.
Cc: "10.3 10.4 10.5" <mesa-stable at lists.freedesktop.org>
Signed-off-by: Mario Kleiner <mario.kleiner.de at gmail.com>
Reviewed-by: Michel Dänzer <michel.daenzer at amd.com>
(cherry picked from commit cc5ddd584d17abd422ae4d8e83805969485740d9)
diff --git a/src/glx/glxext.c b/src/glx/glxext.c
index 68c359e..fdc24d4 100644
--- a/src/glx/glxext.c
+++ b/src/glx/glxext.c
@@ -143,8 +143,13 @@ __glXWireToEvent(Display *dpy, XEvent *event, xEvent *wire)
aevent->ust = ((CARD64)awire->ust_hi << 32) | awire->ust_lo;
aevent->msc = ((CARD64)awire->msc_hi << 32) | awire->msc_lo;
- if (awire->sbc < glxDraw->lastEventSbc)
- glxDraw->eventSbcWrap += 0x100000000;
+ /* Handle 32-Bit wire sbc wraparound in both directions to cope with out
+ * of sequence 64-Bit sbc's
+ */
+ if ((int64_t) awire->sbc < ((int64_t) glxDraw->lastEventSbc - 0x40000000))
+ glxDraw->eventSbcWrap += 0x100000000;
+ if ((int64_t) awire->sbc > ((int64_t) glxDraw->lastEventSbc + 0x40000000))
+ glxDraw->eventSbcWrap -= 0x100000000;
glxDraw->lastEventSbc = awire->sbc;
aevent->sbc = awire->sbc + glxDraw->eventSbcWrap;
return True;
commit 0410d9b18646948c9d1e11592589d98b298e7b34
Author: Emil Velikov <emil.l.velikov at gmail.com>
Date: Mon Mar 16 15:00:18 2015 +0000
auxiliary/os: fix the android build - s/drm_munmap/os_munmap/
Squash this silly typo introduced with commit c63eb5dd5ec(auxiliary/os: get
the mmap/munmap wrappers working with android)
Cc: "10.4 10.5" <mesa-stable at lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov at gmail.com>
Reviewed-by: Brian Paul <brianp at vmware.com>
(cherry picked from commit 55f0c0a29f788c5df4820e81c0cf93613ccedf5e)
diff --git a/src/gallium/auxiliary/os/os_mman.h b/src/gallium/auxiliary/os/os_mman.h
index 19c9a5b..3fc8c43 100644
--- a/src/gallium/auxiliary/os/os_mman.h
+++ b/src/gallium/auxiliary/os/os_mman.h
@@ -70,8 +70,8 @@ static INLINE void *os_mmap(void *addr, size_t length, int prot, int flags,
return __mmap2(addr, length, prot, flags, fd, (size_t) (offset >> 12));
}
-# define drm_munmap(addr, length) \
- munmap(addr, length)
+# define os_munmap(addr, length) \
+ munmap(addr, length)
#else
/* assume large file support exists */
commit af3e6e28580b7c1cc6899f77d6a1b6db9b05e0e9
Author: Emil Velikov <emil.l.velikov at gmail.com>
Date: Wed Mar 11 19:12:35 2015 +0000
loader: include <sys/stat.h> for non-sysfs builds
Required by fstat(), otherwise we'll error out due to implicit function
declaration.
Cc: "10.4 10.5" <mesa-stable at lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89530
Signed-off-by: Emil Velikov <emil.l.velikov at gmail.com>
Reported-by: Vadim Rutkovsky <vrutkovs at redhat.com>
Tested-by: Vadim Rutkovsky <vrutkovs at redhat.com>
(cherry picked from commit 771cd266b9d00bdcf2cf7acaa3c8363c358d7478)
diff --git a/src/loader/loader.c b/src/loader/loader.c
index 94c993a..638ebf2 100644
--- a/src/loader/loader.c
+++ b/src/loader/loader.c
@@ -64,6 +64,7 @@
* Rob Clark <robclark at freedesktop.org>
*/
+#include <sys/stat.h>
#include <stdarg.h>
#include <stdio.h>
#include <string.h>
@@ -80,7 +81,6 @@
#endif
#endif
#ifdef HAVE_SYSFS
-#include <sys/stat.h>
#include <sys/types.h>
#endif
#include "loader.h"
commit 29810e43dad8573b5986c58bcd208463ddf18957
Author: Felix Janda <felix.janda at posteo.de>
Date: Mon Feb 2 20:04:16 2015 +0100
c11/threads: Use PTHREAD_MUTEX_RECURSIVE by default
Previously PTHREAD_MUTEX_RECURSIVE_NP had been used on linux for
compatibility with old glibc. Since mesa defines __GNU_SOURCE__
on linux PTHREAD_MUTEX_RECURSIVE is also available since at least
1998. So we can unconditionally use the portable version
PTHREAD_MUTEX_RECURSIVE.
Cc: "10.5" <mesa-stable at lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=88534
Reviewed-by: Emil Velikov <emil.l.velikov at gmail.com>
(cherry picked from commit aead7fe2e2b6c89258f80a25299f4ec0fece2d95)
diff --git a/include/c11/threads_posix.h b/include/c11/threads_posix.h
index f9c165d..2182c28 100644
--- a/include/c11/threads_posix.h
+++ b/include/c11/threads_posix.h
@@ -177,13 +177,8 @@ mtx_init(mtx_t *mtx, int type)
&& type != (mtx_try|mtx_recursive))
return thrd_error;
pthread_mutexattr_init(&attr);
- if ((type & mtx_recursive) != 0) {
-#if defined(__linux__) || defined(__linux)
- pthread_mutexattr_settype(&attr, PTHREAD_MUTEX_RECURSIVE_NP);
-#else
+ if ((type & mtx_recursive) != 0)
pthread_mutexattr_settype(&attr, PTHREAD_MUTEX_RECURSIVE);
-#endif
- }
pthread_mutex_init(mtx, &attr);
pthread_mutexattr_destroy(&attr);
return thrd_success;
commit 2e0f2ad59c8d98ebe545d911747079a1a7958acf
Author: Rob Clark <robclark at freedesktop.org>
Date: Sun Mar 15 17:59:01 2015 -0400
freedreno: update generated headers
Fix a3xx texture layer-size.
Signed-off-by: Rob Clark <robclark at freedesktop.org>
Cc: "10.4 10.5" <mesa-stable at lists.freedesktop.org>
(cherry picked from commit e92bc6b38e90339a394e95a562bcce35c3ee9696)
diff --git a/src/gallium/drivers/freedreno/a2xx/a2xx.xml.h b/src/gallium/drivers/freedreno/a2xx/a2xx.xml.h
index de415ab..3811bc5 100644
--- a/src/gallium/drivers/freedreno/a2xx/a2xx.xml.h
+++ b/src/gallium/drivers/freedreno/a2xx/a2xx.xml.h
@@ -13,7 +13,7 @@ The rules-ng-ng source files this header was generated from are:
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a2xx.xml ( 32901 bytes, from 2014-06-02 15:21:30)
- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_common.xml ( 10551 bytes, from 2014-11-13 22:44:30)
- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_pm4.xml ( 15085 bytes, from 2014-12-20 21:49:41)
-- /home/robclark/src/freedreno/envytools/rnndb/adreno/a3xx.xml ( 64848 bytes, from 2015-02-20 18:21:24)
+- /home/robclark/src/freedreno/envytools/rnndb/adreno/a3xx.xml ( 64771 bytes, from 2015-03-15 21:55:57)
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a4xx.xml ( 51942 bytes, from 2015-02-24 17:14:02)
Copyright (C) 2013-2014 by the following authors:
diff --git a/src/gallium/drivers/freedreno/a3xx/a3xx.xml.h b/src/gallium/drivers/freedreno/a3xx/a3xx.xml.h
index f0912b4..87626ac 100644
--- a/src/gallium/drivers/freedreno/a3xx/a3xx.xml.h
+++ b/src/gallium/drivers/freedreno/a3xx/a3xx.xml.h
@@ -13,7 +13,7 @@ The rules-ng-ng source files this header was generated from are:
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a2xx.xml ( 32901 bytes, from 2014-06-02 15:21:30)
- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_common.xml ( 10551 bytes, from 2014-11-13 22:44:30)
- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_pm4.xml ( 15085 bytes, from 2014-12-20 21:49:41)
-- /home/robclark/src/freedreno/envytools/rnndb/adreno/a3xx.xml ( 64848 bytes, from 2015-02-20 18:21:24)
+- /home/robclark/src/freedreno/envytools/rnndb/adreno/a3xx.xml ( 64771 bytes, from 2015-03-15 21:55:57)
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a4xx.xml ( 51942 bytes, from 2015-02-24 17:14:02)
Copyright (C) 2013-2015 by the following authors:
@@ -2677,7 +2677,7 @@ static inline uint32_t A3XX_TEX_CONST_2_SWAP(enum a3xx_color_swap val)
}
#define REG_A3XX_TEX_CONST_3 0x00000003
-#define A3XX_TEX_CONST_3_LAYERSZ1__MASK 0x0000000f
+#define A3XX_TEX_CONST_3_LAYERSZ1__MASK 0x00001fff
#define A3XX_TEX_CONST_3_LAYERSZ1__SHIFT 0
static inline uint32_t A3XX_TEX_CONST_3_LAYERSZ1(uint32_t val)
{
diff --git a/src/gallium/drivers/freedreno/a4xx/a4xx.xml.h b/src/gallium/drivers/freedreno/a4xx/a4xx.xml.h
index 73e9de6..0e80564 100644
--- a/src/gallium/drivers/freedreno/a4xx/a4xx.xml.h
+++ b/src/gallium/drivers/freedreno/a4xx/a4xx.xml.h
@@ -13,7 +13,7 @@ The rules-ng-ng source files this header was generated from are:
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a2xx.xml ( 32901 bytes, from 2014-06-02 15:21:30)
- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_common.xml ( 10551 bytes, from 2014-11-13 22:44:30)
- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_pm4.xml ( 15085 bytes, from 2014-12-20 21:49:41)
-- /home/robclark/src/freedreno/envytools/rnndb/adreno/a3xx.xml ( 64848 bytes, from 2015-02-20 18:21:24)
+- /home/robclark/src/freedreno/envytools/rnndb/adreno/a3xx.xml ( 64771 bytes, from 2015-03-15 21:55:57)
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a4xx.xml ( 51942 bytes, from 2015-02-24 17:14:02)
Copyright (C) 2013-2015 by the following authors:
diff --git a/src/gallium/drivers/freedreno/adreno_common.xml.h b/src/gallium/drivers/freedreno/adreno_common.xml.h
index 868decd..163ac54 100644
--- a/src/gallium/drivers/freedreno/adreno_common.xml.h
+++ b/src/gallium/drivers/freedreno/adreno_common.xml.h
@@ -13,7 +13,7 @@ The rules-ng-ng source files this header was generated from are:
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a2xx.xml ( 32901 bytes, from 2014-06-02 15:21:30)
- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_common.xml ( 10551 bytes, from 2014-11-13 22:44:30)
- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_pm4.xml ( 15085 bytes, from 2014-12-20 21:49:41)
-- /home/robclark/src/freedreno/envytools/rnndb/adreno/a3xx.xml ( 64848 bytes, from 2015-02-20 18:21:24)
+- /home/robclark/src/freedreno/envytools/rnndb/adreno/a3xx.xml ( 64771 bytes, from 2015-03-15 21:55:57)
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a4xx.xml ( 51942 bytes, from 2015-02-24 17:14:02)
Copyright (C) 2013-2014 by the following authors:
diff --git a/src/gallium/drivers/freedreno/adreno_pm4.xml.h b/src/gallium/drivers/freedreno/adreno_pm4.xml.h
index 19f8eb5..05afc66 100644
--- a/src/gallium/drivers/freedreno/adreno_pm4.xml.h
+++ b/src/gallium/drivers/freedreno/adreno_pm4.xml.h
@@ -13,7 +13,7 @@ The rules-ng-ng source files this header was generated from are:
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a2xx.xml ( 32901 bytes, from 2014-06-02 15:21:30)
- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_common.xml ( 10551 bytes, from 2014-11-13 22:44:30)
- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_pm4.xml ( 15085 bytes, from 2014-12-20 21:49:41)
-- /home/robclark/src/freedreno/envytools/rnndb/adreno/a3xx.xml ( 64848 bytes, from 2015-02-20 18:21:24)
+- /home/robclark/src/freedreno/envytools/rnndb/adreno/a3xx.xml ( 64771 bytes, from 2015-03-15 21:55:57)
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a4xx.xml ( 51942 bytes, from 2015-02-24 17:14:02)
Copyright (C) 2013-2014 by the following authors:
commit 411f975a8129f4eb91a28a52d524059fdb174515
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date: Fri Mar 13 01:36:57 2015 -0400
freedreno: fix slice pitch calculations
For example if width were 65, the first slice would get 96 while the
second would get 32. However the hardware appears to expect the second
pitch to be 64, based on halving the 96 (and aligning up to 32).
This fixes texelFetch piglit tests on a3xx below a certain size. Going
higher they break again, but most likely due to unrelated reasons.
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
Cc: "10.4 10.5" <mesa-stable at lists.freedesktop.org>
Reviewed-by: Rob Clark <robclark at freedesktop.org>
(cherry picked from commit 620e29b74821fd75b24495ab2bfddea53fc75350)
diff --git a/src/gallium/drivers/freedreno/freedreno_resource.c b/src/gallium/drivers/freedreno/freedreno_resource.c
index c7b4e57..69e5452 100644
--- a/src/gallium/drivers/freedreno/freedreno_resource.c
+++ b/src/gallium/drivers/freedreno/freedreno_resource.c
@@ -213,7 +213,7 @@ setup_slices(struct fd_resource *rsc, uint32_t alignment)
for (level = 0; level <= prsc->last_level; level++) {
struct fd_resource_slice *slice = fd_resource_slice(rsc, level);
- slice->pitch = align(width, 32);
+ slice->pitch = width = align(width, 32);
slice->offset = size;
/* 1d array, 2d array, 3d textures (but not cube!) must all have the
* same layer size for each miplevel on a3xx. These are also the
commit 3fa76f3f79962c608f2adbdad2bd942006683690
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date: Fri Mar 13 00:53:49 2015 -0400
freedreno/a3xx: use the same layer size for all slices
We only program in one layer size per texture, so that means that all
levels must share one size. This makes the piglit test
bin/texelFetch fs sampler2DArray
have the same breakage as its non-array version instead of being
completely off, and makes
bin/ext_texture_array-gen-mipmap
start passing.
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
Cc: "10.4 10.5" <mesa-stable at lists.freedesktop.org>
Reviewed-by: Rob Clark <robclark at freedesktop.org>
(cherry picked from commit 89b26d5a360ebde11a69f2cdefa66e4d6a2a13fd)
diff --git a/src/gallium/drivers/freedreno/freedreno_resource.c b/src/gallium/drivers/freedreno/freedreno_resource.c
index c412407..c7b4e57 100644
--- a/src/gallium/drivers/freedreno/freedreno_resource.c
+++ b/src/gallium/drivers/freedreno/freedreno_resource.c
@@ -215,7 +215,14 @@ setup_slices(struct fd_resource *rsc, uint32_t alignment)
slice->pitch = align(width, 32);
slice->offset = size;
- slice->size0 = align(slice->pitch * height * rsc->cpp, alignment);
+ /* 1d array, 2d array, 3d textures (but not cube!) must all have the
+ * same layer size for each miplevel on a3xx. These are also the
+ * targets that have non-1 alignment.
+ */
+ if (level == 0 || layers_in_level == 1 || alignment == 1)
+ slice->size0 = align(slice->pitch * height * rsc->cpp, alignment);
+ else
+ slice->size0 = rsc->slices[0].size0;
size += slice->size0 * depth * layers_in_level;
commit 5e572b1ccee4adfba9441c793b53b7950de560c5
Author: Samuel Iglesias Gonsalvez <siglesias at igalia.com>
Date: Tue Feb 24 19:02:57 2015 +0100
glsl: optimize (0 cmp x + y) into (-x cmp y).
The optimization done by commit 34ec1a24d did not take it into account.
Fixes:
dEQP-GLES3.functional.shaders.random.all_features.fragment.20
Signed-off-by: Samuel Iglesias Gonsalvez <siglesias at igalia.com>
Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
Reviewed-by: Matt Turner <mattst88 at gmail.com>
Cc: "10.4 10.5" <mesa-stable at lists.freedesktop.org>
(cherry picked from commit b43bbfa90ace596c8b2e0b3954a5f69924726c59)
diff --git a/src/glsl/opt_algebraic.cpp b/src/glsl/opt_algebraic.cpp
index fae58c7..7f25fc4 100644
--- a/src/glsl/opt_algebraic.cpp
+++ b/src/glsl/opt_algebraic.cpp
@@ -578,9 +578,18 @@ ir_algebraic_visitor::handle_expression(ir_expression *ir)
if (!is_vec_zero(zero))
continue;
- return new(mem_ctx) ir_expression(ir->operation,
- add->operands[0],
- neg(add->operands[1]));
+ /* Depending of the zero position we want to optimize
+ * (0 cmp x+y) into (-x cmp y) or (x+y cmp 0) into (x cmp -y)
+ */
+ if (add_pos == 1) {
+ return new(mem_ctx) ir_expression(ir->operation,
+ neg(add->operands[0]),
+ add->operands[1]);
+ } else {
+ return new(mem_ctx) ir_expression(ir->operation,
+ add->operands[0],
+ neg(add->operands[1]));
+ }
}
break;
commit 2beab3c01c7be935fc7d2f1f025373cadebdeb4d
Author: Emil Velikov <emil.l.velikov at gmail.com>
Date: Sat Mar 21 22:09:03 2015 +0000
st/egl: don't ship the dri2.c link at the tarball
During 'make dist' the path of the symbolic link (x11/dri2.c) becomes
too long, and tar converts it to hard one. To make it more complicated
on Haiku tar errors out (due to lack of hardlink support) rather than
falling back to the next best thing.
So remove the symlink from git, and disable the scons x11_drm egl code.
The offending code is not build with either automake nor android.
Brian, Jose would you have any objections against this ? I was
playing around to get the symlink resolved, although I could not get the
dependency tracking resolved, so env.Command() was never executed :-\
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89680
Cc: mesa-stable at lists.freedesktop.org
Cc: Alexander von Gluck IV <kallisti5 at unixzen.com>
Cc: Brian Paul <brianp at vmware.com>
Acked-by: Jose Fonseca <jfonseca at vmware.com>
Signed-off-by: Emil Velikov <emil.l.velikov at gmail.com>
diff --git a/src/gallium/state_trackers/egl/Makefile.sources b/src/gallium/state_trackers/egl/Makefile.sources
index 03ded58..0551c16 100644
--- a/src/gallium/state_trackers/egl/Makefile.sources
+++ b/src/gallium/state_trackers/egl/Makefile.sources
@@ -52,6 +52,5 @@ x11_FILES := \
x11/native_ximage.c
x11_drm_FILES := \
- x11/dri2.c \
x11/x11_screen.c \
x11/x11_screen.h
diff --git a/src/gallium/state_trackers/egl/SConscript b/src/gallium/state_trackers/egl/SConscript
index 3727fb2..a94abc2 100644
--- a/src/gallium/state_trackers/egl/SConscript
+++ b/src/gallium/state_trackers/egl/SConscript
@@ -39,7 +39,8 @@ else:
'#/src/mapi',
])
sources.append(env.ParseSourceList('Makefile.sources', 'x11_FILES'))
- if env['drm']:
+ if env['drm'] and False:
+ # XXX: Disabled as we're don't generate the x11/dri2.c symlink at buildtime.
env.Append(CPPDEFINES = ['GLX_DIRECT_RENDERING'])
sources.append(env.ParseSourceList('Makefile.sources', 'x11_drm_FILES'))
if env['drm'] and False:
diff --git a/src/gallium/state_trackers/egl/x11/dri2.c b/src/gallium/state_trackers/egl/x11/dri2.c
deleted file mode 120000
index 344a11c..0000000
--- a/src/gallium/state_trackers/egl/x11/dri2.c
+++ /dev/null
@@ -1 +0,0 @@
-../../../../glx/dri2.c
\ No newline at end of file
commit d80bc65016671abccaac3746efba0f1d704b7d07
Author: Emil Velikov <emil.l.velikov at gmail.com>
Date: Sat Mar 21 20:45:22 2015 +0000
automake: add missing egl files to the tarball
Namely the Haiku EGL driver backend and the SConscript for the dri2 EGL
driver backend.
Cc: Alexander von Gluck IV <kallisti5 at unixzen.com>
Cc: mesa-stable at lists.freedesktop.org
Signed-off-by: Emil Velikov <emil.l.velikov at gmail.com>
(cherry picked from commit 5dc573e5de0eb49bc8622558789ebc4adf03926c)
diff --git a/src/Makefile.am b/src/Makefile.am
index 8edf333..006e2ff 100644
--- a/src/Makefile.am
+++ b/src/Makefile.am
@@ -53,7 +53,10 @@ if HAVE_GALLIUM
SUBDIRS += gallium
endif
-EXTRA_DIST = egl/docs getopt hgl SConscript
+EXTRA_DIST = \
+ egl/drivers/haiku \
+ egl/docs \
+ getopt hgl SConscript
AM_CPPFLAGS = \
-I$(top_srcdir)/include/ \
diff --git a/src/egl/drivers/dri2/Makefile.am b/src/egl/drivers/dri2/Makefile.am
index 79a40e8..f589600 100644
--- a/src/egl/drivers/dri2/Makefile.am
+++ b/src/egl/drivers/dri2/Makefile.am
@@ -64,3 +64,5 @@ if HAVE_EGL_PLATFORM_DRM
libegl_dri2_la_SOURCES += platform_drm.c
AM_CFLAGS += -DHAVE_DRM_PLATFORM
endif
+
+EXTRA_DIST = SConscript
commit 2abba086ca84f200fae940129c0a5342c3748f00
Author: Emil Velikov <emil.l.velikov at gmail.com>
Date: Fri Mar 13 23:32:12 2015 +0000
docs: Add sha256 sums for the 10.5.1 release
Signed-off-by: Emil Velikov <emil.l.velikov at gmail.com>
diff --git a/docs/relnotes/10.5.1.html b/docs/relnotes/10.5.1.html
index f9cadca..a9b91fa 100644
--- a/docs/relnotes/10.5.1.html
+++ b/docs/relnotes/10.5.1.html
@@ -31,7 +31,8 @@ because compatibility contexts are not supported.
<h2>SHA256 checksums</h2>
<pre>
-TBD
+b5b6256a6d46023e16a675257fd11a0f94d7b3e60a76cf112952da3d0fef8e9b mesa-10.5.1.tar.gz
+ffc51943d15c6812ee7611d053d8980a683fbd6a4986cff567b12cc66637d679 mesa-10.5.1.tar.xz
</pre>
commit 11c0ff60ef19cca84452aa989fb8bb25127473e0
Author: Emil Velikov <emil.l.velikov at gmail.com>
Date: Fri Mar 13 22:32:57 2015 +0000
Add release notes for the 10.5.1 release
Signed-off-by: Emil Velikov <emil.l.velikov at gmail.com>
diff --git a/docs/relnotes/10.5.1.html b/docs/relnotes/10.5.1.html
new file mode 100644
index 0000000..f9cadca
--- /dev/null
+++ b/docs/relnotes/10.5.1.html
@@ -0,0 +1,216 @@
+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
+<html lang="en">
+<head>
+ <meta http-equiv="content-type" content="text/html; charset=utf-8">
+ <title>Mesa Release Notes</title>
+ <link rel="stylesheet" type="text/css" href="../mesa.css">
+</head>
+<body>
+
+<div class="header">
+ <h1>The Mesa 3D Graphics Library</h1>
+</div>
+
+<iframe src="../contents.html"></iframe>
+<div class="content">
+
+<h1>Mesa 10.5.1 Release Notes / March 13, 2015</h1>
+
+<p>
+Mesa 10.5.1 is a bug fix release which fixes bugs found since the 10.5.0 release.
+</p>
+<p>
+Mesa 10.5.1 implements the OpenGL 3.3 API, but the version reported by
+glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
+glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
+Some drivers don't support all the features required in OpenGL 3.3. OpenGL
+3.3 is <strong>only</strong> available if requested at context creation
+because compatibility contexts are not supported.
+</p>
+
+
+<h2>SHA256 checksums</h2>
+<pre>
+TBD
+</pre>
+
+
+<h2>New features</h2>
+<p>None</p>
+
+<h2>Bug fixes</h2>
+
+<p>This list is likely incomplete.</p>
+
+<ul>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=79202">Bug 79202</a> - valgrind errors in glsl-fs-uniform-array-loop-unroll.shader_test; random code generation</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=84613">Bug 84613</a> - [G965, bisected] piglit regressions : glslparsertest.glsl2</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=86747">Bug 86747</a> - Noise in Football Manager 2014 textures</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=86974">Bug 86974</a> - INTEL_DEBUG=shader_time always asserts in fs_generator::generate_code() when Mesa is built with --enable-debug (= with asserts)</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=88246">Bug 88246</a> - Commit 2881b12 causes 43 DrawElements test regressions</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=88793">Bug 88793</a> - [BDW/BSW Bisected]Piglit/shaders_glsl-max-varyings fails</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=88883">Bug 88883</a> - ir-a2xx.c: variable changed in assert statement</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=88885">Bug 88885</a> - Transform feedback uses incorrect interleaving if a previous draw did not write gl_Position</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89095">Bug 89095</a> - [SNB/IVB/BYT Bisected]Webglc conformance/glsl/functions/glsl-function-mix-float.html fails</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89156">Bug 89156</a> - r300g: GL_COMPRESSED_RED_RGTC1 / ATI1N support broken</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89224">Bug 89224</a> - Incorrect rendering of Unigine Valley running in VM on VMware Workstation</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89292">Bug 89292</a> - [regression,bisected] incomplete screenshots in some cases</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89311">Bug 89311</a> - [regression, bisected] dEQP: Added entry points for glCompressedTextureSubImage*D.</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89312">Bug 89312</a> - [regression, bisected] main: Added entry points for CopyTextureSubImage*D. (d6b7c40cecfe01)</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89315">Bug 89315</a> - [HSW, regression, bisected] i965/fs: Emit MAD instructions when possible.</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89317">Bug 89317</a> - [HSW, regression, bisected] i965: Add LINTERP/CINTERP to can_do_cmod() (d91390634)</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89416">Bug 89416</a> - UE4Editor crash after load project</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89430">Bug 89430</a> - [g965][bisected] arb_copy_image-targets gl_texture* tests fail</li>
+
+</ul>
+
+
+<h2>Changes</h2>
+
+<p>Andrey Sudnik (1):</p>
+<ul>
+ <li>i965/vec4: Don't lose the saturate modifier in copy propagation.</li>
+</ul>
+
+<p>Chris Forbes (1):</p>
+<ul>
+ <li>i965/gs: Check newly-generated GS-out VUE map against correct stage</li>
+</ul>
+
+<p>Daniel Stone (1):</p>
+<ul>
+ <li>egl: Take alpha bits into account when selecting GBM formats</li>
+</ul>
+
+<p>Emil Velikov (5):</p>
+<ul>
+ <li>docs: Add sha256 sums for the 10.5.0 release</li>
+ <li>egl/main: no longer export internal function</li>
+ <li>cherry-ignore: ignore a few more commits picked without -x</li>
+ <li>mapi: fix commit 90411b56f6bc817e229d8801ac0adad6d4e3fb7a</li>
+ <li>Update version to 10.5.1</li>
+</ul>
+
+<p>Frank Henigman (1):</p>
+<ul>
+ <li>intel: fix EGLImage renderbuffer _BaseFormat</li>
+</ul>
+
+<p>Iago Toral Quiroga (1):</p>
+<ul>
+ <li>i965: Fix out-of-bounds accesses into pull_constant_loc array</li>
+</ul>
+
+<p>Ian Romanick (1):</p>
+<ul>
+ <li>i965/fs/nir: Use emit_math for nir_op_fpow</li>
+</ul>
+
+<p>Ilia Mirkin (3):</p>
+<ul>
+ <li>freedreno: move fb state copy after checking for size change</li>
+ <li>freedreno/ir3: fix array count returned by TXQ</li>
+ <li>freedreno/ir3: get the # of miplevels from getinfo</li>
+</ul>
+
+<p>Jason Ekstrand (2):</p>
+<ul>
+ <li>meta/TexSubImage: Stash everything other than PIXEL_TRANSFER/store in meta_begin</li>
+ <li>main/base_tex_format: Properly handle STENCIL_INDEX1/4/16</li>
+</ul>
+
+<p>Kenneth Graunke (8):</p>
+<ul>
+ <li>i965: Split Gen4-5 BlitFramebuffer code; prefer BLT over Meta.</li>
+ <li>glsl: Mark array access when copying to a temporary for the ?: operator.</li>
+ <li>i965/fs: Set force_writemask_all on shader_time instructions.</li>
+ <li>i965/fs: Set smear on shader_time diff register.</li>
+ <li>i965/fs: Make emit_shader_time_write return rather than emit.</li>
+ <li>i965/fs: Make get_timestamp() pass back the MOV rather than emitting it.</li>
+ <li>i965/fs: Make emit_shader_time_end() insert before EOT.</li>
+ <li>i965/fs: Don't issue FB writes for bound but unwritten color targets.</li>
+</ul>
+
+<p>Laura Ekstrand (2):</p>
+<ul>
+ <li>main: Fix target checking for CompressedTexSubImage*D.</li>
+ <li>main: Fix target checking for CopyTexSubImage*D.</li>
+</ul>
+
+<p>Marc-Andre Lureau (1):</p>
+<ul>
+ <li>gallium/auxiliary/indices: fix start param</li>
+</ul>
+
+<p>Marek Olšák (3):</p>
+<ul>
+ <li>r300g: fix RGTC1 and LATC1 SNORM formats</li>
+ <li>r300g: fix a crash when resolving into an sRGB texture</li>
+ <li>r300g: fix sRGB->sRGB blits</li>
+</ul>
+
+<p>Matt Turner (12):</p>
+<ul>
+ <li>i965/vec4: Fix implementation of i2b.</li>
+ <li>mesa: Indent break statements and add a missing one.</li>
+ <li>mesa: Free memory allocated for luminance in readpixels.</li>
+ <li>mesa: Correct backwards NULL check.</li>
+ <li>i965: Consider scratch writes to have side effects.</li>
+ <li>i965/fs: Don't use backend_visitor::instructions after creating the CFG.</li>
+ <li>r300g: Use PATH_MAX instead of limiting ourselves to 100 chars.</li>
+ <li>r300g: Check return value of snprintf().</li>
+ <li>i965/fs: Don't propagate cmod to inst with different type.</li>
+ <li>i965: Tell intel_get_memcpy() which direction the memcpy() is going.</li>
+ <li>Revert SHA1 additions.</li>
+ <li>i965: Avoid applying negate to wrong MAD source.</li>
+</ul>
+
+<p>Neil Roberts (4):</p>
+<ul>
+ <li>meta: In pbo_{Get,}TexSubImage don't repeatedly rebind the source tex</li>
+ <li>Revert "common: Fix PBOs for 1D_ARRAY."</li>
+ <li>meta: Allow GL_UN/PACK_IMAGE_HEIGHT in _mesa_meta_pbo_Get/TexSubImage</li>
+ <li>meta: Fix the y offset for 1D_ARRAY in _mesa_meta_pbo_TexSubImage</li>
+</ul>
+
+<p>Rob Clark (11):</p>
+<ul>
+ <li>freedreno/ir3: fix silly typo for binning pass shaders</li>
+ <li>freedreno/a2xx: fix increment in assert</li>
+ <li>freedreno/a4xx: bit of cleanup</li>
+ <li>freedreno: update generated headers</li>
+ <li>freedreno/a4xx: set PC_PRIM_VTX_CNTL.VAROUT properly</li>
+ <li>freedreno: update generated headers</li>
+ <li>freedreno/a4xx: aniso filtering</li>
+ <li>freedreno/ir3: fix up cat6 instruction encodings</li>
+ <li>freedreno/ir3: add support for memory (cat6) instructions</li>
+ <li>freedreno/ir3: handle flat bypass for a4xx</li>
+ <li>freedreno/ir3: fix failed assert in grouping</li>
+</ul>
+
+<p>Stefan Dösinger (1):</p>
+<ul>
+ <li>r300g: Fix the ATI1N swizzle (RGTC1 and LATC1)</li>
+</ul>
+
+</div>
+</body>
+</html>
commit 0f32ac39208f2e621e7bf838cf9a0a2bf9292960
Author: Emil Velikov <emil.l.velikov at gmail.com>
Date: Fri Mar 13 22:32:35 2015 +0000
Update version to 10.5.1
Signed-off-by: Emil Velikov <emil.l.velikov at gmail.com>
diff --git a/VERSION b/VERSION
index 2cf514e..4a6e70e 100644
--- a/VERSION
+++ b/VERSION
@@ -1 +1 @@
-10.5.0
+10.5.1
commit ce13666feba564b850d326ef05b6fc05c6435c6b
Author: Rob Clark <robclark at freedesktop.org>
Date: Tue Feb 10 04:42:32 2015 -0500
freedreno/ir3: fix failed assert in grouping
Turns out there are scenarios where we need to insert mov's in "front"
of an input. Triggered by shaders like:
VERT
DCL IN[0]
DCL IN[1]
DCL OUT[0], POSITION
DCL OUT[1], GENERIC[9]
DCL SAMP[0]
DCL TEMP[0], LOCAL
0: MOV TEMP[0].xy, IN[1].xyyy
1: MOV TEMP[0].w, IN[1].wwww
2: TXF TEMP[0], TEMP[0], SAMP[0], 1D_ARRAY
3: MOV OUT[1], TEMP[0]
4: MOV OUT[0], IN[0]
5: END
Signed-off-by: Rob Clark <robclark at freedesktop.org>
(cherry picked from commit 27648efa2070e8db111908314d8b924d3717dbb0)
diff --git a/src/gallium/drivers/freedreno/ir3/ir3_group.c b/src/gallium/drivers/freedreno/ir3/ir3_group.c
index da2142e..a571e2e 100644
--- a/src/gallium/drivers/freedreno/ir3/ir3_group.c
+++ b/src/gallium/drivers/freedreno/ir3/ir3_group.c
@@ -50,40 +50,72 @@ static bool check_stop(struct ir3_instruction *instr)
return false;
}
+static struct ir3_instruction * create_mov(struct ir3_instruction *instr)
+{
+ struct ir3_instruction *mov;
+
+ mov = ir3_instr_create(instr->block, 1, 0);
+ mov->cat1.src_type = TYPE_F32;
+ mov->cat1.dst_type = TYPE_F32;
+ ir3_reg_create(mov, 0, 0); /* dst */
+ ir3_reg_create(mov, 0, IR3_REG_SSA)->instr = instr;
+
+ return mov;
+}
+
/* bleh.. we need to do the same group_n() thing for both inputs/outputs
* (where we have a simple instr[] array), and fanin nodes (where we have
* an extra indirection via reg->instr).
*/
struct group_ops {
struct ir3_instruction *(*get)(void *arr, int idx);
- void (*set)(void *arr, int idx, struct ir3_instruction *instr);
+ void (*insert_mov)(void *arr, int idx, struct ir3_instruction *instr);
};
static struct ir3_instruction *arr_get(void *arr, int idx)
{
return ((struct ir3_instruction **)arr)[idx];
}
-static void arr_set_out(void *arr, int idx, struct ir3_instruction *instr)
+static void arr_insert_mov_out(void *arr, int idx, struct ir3_instruction *instr)
{
- ((struct ir3_instruction **)arr)[idx] = instr;
+ ((struct ir3_instruction **)arr)[idx] = create_mov(instr);
}
-static void arr_set_in(void *arr, int idx, struct ir3_instruction *instr)
+static void arr_insert_mov_in(void *arr, int idx, struct ir3_instruction *instr)
{
- debug_printf("cannot insert mov before input!\n");
- debug_assert(0);
+ /* so, we can't insert a mov in front of a meta:in.. and the downstream
+ * instruction already has a pointer to 'instr'. So we cheat a bit and
+ * morph the meta:in instruction into a mov and insert a new meta:in
+ * in front.
+ */
+ struct ir3_instruction *in;
+
+ debug_assert(instr->regs_count == 1);
+
+ in = ir3_instr_create(instr->block, -1, OPC_META_INPUT);
+ in->inout.block = instr->block;
+ ir3_reg_create(in, instr->regs[0]->num, 0);
+
+ /* create src reg for meta:in and fixup to now be a mov: */
+ ir3_reg_create(instr, 0, IR3_REG_SSA)->instr = in;
+ instr->category = 1;
+ instr->opc = 0;
+ instr->cat1.src_type = TYPE_F32;
+ instr->cat1.dst_type = TYPE_F32;
+
+ ((struct ir3_instruction **)arr)[idx] = in;
}
-static struct group_ops arr_ops_out = { arr_get, arr_set_out };
-static struct group_ops arr_ops_in = { arr_get, arr_set_in };
+static struct group_ops arr_ops_out = { arr_get, arr_insert_mov_out };
+static struct group_ops arr_ops_in = { arr_get, arr_insert_mov_in };
static struct ir3_instruction *instr_get(void *arr, int idx)
{
return ssa(((struct ir3_instruction *)arr)->regs[idx+1]);
}
-static void instr_set(void *arr, int idx, struct ir3_instruction *instr)
+static void instr_insert_mov(void *arr, int idx, struct ir3_instruction *instr)
{
- ((struct ir3_instruction *)arr)->regs[idx+1]->instr = instr;
+ ((struct ir3_instruction *)arr)->regs[idx+1]->instr = create_mov(instr);
}
-static struct group_ops instr_ops = { instr_get, instr_set };
+static struct group_ops instr_ops = { instr_get, instr_insert_mov };
@@ -92,20 +124,6 @@ static bool conflicts(struct ir3_instruction *a, struct ir3_instruction *b)
return (a && b) && (a != b);
}
-static struct ir3_instruction *
-create_mov(struct ir3_instruction *instr)
-{
- struct ir3_instruction *mov;
-
- mov = ir3_instr_create(instr->block, 1, 0);
- mov->cat1.src_type = TYPE_F32;
- mov->cat1.dst_type = TYPE_F32;
- ir3_reg_create(mov, 0, 0); /* dst */
- ir3_reg_create(mov, 0, IR3_REG_SSA)->instr = instr;
-
- return mov;
-}
-
static void group_n(struct group_ops *ops, void *arr, unsigned n)
{
unsigned i, j;
@@ -135,8 +153,7 @@ restart:
conflict = true;
if (conflict) {
- instr = create_mov(instr);
- ops->set(arr, i, instr);
+ ops->insert_mov(arr, i, instr);
/* inserting the mov may have caused a conflict
* against the previous:
*/
commit 065a24bd969b3e7d429d72ae328dbfa6affd9455
Author: Rob Clark <robclark at freedesktop.org>
Date: Wed Feb 25 13:54:25 2015 -0500
freedreno/ir3: handle flat bypass for a4xx
We may not need this for later a4xx patchlevels, but we do at least need
this for patchlevel 0. Bypass bary.f for fetching varyings when flat
shading is needed (rather than configure via cmdstream). This requires
a special dummy bary.f w/ (ei) flag to signal to scheduler when all
varyings are consumed. And requires shader variants based on rasterizer
flatshade state to handle TGSI_INTERPOLATE_COLOR.
Signed-off-by: Rob Clark <robclark at freedesktop.org>
(cherry picked from commit e9f2abe349886ae5423c7c31d201e7d587a3695a)
diff --git a/src/gallium/drivers/freedreno/a4xx/fd4_draw.c b/src/gallium/drivers/freedreno/a4xx/fd4_draw.c
index aa3df9f..dd9dc87 100644
--- a/src/gallium/drivers/freedreno/a4xx/fd4_draw.c
+++ b/src/gallium/drivers/freedreno/a4xx/fd4_draw.c
@@ -100,6 +100,9 @@ fixup_shader_state(struct fd_context *ctx, struct ir3_shader_key *key)
if (last_key->alpha != key->alpha)
ctx->prog.dirty |= FD_SHADER_DIRTY_FP;
+ if (last_key->rasterflat != key->rasterflat)
+ ctx->prog.dirty |= FD_SHADER_DIRTY_FP;
+
fd4_ctx->last_key = *key;
}
}
@@ -118,6 +121,7 @@ fd4_draw_vbo(struct fd_context *ctx, const struct pipe_draw_info *info)
.binning_pass = true,
.color_two_side = ctx->rasterizer ? ctx->rasterizer->light_twoside : false,
.alpha = util_format_is_alpha(pipe_surface_format(pfb->cbufs[0])),
+ .rasterflat = ctx->rasterizer && ctx->rasterizer->flatshade,
// TODO set .half_precision based on render target format,
// ie. float16 and smaller use half, float32 use full..
.half_precision = !!(fd_mesa_debug & FD_DBG_FRAGHALF),
@@ -130,7 +134,6 @@ fd4_draw_vbo(struct fd_context *ctx, const struct pipe_draw_info *info)
.fsaturate_r = fd4_ctx->fsaturate_r,
},
.format = fd4_emit_format(pfb->cbufs[0]),
- .rasterflat = ctx->rasterizer && ctx->rasterizer->flatshade,
};
unsigned dirty;
diff --git a/src/gallium/drivers/freedreno/a4xx/fd4_emit.h b/src/gallium/drivers/freedreno/a4xx/fd4_emit.h
index cdfa0f4..5dc3db8 100644
--- a/src/gallium/drivers/freedreno/a4xx/fd4_emit.h
+++ b/src/gallium/drivers/freedreno/a4xx/fd4_emit.h
@@ -55,7 +55,6 @@ struct fd4_emit {
struct ir3_shader_key key;
enum a4xx_color_fmt format;
uint32_t dirty;
- bool rasterflat;
/* cached to avoid repeated lookups of same variants: */
struct ir3_shader_variant *vp, *fp;
diff --git a/src/gallium/drivers/freedreno/ir3/ir3.c b/src/gallium/drivers/freedreno/ir3/ir3.c
index a02b06f..fe0ffc9 100644
--- a/src/gallium/drivers/freedreno/ir3/ir3.c
+++ b/src/gallium/drivers/freedreno/ir3/ir3.c
@@ -113,6 +113,8 @@ static uint32_t reg(struct ir3_register *reg, struct ir3_info *info,
if (reg->flags & IR3_REG_CONST) {
info->max_const = MAX2(info->max_const, max);
+ } else if (val.num == 63) {
+ /* ignore writes to dummy register r63.x */
} else if ((max != REG_A0) && (max != REG_P0)) {
if (reg->flags & IR3_REG_HALF) {
info->max_half_reg = MAX2(info->max_half_reg, max);
diff --git a/src/gallium/drivers/freedreno/ir3/ir3.h b/src/gallium/drivers/freedreno/ir3/ir3.h
index 4aebee6..25268aa 100644
--- a/src/gallium/drivers/freedreno/ir3/ir3.h
+++ b/src/gallium/drivers/freedreno/ir3/ir3.h
@@ -427,6 +427,12 @@ static inline bool is_mem(struct ir3_instruction *instr)
static inline bool is_input(struct ir3_instruction *instr)
{
+ /* in some cases, ldlv is used to fetch varying without
+ * interpolation.. fortunately inloc is the first src
+ * register in either case
+ */
+ if (is_mem(instr) && (instr->opc == OPC_LDLV))
+ return true;
return (instr->category == 2) && (instr->opc == OPC_BARY_F);
}
diff --git a/src/gallium/drivers/freedreno/ir3/ir3_compiler.c b/src/gallium/drivers/freedreno/ir3/ir3_compiler.c
index 707bad5..1bfc347 100644
--- a/src/gallium/drivers/freedreno/ir3/ir3_compiler.c
+++ b/src/gallium/drivers/freedreno/ir3/ir3_compiler.c
@@ -102,6 +102,11 @@ struct ir3_compile_context {
/* for calculating input/output positions/linkages: */
unsigned next_inloc;
+ /* a4xx (at least patchlevel 0) cannot seem to flat-interpolate
+ * so we need to use ldlv.u32 to load the varying directly:
+ */
+ bool flat_bypass;
+
unsigned num_internal_temps;
struct tgsi_src_register internal_temps[8];
@@ -198,9 +203,13 @@ compile_init(struct ir3_compile_context *ctx, struct ir3_shader_variant *so,
} else if (ir3_shader_gpuid(so->shader) >= 400) {
/* a4xx seems to have *no* sam.p */
lconfig.lower_TXP = ~0; /* lower all txp */
+ /* need special handling for "flat" */
+ ctx->flat_bypass = true;
} else {
/* a3xx just needs to avoid sam.p for 3d tex */
lconfig.lower_TXP = (1 << TGSI_TEXTURE_3D);
+ /* no special handling for "flat" */
+ ctx->flat_bypass = false;
}
ctx->tokens = tgsi_transform_lowering(&lconfig, tokens, &ctx->info);
@@ -2778,11 +2787,23 @@ decl_semantic(const struct tgsi_declaration_semantic *sem)
static struct ir3_instruction *
decl_in_frag_bary(struct ir3_compile_context *ctx, unsigned regid,
- unsigned j, unsigned inloc)
+ unsigned j, unsigned inloc, bool use_ldlv)
{
struct ir3_instruction *instr;
struct ir3_register *src;
+ if (use_ldlv) {
+ /* ldlv.u32 dst, l[#inloc], 1 */
+ instr = instr_create(ctx, 6, OPC_LDLV);
+ instr->cat6.type = TYPE_U32;
+ instr->cat6.iim_val = 1;
+ ir3_reg_create(instr, regid, 0); /* dummy dst */
+ ir3_reg_create(instr, 0, IR3_REG_IMMED)->iim_val = inloc;
+ ir3_reg_create(instr, 0, IR3_REG_IMMED)->iim_val = 1;
+
+ return instr;
+ }
+
/* bary.f dst, #inloc, r0.x */
instr = instr_create(ctx, 2, OPC_BARY_F);
ir3_reg_create(instr, regid, 0); /* dummy dst */
@@ -2976,9 +2997,31 @@ decl_in(struct ir3_compile_context *ctx, struct tgsi_full_declaration *decl)
so->frag_face = true;
instr = decl_in_frag_face(ctx, r + j, j);
} else {
+ bool use_ldlv = false;
+
+ /* I don't believe it is valid to not have Interp
+ * on a normal frag shader input, and various parts
+ * that that handle flat/smooth shading make this
+ * assumption as well.
+ */
+ compile_assert(ctx, decl->Declaration.Interpolate);
+
+ if (ctx->flat_bypass) {
+ switch (decl->Interp.Interpolate) {
+ case TGSI_INTERPOLATE_COLOR:
+ if (!ctx->so->key.rasterflat)
+ break;
+ /* fallthrough */
+ case TGSI_INTERPOLATE_CONSTANT:
+ use_ldlv = true;
+ break;
+ }
+ }
+
so->inputs[n].bary = true;
+
instr = decl_in_frag_bary(ctx, r + j, j,
- so->inputs[n].inloc + j - 8);
+ so->inputs[n].inloc + j - 8, use_ldlv);
}
} else {
instr = create_input(ctx->block, NULL, (i * 4) + j);
diff --git a/src/gallium/drivers/freedreno/ir3/ir3_legalize.c b/src/gallium/drivers/freedreno/ir3/ir3_legalize.c
index 11629f6..4e0b42b 100644
--- a/src/gallium/drivers/freedreno/ir3/ir3_legalize.c
+++ b/src/gallium/drivers/freedreno/ir3/ir3_legalize.c
@@ -187,8 +187,44 @@ static void legalize(struct ir3_legalize_ctx *ctx)
last_input = n;
}
- if (last_input)
+ if (last_input) {
+ /* special hack.. if using ldlv to bypass interpolation,
+ * we need to insert a dummy bary.f on which we can set
+ * the (ei) flag:
+ */
+ if (is_mem(last_input) && (last_input->opc == OPC_LDLV)) {
+ int i, cnt;
+
+ /* note that ir3_instr_create() inserts into
+ * shader->instrs[] and increments the count..
+ * so we need to bump up the cnt initially (to
+ * avoid it clobbering the last real instr) and
+ * restore it after.
+ */
+ cnt = ++shader->instrs_count;
+
+ /* inserting instructions would be a bit nicer if list.. */
+ for (i = cnt - 2; i >= 0; i--) {
+ if (shader->instrs[i] == last_input) {
+
+ /* (ss)bary.f (ei)r63.x, 0, r0.x */
+ last_input = ir3_instr_create(block, 2, OPC_BARY_F);
+ last_input->flags |= IR3_INSTR_SS;
+ ir3_reg_create(last_input, regid(63, 0), 0);
+ ir3_reg_create(last_input, 0, IR3_REG_IMMED)->iim_val = 0;
+ ir3_reg_create(last_input, regid(0, 0), 0);
+
+ shader->instrs[i + 1] = last_input;
+
+ break;
+ }
+ shader->instrs[i + 1] = shader->instrs[i];
+ }
+
+ shader->instrs_count = cnt;
+ }
last_input->regs[0]->flags |= IR3_REG_EI;
+ }
if (last_rel)
last_rel->flags |= IR3_INSTR_UL;
diff --git a/src/gallium/drivers/freedreno/ir3/ir3_shader.c b/src/gallium/drivers/freedreno/ir3/ir3_shader.c
index 5e43e28..7e7ae36 100644
--- a/src/gallium/drivers/freedreno/ir3/ir3_shader.c
+++ b/src/gallium/drivers/freedreno/ir3/ir3_shader.c
@@ -246,6 +246,7 @@ ir3_shader_variant(struct ir3_shader *shader, struct ir3_shader_key key)
key.color_two_side = false;
key.half_precision = false;
key.alpha = false;
+ key.rasterflat = false;
if (key.has_per_samp) {
key.fsaturate_s = 0;
key.fsaturate_t = 0;
diff --git a/src/gallium/drivers/freedreno/ir3/ir3_shader.h b/src/gallium/drivers/freedreno/ir3/ir3_shader.h
index 5207185..763681b 100644
--- a/src/gallium/drivers/freedreno/ir3/ir3_shader.h
+++ b/src/gallium/drivers/freedreno/ir3/ir3_shader.h
@@ -77,6 +77,10 @@ struct ir3_shader_key {
* let's start with this and see how it goes:
*/
unsigned alpha : 1;
+ /* used when shader needs to handle flat varyings (a4xx),
+ * for TGSI_INTERPOLATE_COLOR:
+ */
+ unsigned rasterflat : 1;
};
uint32_t global;
};
commit 1dec8bbb8e2971ac0cd55dee279ce10ae22242f1
Author: Rob Clark <robclark at freedesktop.org>
Date: Thu Feb 26 15:13:10 2015 -0500
freedreno/ir3: add support for memory (cat6) instructions
Scheduled basically the same as texture (cat5) instructions, using (sy)
flag for synchronization.
Signed-off-by: Rob Clark <robclark at freedesktop.org>
(cherry picked from commit 9d732d3125e1b39788a642a5723aeb54cb1983f3)
diff --git a/src/gallium/drivers/freedreno/ir3/ir3.h b/src/gallium/drivers/freedreno/ir3/ir3.h
index a3bbba9..4aebee6 100644
--- a/src/gallium/drivers/freedreno/ir3/ir3.h
+++ b/src/gallium/drivers/freedreno/ir3/ir3.h
@@ -420,6 +420,11 @@ static inline bool is_tex(struct ir3_instruction *instr)
return (instr->category == 5);
}
+static inline bool is_mem(struct ir3_instruction *instr)
+{
+ return (instr->category == 6);
+}
+
static inline bool is_input(struct ir3_instruction *instr)
{
return (instr->category == 2) && (instr->opc == OPC_BARY_F);
diff --git a/src/gallium/drivers/freedreno/ir3/ir3_depth.c b/src/gallium/drivers/freedreno/ir3/ir3_depth.c
index 76413d4..8ff62ba 100644
--- a/src/gallium/drivers/freedreno/ir3/ir3_depth.c
+++ b/src/gallium/drivers/freedreno/ir3/ir3_depth.c
@@ -67,7 +67,7 @@ int ir3_delayslots(struct ir3_instruction *assigner,
return 6;
/* handled via sync flags: */
- if (is_sfu(assigner) || is_tex(assigner))
+ if (is_sfu(assigner) || is_tex(assigner) || is_mem(assigner))
return 0;
/* assigner must be alu: */
diff --git a/src/gallium/drivers/freedreno/ir3/ir3_legalize.c b/src/gallium/drivers/freedreno/ir3/ir3_legalize.c
index 2ef11f1..11629f6 100644
--- a/src/gallium/drivers/freedreno/ir3/ir3_legalize.c
+++ b/src/gallium/drivers/freedreno/ir3/ir3_legalize.c
@@ -168,6 +168,8 @@ static void legalize(struct ir3_legalize_ctx *ctx)
*/
ctx->has_samp = true;
regmask_set(&needs_sy, n->regs[0]);
+ } else if (is_mem(n)) {
+ regmask_set(&needs_sy, n->regs[0]);
}
/* both tex/sfu appear to not always immediately consume
commit af4d1096f7e82c7759692ac1b83678d3c8029f4c
Author: Rob Clark <robclark at freedesktop.org>
Date: Thu Feb 26 13:35:31 2015 -0500
freedreno/ir3: fix up cat6 instruction encodings
I think there is at least one more sub-encoding, but these two should be
enough to cover the common load/store instructions.
Signed-off-by: Rob Clark <robclark at freedesktop.org>
(cherry picked from commit 20b50a071271e2caf8a4c3d4fd72f877af8a18d9)
diff --git a/src/gallium/drivers/freedreno/ir3/disasm-a3xx.c b/src/gallium/drivers/freedreno/ir3/disasm-a3xx.c
index 602be65..bed9aca 100644
--- a/src/gallium/drivers/freedreno/ir3/disasm-a3xx.c
+++ b/src/gallium/drivers/freedreno/ir3/disasm-a3xx.c
@@ -448,117 +448,114 @@ static void print_instr_cat5(instr_t *instr)
}
}
-static int32_t u2i(uint32_t val, int nbits)
-{
- return ((val >> (nbits-1)) * ~((1 << nbits) - 1)) | val;
-}
-
static void print_instr_cat6(instr_t *instr)
{
instr_cat6_t *cat6 = &instr->cat6;
+ char sd = 0, ss = 0; /* dst/src address space */
+ bool full = type_size(cat6->type) == 32;
+ bool nodst = false;
printf(".%s ", type[cat6->type]);
switch (cat6->opc) {
+ case OPC_STG:
+ sd = 'g';
+ break;
+ case OPC_STP:
+ sd = 'p';
+ break;
+ case OPC_STL:
+ case OPC_STLW:
+ sd = 'l';
+ break;
+
case OPC_LDG:
+ ss = 'g';
+ break;
case OPC_LDP:
+ ss = 'p';
+ break;
case OPC_LDL:
case OPC_LDLW:
case OPC_LDLV:
- /* load instructions: */
- print_reg_dst((reg_t)(cat6->a.dst), type_size(cat6->type) == 32, false);
- printf(",");
- switch (cat6->opc) {
- case OPC_LDG:
- printf("g");
- break;
- case OPC_LDP:
- printf("p");
- break;
- case OPC_LDL:
- case OPC_LDLW:
- case OPC_LDLV:
- printf("l");
- break;
- }
- printf("[");
- print_reg_src((reg_t)(cat6->a.src), true,
- false, false, false, false, false, false);
- if (cat6->a.off)
- printf("%+d", cat6->a.off);
- printf("]");
+ ss = 'l';
break;
- case OPC_PREFETCH:
- /* similar to load instructions: */
- printf("g[");
- print_reg_src((reg_t)(cat6->a.src), true,
- false, false, false, false, false, false);
- if (cat6->a.off)
- printf("%+d", cat6->a.off);
- printf("]");
+
+ case OPC_L2G:
+ ss = 'l';
+ sd = 'g';
break;
- case OPC_STG:
- case OPC_STP:
- case OPC_STL:
- case OPC_STLW:
- /* store instructions: */
- switch (cat6->opc) {
- case OPC_STG:
- printf("g");
- break;
- case OPC_STP:
- printf("p");
- break;
- case OPC_STL:
- case OPC_STLW:
- printf("l");
- break;
- }
- printf("[");
- print_reg_dst((reg_t)(cat6->b.dst), true, false);
- if (cat6->b.off || cat6->b.off_hi)
- printf("%+d", u2i((cat6->b.off_hi << 8) | cat6->b.off, 13));
- printf("]");
- printf(",");
- print_reg_src((reg_t)(cat6->b.src), type_size(cat6->type) == 32,
- false, false, false, false, false, false);
+ case OPC_G2L:
+ ss = 'g';
+ sd = 'l';
break;
+
+ case OPC_PREFETCH:
+ ss = 'g';
+ nodst = true;
+ break;
+
case OPC_STI:
- /* sti has same encoding as other store instructions, but
- * slightly different syntax:
- */
- print_reg_dst((reg_t)(cat6->b.dst), false /* XXX is it always half? */, false);
- if (cat6->b.off || cat6->b.off_hi)
- printf("%+d", u2i((cat6->b.off_hi << 8) | cat6->b.off, 13));
- printf(",");
- print_reg_src((reg_t)(cat6->b.src), type_size(cat6->type) == 32,
- false, false, false, false, false, false);
+ full = false; // XXX or inverts??
break;
}
- printf(", %d", cat6->iim_val);
+ if (cat6->has_off) {
+ if (!nodst) {
+ if (sd)
+ printf("%c[", sd);
+ print_reg_dst((reg_t)(cat6->a.dst), full, false);
+ if (sd)
+ printf("]");
+ printf(", ");
+ }
+ if (ss)
+ printf("%c[", ss);
+ print_reg_src((reg_t)(cat6->a.src1), true,
+ false, false, cat6->a.src1_im, false, false, false);
+ printf("%+d", cat6->a.off);
+ if (ss)
+ printf("]");
+ printf(", ");
+ print_reg_src((reg_t)(cat6->a.src2), full,
+ false, false, cat6->a.src2_im, false, false, false);
+ } else {
+ if (!nodst) {
+ if (sd)
+ printf("%c[", sd);
+ print_reg_dst((reg_t)(cat6->b.dst), full, false);
+ if (sd)
+ printf("]");
+ printf(", ");
+ }
+ if (ss)
+ printf("%c[", ss);
+ print_reg_src((reg_t)(cat6->b.src1), true,
+ false, false, cat6->b.src1_im, false, false, false);
+ if (ss)
+ printf("]");
+ printf(", ");
+ print_reg_src((reg_t)(cat6->b.src2), full,
+ false, false, cat6->b.src2_im, false, false, false);
+ }
if (debug & PRINT_VERBOSE) {
switch (cat6->opc) {
case OPC_LDG:
case OPC_LDP:
/* load instructions: */
- if (cat6->a.dummy1|cat6->a.dummy2|cat6->a.dummy3)
- printf("\t{6: %x,%x,%x}", cat6->a.dummy1, cat6->a.dummy2, cat6->a.dummy3);
- if ((cat6->a.must_be_one1 != 1) || (cat6->a.must_be_one2 != 1))
- printf("{?? %d,%d ??}", cat6->a.must_be_one1, cat6->a.must_be_one2);
+ if (cat6->a.dummy2|cat6->a.dummy3)
+ printf("\t{6: %x,%x}", cat6->a.dummy2, cat6->a.dummy3);
break;
case OPC_STG:
case OPC_STP:
case OPC_STI:
/* store instructions: */
- if (cat6->b.dummy1|cat6->b.dummy2)
- printf("\t{6: %x,%x}", cat6->b.dummy1, cat6->b.dummy2);
- if ((cat6->b.must_be_one1 != 1) || (cat6->b.must_be_one2 != 1) ||
- (cat6->b.must_be_zero1 != 0))
- printf("{?? %d,%d,%d ??}", cat6->b.must_be_one1, cat6->b.must_be_one2,
- cat6->b.must_be_zero1);
+ if (cat6->b.dummy2|cat6->b.dummy2)
+ printf("\t{6: %x,%x}", cat6->b.dummy2, cat6->b.dummy3);
+ if (cat6->b.ignore0)
+ printf("\t{?? %x}", cat6->b.ignore0);
break;
}
}
diff --git a/src/gallium/drivers/freedreno/ir3/instr-a3xx.h b/src/gallium/drivers/freedreno/ir3/instr-a3xx.h
index c67f103..b7e19c8 100644
--- a/src/gallium/drivers/freedreno/ir3/instr-a3xx.h
+++ b/src/gallium/drivers/freedreno/ir3/instr-a3xx.h
@@ -572,15 +572,15 @@ typedef struct PACKED {
uint32_t opc_cat : 3;
} instr_cat5_t;
-/* used for load instructions: */
+/* [src1 + off], src2: */
typedef struct PACKED {
/* dword0: */
- uint32_t must_be_one1 : 1;
- int16_t off : 13;
- uint32_t src : 8;
- uint32_t dummy1 : 1;
- uint32_t must_be_one2 : 1;
- int32_t iim_val : 8;
+ uint32_t mustbe1 : 1;
+ int32_t off : 13;
+ uint32_t src1 : 8;
+ uint32_t src1_im : 1;
+ uint32_t src2_im : 1;
+ uint32_t src2 : 8;
/* dword1: */
uint32_t dst : 8;
@@ -593,35 +593,38 @@ typedef struct PACKED {
uint32_t opc_cat : 3;
} instr_cat6a_t;
-/* used for store instructions: */
+/* [src1], src2: */
typedef struct PACKED {
/* dword0: */
- uint32_t must_be_zero1 : 1;
- uint32_t src : 8;
- uint32_t off_hi : 5; /* high bits of 'off'... ugly! */
- uint32_t dummy1 : 9;
- uint32_t must_be_one1 : 1;
- int32_t iim_val : 8;
+ uint32_t mustbe0 : 1;
+ uint32_t src1 : 8;
+ uint32_t ignore0 : 13;
+ uint32_t src1_im : 1;
+ uint32_t src2_im : 1;
+ uint32_t src2 : 8;
/* dword1: */
- uint16_t off : 8;
- uint32_t must_be_one2 : 1;
uint32_t dst : 8;
+ uint32_t dummy2 : 9;
uint32_t type : 3;
- uint32_t dummy2 : 2;
+ uint32_t dummy3 : 2;
uint32_t opc : 5;
uint32_t jmp_tgt : 1;
uint32_t sync : 1;
uint32_t opc_cat : 3;
} instr_cat6b_t;
+/* I think some of the other cat6 instructions use additional
+ * sub-encodings..
+ */
+
typedef union PACKED {
instr_cat6a_t a;
instr_cat6b_t b;
struct PACKED {
/* dword0: */
- uint32_t pad1 : 24;
- int32_t iim_val : 8;
+ uint32_t has_off : 1;
+ uint32_t pad1 : 31;
/* dword1: */
uint32_t pad2 : 17;
diff --git a/src/gallium/drivers/freedreno/ir3/ir3.c b/src/gallium/drivers/freedreno/ir3/ir3.c
index 095085a..a02b06f 100644
--- a/src/gallium/drivers/freedreno/ir3/ir3.c
+++ b/src/gallium/drivers/freedreno/ir3/ir3.c
@@ -474,58 +474,40 @@ static int emit_cat5(struct ir3_instruction *instr, void *ptr,
static int emit_cat6(struct ir3_instruction *instr, void *ptr,
struct ir3_info *info)
{
- struct ir3_register *dst = instr->regs[0];
- struct ir3_register *src = instr->regs[1];
+ struct ir3_register *dst = instr->regs[0];
+ struct ir3_register *src1 = instr->regs[1];
+ struct ir3_register *src2 = (instr->regs_count >= 3) ? instr->regs[2] : NULL;
instr_cat6_t *cat6 = ptr;
- iassert(instr->regs_count == 2);
+ iassert(instr->regs_count >= 2);
- switch (instr->opc) {
- /* load instructions: */
- case OPC_LDG:
- case OPC_LDP:
- case OPC_LDL:
- case OPC_LDLW:
- case OPC_LDLV:
- case OPC_PREFETCH: {
+ if (instr->cat6.offset) {
instr_cat6a_t *cat6a = ptr;
- iassert(!((dst->flags ^ type_flags(instr->cat6.type)) & IR3_REG_HALF));
+ cat6->has_off = true;
- cat6a->must_be_one1 = 1;
- cat6a->must_be_one2 = 1;
- cat6a->off = instr->cat6.offset;
- cat6a->src = reg(src, info, instr->repeat, 0);
cat6a->dst = reg(dst, info, instr->repeat, IR3_REG_R | IR3_REG_HALF);
- break;
- }
- /* store instructions: */
- case OPC_STG:
- case OPC_STP:
- case OPC_STL:
- case OPC_STLW:
- case OPC_STI: {
+ cat6a->src1 = reg(src1, info, instr->repeat, IR3_REG_IMMED);
+ cat6a->src1_im = !!(src1->flags & IR3_REG_IMMED);
+ if (src2) {
+ cat6a->src2 = reg(src2, info, instr->repeat, IR3_REG_IMMED);
+ cat6a->src2_im = !!(src2->flags & IR3_REG_IMMED);
+ }
+ cat6a->off = instr->cat6.offset;
+ } else {
instr_cat6b_t *cat6b = ptr;
- uint32_t src_flags = type_flags(instr->cat6.type);
- uint32_t dst_flags = (instr->opc == OPC_STI) ? IR3_REG_HALF : 0;
-
- iassert(!((src->flags ^ src_flags) & IR3_REG_HALF));
- cat6b->must_be_one1 = 1;
- cat6b->must_be_one2 = 1;
- cat6b->src = reg(src, info, instr->repeat, src_flags);
- cat6b->off_hi = instr->cat6.offset >> 8;
- cat6b->off = instr->cat6.offset;
- cat6b->dst = reg(dst, info, instr->repeat, IR3_REG_R | dst_flags);
+ cat6->has_off = false;
- break;
- }
- default:
- // TODO
- break;
+ cat6b->dst = reg(dst, info, instr->repeat, IR3_REG_R | IR3_REG_HALF);
+ cat6b->src1 = reg(src1, info, instr->repeat, IR3_REG_IMMED);
+ cat6b->src1_im = !!(src1->flags & IR3_REG_IMMED);
+ if (src2) {
+ cat6b->src2 = reg(src2, info, instr->repeat, IR3_REG_IMMED);
+ cat6b->src2_im = !!(src2->flags & IR3_REG_IMMED);
+ }
}
- cat6->iim_val = instr->cat6.iim_val;
cat6->type = instr->cat6.type;
cat6->opc = instr->opc;
cat6->jmp_tgt = !!(instr->flags & IR3_INSTR_JP);
commit 645d7f464b669f24c81fb2d78ad3f6f317e8a8c3
Author: Rob Clark <robclark at freedesktop.org>
Date: Tue Feb 24 11:55:28 2015 -0500
freedreno/a4xx: aniso filtering
Signed-off-by: Rob Clark <robclark at freedesktop.org>
(cherry picked from commit dd70e786747f7e4800f4bba245373c5ffa3baeee)
diff --git a/src/gallium/drivers/freedreno/a4xx/fd4_texture.c b/src/gallium/drivers/freedreno/a4xx/fd4_texture.c
index f9b6dcc..40aca0e 100644
--- a/src/gallium/drivers/freedreno/a4xx/fd4_texture.c
+++ b/src/gallium/drivers/freedreno/a4xx/fd4_texture.c
@@ -68,13 +68,13 @@ tex_clamp(unsigned wrap)
}
static enum a4xx_tex_filter
-tex_filter(unsigned filter)
+tex_filter(unsigned filter, bool aniso)
{
switch (filter) {
case PIPE_TEX_FILTER_NEAREST:
return A4XX_TEX_NEAREST;
case PIPE_TEX_FILTER_LINEAR:
- return A4XX_TEX_LINEAR;
+ return aniso ? A4XX_TEX_ANISO : A4XX_TEX_LINEAR;
default:
DBG("invalid filter: %u", filter);
return 0;
@@ -86,6 +86,7 @@ fd4_sampler_state_create(struct pipe_context *pctx,
const struct pipe_sampler_state *cso)
{
struct fd4_sampler_stateobj *so = CALLOC_STRUCT(fd4_sampler_stateobj);
+ unsigned aniso = util_last_bit(MIN2(cso->max_anisotropy >> 1, 8));
bool miplinear = false;
if (!so)
@@ -98,8 +99,9 @@ fd4_sampler_state_create(struct pipe_context *pctx,
so->texsamp0 =
COND(miplinear, A4XX_TEX_SAMP_0_MIPFILTER_LINEAR_NEAR) |
- A4XX_TEX_SAMP_0_XY_MAG(tex_filter(cso->mag_img_filter)) |
- A4XX_TEX_SAMP_0_XY_MIN(tex_filter(cso->min_img_filter)) |
+ A4XX_TEX_SAMP_0_XY_MAG(tex_filter(cso->mag_img_filter, aniso)) |
+ A4XX_TEX_SAMP_0_XY_MIN(tex_filter(cso->min_img_filter, aniso)) |
+ A4XX_TEX_SAMP_0_ANISO(aniso) |
A4XX_TEX_SAMP_0_WRAP_S(tex_clamp(cso->wrap_s)) |
A4XX_TEX_SAMP_0_WRAP_T(tex_clamp(cso->wrap_t)) |
A4XX_TEX_SAMP_0_WRAP_R(tex_clamp(cso->wrap_r));
commit 80c4ba0c8351ceb45e99686ce4b54a3cd1c869ca
Author: Rob Clark <robclark at freedesktop.org>
Date: Tue Feb 24 11:48:01 2015 -0500
freedreno: update generated headers
Signed-off-by: Rob Clark <robclark at freedesktop.org>
(cherry picked from commit c70097ae8655d84a900cb27d165ca59d66411e29)
diff --git a/src/gallium/drivers/freedreno/a2xx/a2xx.xml.h b/src/gallium/drivers/freedreno/a2xx/a2xx.xml.h
index 70e03db..de415ab 100644
--- a/src/gallium/drivers/freedreno/a2xx/a2xx.xml.h
+++ b/src/gallium/drivers/freedreno/a2xx/a2xx.xml.h
@@ -14,7 +14,7 @@ The rules-ng-ng source files this header was generated from are:
- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_common.xml ( 10551 bytes, from 2014-11-13 22:44:30)
- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_pm4.xml ( 15085 bytes, from 2014-12-20 21:49:41)
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a3xx.xml ( 64848 bytes, from 2015-02-20 18:21:24)
-- /home/robclark/src/freedreno/envytools/rnndb/adreno/a4xx.xml ( 51566 bytes, from 2015-02-21 18:31:59)
+- /home/robclark/src/freedreno/envytools/rnndb/adreno/a4xx.xml ( 51942 bytes, from 2015-02-24 17:14:02)
Copyright (C) 2013-2014 by the following authors:
- Rob Clark <robdclark at gmail.com> (robclark)
diff --git a/src/gallium/drivers/freedreno/a3xx/a3xx.xml.h b/src/gallium/drivers/freedreno/a3xx/a3xx.xml.h
index 29c0fcd..f0912b4 100644
--- a/src/gallium/drivers/freedreno/a3xx/a3xx.xml.h
+++ b/src/gallium/drivers/freedreno/a3xx/a3xx.xml.h
@@ -14,7 +14,7 @@ The rules-ng-ng source files this header was generated from are:
- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_common.xml ( 10551 bytes, from 2014-11-13 22:44:30)
- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_pm4.xml ( 15085 bytes, from 2014-12-20 21:49:41)
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a3xx.xml ( 64848 bytes, from 2015-02-20 18:21:24)
-- /home/robclark/src/freedreno/envytools/rnndb/adreno/a4xx.xml ( 51566 bytes, from 2015-02-21 18:31:59)
+- /home/robclark/src/freedreno/envytools/rnndb/adreno/a4xx.xml ( 51942 bytes, from 2015-02-24 17:14:02)
Copyright (C) 2013-2015 by the following authors:
- Rob Clark <robdclark at gmail.com> (robclark)
diff --git a/src/gallium/drivers/freedreno/a4xx/a4xx.xml.h b/src/gallium/drivers/freedreno/a4xx/a4xx.xml.h
index 1f1a554..73e9de6 100644
--- a/src/gallium/drivers/freedreno/a4xx/a4xx.xml.h
+++ b/src/gallium/drivers/freedreno/a4xx/a4xx.xml.h
@@ -14,7 +14,7 @@ The rules-ng-ng source files this header was generated from are:
- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_common.xml ( 10551 bytes, from 2014-11-13 22:44:30)
- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_pm4.xml ( 15085 bytes, from 2014-12-20 21:49:41)
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a3xx.xml ( 64848 bytes, from 2015-02-20 18:21:24)
-- /home/robclark/src/freedreno/envytools/rnndb/adreno/a4xx.xml ( 51566 bytes, from 2015-02-21 18:31:59)
+- /home/robclark/src/freedreno/envytools/rnndb/adreno/a4xx.xml ( 51942 bytes, from 2015-02-24 17:14:02)
Copyright (C) 2013-2015 by the following authors:
- Rob Clark <robdclark at gmail.com> (robclark)
@@ -150,6 +150,7 @@ enum a4xx_depth_format {
enum a4xx_tex_filter {
A4XX_TEX_NEAREST = 0,
A4XX_TEX_LINEAR = 1,
+ A4XX_TEX_ANISO = 2,
};
enum a4xx_tex_clamp {
@@ -159,6 +160,14 @@ enum a4xx_tex_clamp {
A4XX_TEX_CLAMP_NONE = 3,
};
+enum a4xx_tex_aniso {
+ A4XX_TEX_ANISO_1 = 0,
+ A4XX_TEX_ANISO_2 = 1,
+ A4XX_TEX_ANISO_4 = 2,
+ A4XX_TEX_ANISO_8 = 3,
+ A4XX_TEX_ANISO_16 = 4,
+};
+
enum a4xx_tex_swiz {
A4XX_TEX_X = 0,
A4XX_TEX_Y = 1,
@@ -2179,6 +2188,12 @@ static inline uint32_t A4XX_TEX_SAMP_0_WRAP_R(enum a4xx_tex_clamp val)
{
return ((val) << A4XX_TEX_SAMP_0_WRAP_R__SHIFT) & A4XX_TEX_SAMP_0_WRAP_R__MASK;
}
+#define A4XX_TEX_SAMP_0_ANISO__MASK 0x0001c000
+#define A4XX_TEX_SAMP_0_ANISO__SHIFT 14
+static inline uint32_t A4XX_TEX_SAMP_0_ANISO(enum a4xx_tex_aniso val)
+{
+ return ((val) << A4XX_TEX_SAMP_0_ANISO__SHIFT) & A4XX_TEX_SAMP_0_ANISO__MASK;
+}
#define REG_A4XX_TEX_SAMP_1 0x00000001
#define A4XX_TEX_SAMP_1_COMPARE_FUNC__MASK 0x0000000e
diff --git a/src/gallium/drivers/freedreno/adreno_common.xml.h b/src/gallium/drivers/freedreno/adreno_common.xml.h
index 9510d8d..868decd 100644
--- a/src/gallium/drivers/freedreno/adreno_common.xml.h
+++ b/src/gallium/drivers/freedreno/adreno_common.xml.h
@@ -14,7 +14,7 @@ The rules-ng-ng source files this header was generated from are:
- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_common.xml ( 10551 bytes, from 2014-11-13 22:44:30)
- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_pm4.xml ( 15085 bytes, from 2014-12-20 21:49:41)
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a3xx.xml ( 64848 bytes, from 2015-02-20 18:21:24)
-- /home/robclark/src/freedreno/envytools/rnndb/adreno/a4xx.xml ( 51566 bytes, from 2015-02-21 18:31:59)
+- /home/robclark/src/freedreno/envytools/rnndb/adreno/a4xx.xml ( 51942 bytes, from 2015-02-24 17:14:02)
Copyright (C) 2013-2014 by the following authors:
- Rob Clark <robdclark at gmail.com> (robclark)
diff --git a/src/gallium/drivers/freedreno/adreno_pm4.xml.h b/src/gallium/drivers/freedreno/adreno_pm4.xml.h
index f1c22b8..19f8eb5 100644
--- a/src/gallium/drivers/freedreno/adreno_pm4.xml.h
+++ b/src/gallium/drivers/freedreno/adreno_pm4.xml.h
@@ -14,7 +14,7 @@ The rules-ng-ng source files this header was generated from are:
- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_common.xml ( 10551 bytes, from 2014-11-13 22:44:30)
- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_pm4.xml ( 15085 bytes, from 2014-12-20 21:49:41)
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a3xx.xml ( 64848 bytes, from 2015-02-20 18:21:24)
-- /home/robclark/src/freedreno/envytools/rnndb/adreno/a4xx.xml ( 51566 bytes, from 2015-02-21 18:31:59)
+- /home/robclark/src/freedreno/envytools/rnndb/adreno/a4xx.xml ( 51942 bytes, from 2015-02-24 17:14:02)
Copyright (C) 2013-2014 by the following authors:
- Rob Clark <robdclark at gmail.com> (robclark)
commit aca5fdae061ed5f1ebf3762f71d2f2d3beb25c39
Author: Rob Clark <robclark at freedesktop.org>
Date: Sat Feb 21 13:55:37 2015 -0500
freedreno/a4xx: set PC_PRIM_VTX_CNTL.VAROUT properly
Fixes xonotic, some webgl stuff, and really pretty much anything with
more than 4 varyings.
Signed-off-by: Rob Clark <robclark at freedesktop.org>
(cherry picked from commit 51e335742e55d6725fd5c4558158769a32f70f22)
diff --git a/src/gallium/drivers/freedreno/a4xx/fd4_emit.c b/src/gallium/drivers/freedreno/a4xx/fd4_emit.c
index 7359639..0e00e38 100644
--- a/src/gallium/drivers/freedreno/a4xx/fd4_emit.c
+++ b/src/gallium/drivers/freedreno/a4xx/fd4_emit.c
@@ -440,7 +440,12 @@ fd4_emit_state(struct fd_context *ctx, struct fd_ringbuffer *ring,
->pc_prim_vtx_cntl;
val |= COND(vp->writes_psize, A4XX_PC_PRIM_VTX_CNTL_PSIZE);
- val |= COND(fp->total_in > 0, A4XX_PC_PRIM_VTX_CNTL_VAROUT(1));
+ if (fp->total_in > 0) {
+ uint32_t varout = align(fp->total_in, 16) / 16;
+ if (varout > 1)
+ varout = align(varout, 2);
+ val |= A4XX_PC_PRIM_VTX_CNTL_VAROUT(varout);
+ }
OUT_PKT0(ring, REG_A4XX_PC_PRIM_VTX_CNTL, 2);
OUT_RING(ring, val);
commit 7abc57b66921186feb2e013b345b0f1b70364bf3
Author: Rob Clark <robclark at freedesktop.org>
Date: Sat Feb 21 13:50:52 2015 -0500
freedreno: update generated headers
Signed-off-by: Rob Clark <robclark at freedesktop.org>
(cherry picked from commit fb1301e40abbac1de973563cacd2c7f31aa6bb4f)
Conflicts:
src/gallium/drivers/freedreno/a3xx/a3xx.xml.h
diff --git a/src/gallium/drivers/freedreno/a2xx/a2xx.xml.h b/src/gallium/drivers/freedreno/a2xx/a2xx.xml.h
index 6ef5126..70e03db 100644
--- a/src/gallium/drivers/freedreno/a2xx/a2xx.xml.h
+++ b/src/gallium/drivers/freedreno/a2xx/a2xx.xml.h
@@ -13,8 +13,8 @@ The rules-ng-ng source files this header was generated from are:
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a2xx.xml ( 32901 bytes, from 2014-06-02 15:21:30)
- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_common.xml ( 10551 bytes, from 2014-11-13 22:44:30)
- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_pm4.xml ( 15085 bytes, from 2014-12-20 21:49:41)
-- /home/robclark/src/freedreno/envytools/rnndb/adreno/a3xx.xml ( 64344 bytes, from 2014-12-12 20:22:26)
-- /home/robclark/src/freedreno/envytools/rnndb/adreno/a4xx.xml ( 51270 bytes, from 2015-01-18 23:05:48)
+- /home/robclark/src/freedreno/envytools/rnndb/adreno/a3xx.xml ( 64848 bytes, from 2015-02-20 18:21:24)
+- /home/robclark/src/freedreno/envytools/rnndb/adreno/a4xx.xml ( 51566 bytes, from 2015-02-21 18:31:59)
Copyright (C) 2013-2014 by the following authors:
- Rob Clark <robdclark at gmail.com> (robclark)
diff --git a/src/gallium/drivers/freedreno/a3xx/a3xx.xml.h b/src/gallium/drivers/freedreno/a3xx/a3xx.xml.h
index 366bf2f..29c0fcd 100644
--- a/src/gallium/drivers/freedreno/a3xx/a3xx.xml.h
+++ b/src/gallium/drivers/freedreno/a3xx/a3xx.xml.h
@@ -13,10 +13,10 @@ The rules-ng-ng source files this header was generated from are:
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a2xx.xml ( 32901 bytes, from 2014-06-02 15:21:30)
- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_common.xml ( 10551 bytes, from 2014-11-13 22:44:30)
- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_pm4.xml ( 15085 bytes, from 2014-12-20 21:49:41)
-- /home/robclark/src/freedreno/envytools/rnndb/adreno/a3xx.xml ( 64344 bytes, from 2014-12-12 20:22:26)
-- /home/robclark/src/freedreno/envytools/rnndb/adreno/a4xx.xml ( 51270 bytes, from 2015-01-18 23:05:48)
+- /home/robclark/src/freedreno/envytools/rnndb/adreno/a3xx.xml ( 64848 bytes, from 2015-02-20 18:21:24)
+- /home/robclark/src/freedreno/envytools/rnndb/adreno/a4xx.xml ( 51566 bytes, from 2015-02-21 18:31:59)
-Copyright (C) 2013-2014 by the following authors:
+Copyright (C) 2013-2015 by the following authors:
- Rob Clark <robdclark at gmail.com> (robclark)
Permission is hereby granted, free of charge, to any person obtaining
@@ -130,6 +130,10 @@ enum a3xx_tex_fmt {
TFMT_I420_Y = 24,
TFMT_I420_U = 26,
TFMT_I420_V = 27,
+ TFMT_ATC_RGB = 32,
+ TFMT_ATC_RGBA_EXPLICIT = 33,
+ TFMT_ETC1 = 34,
+ TFMT_ATC_RGBA_INTERPOLATED = 35,
TFMT_DXT1 = 36,
TFMT_DXT3 = 37,
TFMT_DXT5 = 38,
@@ -854,6 +858,12 @@ static inline uint32_t A3XX_RB_MODE_CONTROL_RENDER_MODE(enum a3xx_render_mode va
{
return ((val) << A3XX_RB_MODE_CONTROL_RENDER_MODE__SHIFT) & A3XX_RB_MODE_CONTROL_RENDER_MODE__MASK;
}
+#define A3XX_RB_MODE_CONTROL_MRT__MASK 0x00003000
+#define A3XX_RB_MODE_CONTROL_MRT__SHIFT 12
+static inline uint32_t A3XX_RB_MODE_CONTROL_MRT(uint32_t val)
+{
+ return ((val) << A3XX_RB_MODE_CONTROL_MRT__SHIFT) & A3XX_RB_MODE_CONTROL_MRT__MASK;
+}
#define A3XX_RB_MODE_CONTROL_MARB_CACHE_SPLIT_MODE 0x00008000
#define A3XX_RB_MODE_CONTROL_PACKER_TIMER_ENABLE 0x00010000
@@ -2107,6 +2117,12 @@ static inline uint32_t A3XX_SP_FS_OBJ_OFFSET_REG_SHADEROBJOFFSET(uint32_t val)
#define REG_A3XX_SP_FS_FLAT_SHAD_MODE_REG_1 0x000022e9
#define REG_A3XX_SP_FS_OUTPUT_REG 0x000022ec
+#define A3XX_SP_FS_OUTPUT_REG_MRT__MASK 0x00000003
+#define A3XX_SP_FS_OUTPUT_REG_MRT__SHIFT 0
+static inline uint32_t A3XX_SP_FS_OUTPUT_REG_MRT(uint32_t val)
+{
+ return ((val) << A3XX_SP_FS_OUTPUT_REG_MRT__SHIFT) & A3XX_SP_FS_OUTPUT_REG_MRT__MASK;
+}
#define A3XX_SP_FS_OUTPUT_REG_DEPTH_ENABLE 0x00000080
#define A3XX_SP_FS_OUTPUT_REG_DEPTH_REGID__MASK 0x0000ff00
#define A3XX_SP_FS_OUTPUT_REG_DEPTH_REGID__SHIFT 8
diff --git a/src/gallium/drivers/freedreno/a4xx/a4xx.xml.h b/src/gallium/drivers/freedreno/a4xx/a4xx.xml.h
index 155231f..1f1a554 100644
--- a/src/gallium/drivers/freedreno/a4xx/a4xx.xml.h
+++ b/src/gallium/drivers/freedreno/a4xx/a4xx.xml.h
@@ -13,8 +13,8 @@ The rules-ng-ng source files this header was generated from are:
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a2xx.xml ( 32901 bytes, from 2014-06-02 15:21:30)
- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_common.xml ( 10551 bytes, from 2014-11-13 22:44:30)
- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_pm4.xml ( 15085 bytes, from 2014-12-20 21:49:41)
-- /home/robclark/src/freedreno/envytools/rnndb/adreno/a3xx.xml ( 64344 bytes, from 2014-12-12 20:22:26)
-- /home/robclark/src/freedreno/envytools/rnndb/adreno/a4xx.xml ( 51270 bytes, from 2015-01-18 23:05:48)
+- /home/robclark/src/freedreno/envytools/rnndb/adreno/a3xx.xml ( 64848 bytes, from 2015-02-20 18:21:24)
+- /home/robclark/src/freedreno/envytools/rnndb/adreno/a4xx.xml ( 51566 bytes, from 2015-02-21 18:31:59)
Copyright (C) 2013-2015 by the following authors:
- Rob Clark <robdclark at gmail.com> (robclark)
@@ -936,6 +936,10 @@ static inline uint32_t REG_A4XX_RBBM_CLOCK_DELAY_RB_MARB_CCU_L1_REG(uint32_t i0)
#define REG_A4XX_CP_IB2_BUFSZ 0x00000209
+#define REG_A4XX_CP_ME_NRT_ADDR 0x0000020c
+
+#define REG_A4XX_CP_ME_NRT_DATA 0x0000020d
+
#define REG_A4XX_CP_ME_RB_DONE_DATA 0x00000217
#define REG_A4XX_CP_QUEUE_THRESH2 0x00000219
@@ -946,9 +950,9 @@ static inline uint32_t REG_A4XX_RBBM_CLOCK_DELAY_RB_MARB_CCU_L1_REG(uint32_t i0)
#define REG_A4XX_CP_ROQ_DATA 0x0000021d
-#define REG_A4XX_CP_MEQ_ADDR 0x0000021e
+#define REG_A4XX_CP_MEQ_ADDR 0x0000021e
-#define REG_A4XX_CP_MEQ_DATA 0x0000021f
+#define REG_A4XX_CP_MEQ_DATA 0x0000021f
#define REG_A4XX_CP_MERCIU_ADDR 0x00000220
@@ -1424,6 +1428,10 @@ static inline uint32_t REG_A4XX_VSC_PIPE_DATA_LENGTH_REG(uint32_t i0) { return 0
#define REG_A4XX_VFD_PERFCTR_VFD_SEL_7 0x00000e4a
+#define REG_A4XX_VGT_CL_INITIATOR 0x000021d0
+
+#define REG_A4XX_VGT_EVENT_INITIATOR 0x000021d9
+
#define REG_A4XX_VFD_CONTROL_0 0x00002200
#define A4XX_VFD_CONTROL_0_TOTALATTRTOVS__MASK 0x000000ff
#define A4XX_VFD_CONTROL_0_TOTALATTRTOVS__SHIFT 0
@@ -2041,7 +2049,12 @@ static inline uint32_t A4XX_HLSQ_GS_CONTROL_REG_INSTRLENGTH(uint32_t val)
#define REG_A4XX_PC_BIN_BASE 0x000021c0
#define REG_A4XX_PC_PRIM_VTX_CNTL 0x000021c4
-#define A4XX_PC_PRIM_VTX_CNTL_VAROUT 0x00000001
+#define A4XX_PC_PRIM_VTX_CNTL_VAROUT__MASK 0x0000000f
+#define A4XX_PC_PRIM_VTX_CNTL_VAROUT__SHIFT 0
+static inline uint32_t A4XX_PC_PRIM_VTX_CNTL_VAROUT(uint32_t val)
+{
+ return ((val) << A4XX_PC_PRIM_VTX_CNTL_VAROUT__SHIFT) & A4XX_PC_PRIM_VTX_CNTL_VAROUT__MASK;
+}
#define A4XX_PC_PRIM_VTX_CNTL_PROVOKING_VTX_LAST 0x02000000
#define A4XX_PC_PRIM_VTX_CNTL_PSIZE 0x04000000
diff --git a/src/gallium/drivers/freedreno/a4xx/fd4_emit.c b/src/gallium/drivers/freedreno/a4xx/fd4_emit.c
index 1d098f2..7359639 100644
--- a/src/gallium/drivers/freedreno/a4xx/fd4_emit.c
+++ b/src/gallium/drivers/freedreno/a4xx/fd4_emit.c
@@ -440,7 +440,7 @@ fd4_emit_state(struct fd_context *ctx, struct fd_ringbuffer *ring,
->pc_prim_vtx_cntl;
val |= COND(vp->writes_psize, A4XX_PC_PRIM_VTX_CNTL_PSIZE);
- val |= COND(fp->total_in > 0, A4XX_PC_PRIM_VTX_CNTL_VAROUT);
+ val |= COND(fp->total_in > 0, A4XX_PC_PRIM_VTX_CNTL_VAROUT(1));
OUT_PKT0(ring, REG_A4XX_PC_PRIM_VTX_CNTL, 2);
OUT_RING(ring, val);
diff --git a/src/gallium/drivers/freedreno/a4xx/fd4_gmem.c b/src/gallium/drivers/freedreno/a4xx/fd4_gmem.c
index c52fa99..7f852e0 100644
--- a/src/gallium/drivers/freedreno/a4xx/fd4_gmem.c
+++ b/src/gallium/drivers/freedreno/a4xx/fd4_gmem.c
@@ -375,7 +375,7 @@ fd4_emit_tile_mem2gmem(struct fd_context *ctx, struct fd_tile *tile)
OUT_PKT0(ring, REG_A4XX_PC_PRIM_VTX_CNTL, 1);
OUT_RING(ring, A4XX_PC_PRIM_VTX_CNTL_PROVOKING_VTX_LAST |
- A4XX_PC_PRIM_VTX_CNTL_VAROUT);
+ A4XX_PC_PRIM_VTX_CNTL_VAROUT(1));
OUT_PKT0(ring, REG_A4XX_VFD_INDEX_OFFSET, 2);
OUT_RING(ring, 0); /* VFD_INDEX_OFFSET */
diff --git a/src/gallium/drivers/freedreno/adreno_common.xml.h b/src/gallium/drivers/freedreno/adreno_common.xml.h
index 065f127..9510d8d 100644
--- a/src/gallium/drivers/freedreno/adreno_common.xml.h
+++ b/src/gallium/drivers/freedreno/adreno_common.xml.h
@@ -13,8 +13,8 @@ The rules-ng-ng source files this header was generated from are:
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a2xx.xml ( 32901 bytes, from 2014-06-02 15:21:30)
- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_common.xml ( 10551 bytes, from 2014-11-13 22:44:30)
- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_pm4.xml ( 15085 bytes, from 2014-12-20 21:49:41)
-- /home/robclark/src/freedreno/envytools/rnndb/adreno/a3xx.xml ( 64344 bytes, from 2014-12-12 20:22:26)
-- /home/robclark/src/freedreno/envytools/rnndb/adreno/a4xx.xml ( 51270 bytes, from 2015-01-18 23:05:48)
+- /home/robclark/src/freedreno/envytools/rnndb/adreno/a3xx.xml ( 64848 bytes, from 2015-02-20 18:21:24)
+- /home/robclark/src/freedreno/envytools/rnndb/adreno/a4xx.xml ( 51566 bytes, from 2015-02-21 18:31:59)
Copyright (C) 2013-2014 by the following authors:
- Rob Clark <robdclark at gmail.com> (robclark)
diff --git a/src/gallium/drivers/freedreno/adreno_pm4.xml.h b/src/gallium/drivers/freedreno/adreno_pm4.xml.h
index aacc024..f1c22b8 100644
--- a/src/gallium/drivers/freedreno/adreno_pm4.xml.h
+++ b/src/gallium/drivers/freedreno/adreno_pm4.xml.h
@@ -13,8 +13,8 @@ The rules-ng-ng source files this header was generated from are:
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a2xx.xml ( 32901 bytes, from 2014-06-02 15:21:30)
- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_common.xml ( 10551 bytes, from 2014-11-13 22:44:30)
- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_pm4.xml ( 15085 bytes, from 2014-12-20 21:49:41)
-- /home/robclark/src/freedreno/envytools/rnndb/adreno/a3xx.xml ( 64344 bytes, from 2014-12-12 20:22:26)
-- /home/robclark/src/freedreno/envytools/rnndb/adreno/a4xx.xml ( 51270 bytes, from 2015-01-18 23:05:48)
+- /home/robclark/src/freedreno/envytools/rnndb/adreno/a3xx.xml ( 64848 bytes, from 2015-02-20 18:21:24)
+- /home/robclark/src/freedreno/envytools/rnndb/adreno/a4xx.xml ( 51566 bytes, from 2015-02-21 18:31:59)
Copyright (C) 2013-2014 by the following authors:
- Rob Clark <robdclark at gmail.com> (robclark)
commit 20ea65beb3ecb45419a45528dc3b7e8bd20bd0e6
Author: Rob Clark <robclark at freedesktop.org>
Date: Sat Feb 21 13:39:06 2015 -0500
freedreno/a4xx: bit of cleanup
Signed-off-by: Rob Clark <robclark at freedesktop.org>
(cherry picked from commit bdf023482a6fd07adef090fb66a4aaaac22810fc)
diff --git a/src/gallium/drivers/freedreno/a3xx/fd3_program.c b/src/gallium/drivers/freedreno/a3xx/fd3_program.c
index db72943..b6c448e 100644
--- a/src/gallium/drivers/freedreno/a3xx/fd3_program.c
+++ b/src/gallium/drivers/freedreno/a3xx/fd3_program.c
@@ -365,7 +365,10 @@ fd3_program_emit(struct fd_ringbuffer *ring, struct fd3_emit *emit)
COND(vp->writes_psize, A3XX_VPC_ATTR_PSIZE));
OUT_RING(ring, 0x00000000);
} else {
- uint32_t vinterp[4] = {0}, flatshade[2] = {0};
+ uint32_t vinterp[4], flatshade[2];
+
+ memset(vinterp, 0, sizeof(vinterp));
+ memset(flatshade, 0, sizeof(flatshade));
/* figure out VARYING_INTERP / FLAT_SHAD register values: */
for (j = -1; (j = ir3_next_varying(fp, j)) < (int)fp->inputs_count; ) {
diff --git a/src/gallium/drivers/freedreno/a4xx/fd4_emit.c b/src/gallium/drivers/freedreno/a4xx/fd4_emit.c
index 037f455..1d098f2 100644
--- a/src/gallium/drivers/freedreno/a4xx/fd4_emit.c
+++ b/src/gallium/drivers/freedreno/a4xx/fd4_emit.c
@@ -425,13 +425,9 @@ fd4_emit_state(struct fd_context *ctx, struct fd_ringbuffer *ring,
OUT_PKT0(ring, REG_A4XX_GRAS_SU_POLY_OFFSET_SCALE, 2);
OUT_RING(ring, rasterizer->gras_su_poly_offset_scale);
OUT_RING(ring, rasterizer->gras_su_poly_offset_offset);
- }
- if (dirty & (FD_DIRTY_RASTERIZER | FD_DIRTY_PROG)) {
- uint32_t val = fd4_rasterizer_stateobj(ctx->rasterizer)
- ->gras_cl_clip_cntl;
OUT_PKT0(ring, REG_A4XX_GRAS_CL_CLIP_CNTL, 1);
- OUT_RING(ring, val);
+ OUT_RING(ring, rasterizer->gras_cl_clip_cntl);
}
/* NOTE: since primitive_restart is not actually part of any
diff --git a/src/gallium/drivers/freedreno/a4xx/fd4_gmem.c b/src/gallium/drivers/freedreno/a4xx/fd4_gmem.c
index f4ab910..c52fa99 100644
--- a/src/gallium/drivers/freedreno/a4xx/fd4_gmem.c
+++ b/src/gallium/drivers/freedreno/a4xx/fd4_gmem.c
@@ -436,13 +436,6 @@ fd4_emit_sysmem_prep(struct fd_context *ctx)
{
struct pipe_framebuffer_state *pfb = &ctx->framebuffer;
struct fd_ringbuffer *ring = ctx->ring;
- uint32_t pitch = 0;
-
- if (pfb->cbufs[0]) {
- struct pipe_surface *psurf = pfb->cbufs[0];
- unsigned lvl = psurf->u.tex.level;
- pitch = fd_resource(psurf->texture)->slices[lvl].pitch;
- }
fd4_emit_restore(ctx);
diff --git a/src/gallium/drivers/freedreno/a4xx/fd4_program.c b/src/gallium/drivers/freedreno/a4xx/fd4_program.c
index cbfd8b2..776e4a1 100644
--- a/src/gallium/drivers/freedreno/a4xx/fd4_program.c
+++ b/src/gallium/drivers/freedreno/a4xx/fd4_program.c
@@ -420,8 +420,28 @@ fd4_program_emit(struct fd_ringbuffer *ring, struct fd4_emit *emit)
COND(s[VS].v->writes_psize, A4XX_VPC_ATTR_PSIZE));
OUT_RING(ring, 0x00000000);
} else {
- uint32_t vinterp[8] = {0}, flatshade[2] = {0};
+ uint32_t vinterp[8], flatshade[2];
+ memset(vinterp, 0, sizeof(vinterp));
+ memset(flatshade, 0, sizeof(flatshade));
+
+ /* TODO: looks like we need to do int varyings in the frag
+ * shader on a4xx (no flatshad reg?):
+ *
+ * (sy)(ss)nop
+ * (sy)ldlv.u32 r0.x,l[r0.x], 1
+ * ldlv.u32 r0.y,l[r0.x+1], 1
+ * (ss)bary.f (ei)r63.x, 0, r0.x
+ * (ss)(rpt1)cov.s32f16 hr0.x, (r)r0.x
+ * (rpt5)nop
+ * sam (f16)(xyzw)hr0.x, hr0.x, s#0, t#0
+ *
+ * for now, don't set FLAT on vinterp[], since that
+ * at least works well enough for pure float impl (ie.
+ * pre glsl130).. we'll have to do a bit more work to
+ * handle this properly:
+ */
+#if 0
/* figure out VARYING_INTERP / FLAT_SHAD register values: */
for (j = -1; (j = ir3_next_varying(s[FS].v, j)) < (int)s[FS].v->inputs_count; ) {
uint32_t interp = s[FS].v->inputs[j].interpolate;
@@ -443,25 +463,7 @@ fd4_program_emit(struct fd_ringbuffer *ring, struct fd4_emit *emit)
}
}
}
-
- /* HACK: looks like we need to do int varyings in the frag
- * shader on a4xx (no flatshad reg?):
- *
- * (sy)(ss)nop
- * (sy)ldlv.u32 r0.x,l[r0.x], 1
- * ldlv.u32 r0.y,l[r0.x+1], 1
- * (ss)bary.f (ei)r63.x, 0, r0.x
- * (ss)(rpt1)cov.s32f16 hr0.x, (r)r0.x
- * (rpt5)nop
- * sam (f16)(xyzw)hr0.x, hr0.x, s#0, t#0
- *
- * for now, don't set FLAT on vinterp[], since that
- * at least works well enough for pure float impl (ie.
- * pre glsl130).. we'll have to do a bit more work to
- * handle this properly:
- */
- for (i = 0; i < ARRAY_SIZE(vinterp); i++)
- vinterp[i] = 0;
+#endif
OUT_PKT0(ring, REG_A4XX_VPC_ATTR, 2);
OUT_RING(ring, A4XX_VPC_ATTR_TOTALATTR(s[FS].v->total_in) |
commit 38777e1345f2471f5889b1f145539e3d5d7a59c7
Author: Rob Clark <robclark at freedesktop.org>
Date: Tue Feb 3 15:52:53 2015 -0500
freedreno/a2xx: fix increment in assert
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=88883
Signed-off-by: Rob Clark <robclark at freedesktop.org>
(cherry picked from commit 68552266535747bad1eff34d856c43158398b9bf)
diff --git a/src/gallium/drivers/freedreno/a2xx/ir-a2xx.c b/src/gallium/drivers/freedreno/a2xx/ir-a2xx.c
index cff5a27..2b62b3a 100644
--- a/src/gallium/drivers/freedreno/a2xx/ir-a2xx.c
+++ b/src/gallium/drivers/freedreno/a2xx/ir-a2xx.c
@@ -439,7 +439,8 @@ static int instr_emit_alu(struct ir2_instruction *instr, uint32_t *dwords,
assert(sdst_reg->flags == dst_reg->flags);
if (src3_reg) {
- assert(src3_reg == instr->regs[reg++]);
+ assert(src3_reg == instr->regs[reg]);
+ reg++;
} else {
src3_reg = instr->regs[reg++];
}
commit 4de2f250830ec119d13153da4651a9c06079555e
Author: Iago Toral Quiroga <itoral at igalia.com>
Date: Tue Mar 10 11:36:43 2015 +0100
i965: Fix out-of-bounds accesses into pull_constant_loc array
The piglit test glsl-fs-uniform-array-loop-unroll.shader_test was designed
to do an out of bounds access into an uniform array to make sure that we
handle that situation gracefully inside the driver, however, as Ken describes
in bug 79202, Valgrind reports that this is leading to an out-of-bounds access
in fs_visitor::demote_pull_constants().
Before accessing the pull_constant_loc array we should make sure that
the uniform we are trying to access is valid.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=79202
Reviewed-by: Matt Turner <mattst88 at gmail.com>
(cherry picked from commit 6ac1bc90c4a7a6f32901a9782e14b090f6fe5270)
Nominated-by: Matt Turner <mattst88 at gmail.com>
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp
index 97568c1..1bbd84c 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
@@ -2286,8 +2286,13 @@ fs_visitor::demote_pull_constants()
if (inst->src[i].file != UNIFORM)
continue;
- int pull_index = pull_constant_loc[inst->src[i].reg +
- inst->src[i].reg_offset];
+ int pull_index;
+ unsigned location = inst->src[i].reg + inst->src[i].reg_offset;
+ if (location >= uniforms) /* Out of bounds access */
+ pull_index = -1;
+ else
+ pull_index = pull_constant_loc[location];
+
if (pull_index == -1)
continue;
commit fbd06fe65c0fe57f0dea96c87d9f0eb5abc72bb7
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Thu Feb 26 17:45:49 2015 -0800
i965/fs: Don't issue FB writes for bound but unwritten color targets.
We used to loop over all color attachments, and emit FB writes for each
one, even if the shader didn't write to a corresponding output variable.
Those color attachments would be filled with garbage (undefined values).
Football Manager binds a framebuffer with 4 color attachments, but draws
to it using a shader that only writes to gl_FragData[0..2]. This meant
that color attachment 3 would be filled with garbage, resulting in
rendering artifacts. Now we skip writing to it, fixing rendering.
Writes to gl_FragColor initialize outputs[0..nr_color_regions-1] to
GRFs, while writes to gl_FragData[i] initialize outputs[i].
Thanks to Jason Ekstrand for tracking this down.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=86747
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand at intel.com>
Cc: mesa-stable at lists.freedesktop.org
(cherry picked from commit e95969cd9548033250ba12f2adf11740319b41e7)
Conflicts:
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
index 0e4b814..8048892 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
@@ -3520,7 +3520,7 @@ fs_visitor::emit_fb_writes()
do_dual_src = false;
}
- fs_inst *inst;
+ fs_inst *inst = NULL;
if (do_dual_src) {
this->current_annotation = ralloc_asprintf(this->mem_ctx,
"FB dual-source write");
@@ -3528,8 +3528,12 @@ fs_visitor::emit_fb_writes()
reg_undef, 4);
inst->target = 0;
prog_data->dual_src_blend = true;
- } else if (key->nr_color_regions > 0) {
+ } else {
for (int target = 0; target < key->nr_color_regions; target++) {
+ /* Skip over outputs that weren't written. */
+ if (this->outputs[target].file == BAD_FILE)
+ continue;
+
this->current_annotation = ralloc_asprintf(this->mem_ctx,
"FB write target %d",
target);
@@ -3542,7 +3546,9 @@ fs_visitor::emit_fb_writes()
this->output_components[target]);
inst->target = target;
}
- } else {
+ }
+
+ if (inst == NULL) {
/* Even if there's no color buffers enabled, we still need to send
* alpha out the pipeline to our null renderbuffer to support
* alpha-testing, alpha-to-coverage, and so on.
commit c232d765affc06cc6e81ddee07656919e7f17aa5
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Thu Feb 26 22:55:54 2015 -0800
i965/fs: Make emit_shader_time_end() insert before EOT.
Previously, we emitted the shader-time epilogue from emit_fb_writes(),
during the middle of looping through color regions (or emit_urb_writes
for the VS). This is duplicated several times and rather awkward.
I need to fix a bug in our FB write handling, and it will be a lot
easier if we move emit_shader_time_end() out of there.
Now, we simply emit FB writes/URB writes, and subsequently have
emit_shader_time_end() insert instructions before the final SEND with
EOT. Not only is this simpler, it's actually a slight improvement:
we now include the MOVs to set up the final FB write payload in our
shader-time measurements.
Note that INTEL_DEBUG=shader_time only exists on Gen7+, and uses
send-from-GRF. (In the past, we might have hit trouble where both
attempt to use MRFs for messages; that's not a problem now.)
v2: Rebase on v3 of the previous patch and other shader_time fixes.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen at intel.com> [v1]
Acked-by: Matt Turner <mattst88 at gmail.com>
Cc: mesa-stable at lists.freedesktop.org
(cherry picked from commit 4ebeb71573ad44f7657810dc5dd2c9030e3e63db)
Conflicts:
src/mesa/drivers/dri/i965/brw_fs.cpp
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp
index a2bfaf2..97568c1 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
@@ -760,19 +760,24 @@ fs_visitor::emit_shader_time_end()
unreachable("fs_visitor::emit_shader_time_end missing code");
}
+ /* Insert our code just before the final SEND with EOT. */
+ exec_node *end = this->instructions.get_tail();
+ assert(end && ((fs_inst *) end)->eot);
+
fs_inst *tm_read;
fs_reg shader_end_time = get_timestamp(&tm_read);
- emit(tm_read);
+ end->insert_before(tm_read);
/* Check that there weren't any timestamp reset events (assuming these
* were the only two timestamp reads that happened).
*/
fs_reg reset = shader_end_time;
reset.set_smear(2);
- fs_inst *test = emit(AND(reg_null_d, reset, fs_reg(1u)));
+ fs_inst *test = AND(reg_null_d, reset, fs_reg(1u));
test->conditional_mod = BRW_CONDITIONAL_Z;
test->force_writemask_all = true;
- emit(IF(BRW_PREDICATE_NORMAL));
+ end->insert_before(test);
+ end->insert_before(IF(BRW_PREDICATE_NORMAL));
fs_reg start = shader_start_time;
start.negate = true;
@@ -780,7 +785,7 @@ fs_visitor::emit_shader_time_end()
diff.set_smear(0);
fs_inst *add = ADD(diff, start, shader_end_time);
add->force_writemask_all = true;
- emit(add);
+ end->insert_before(add);
/* If there were no instructions between the two timestamp gets, the diff
* is 2 cycles. Remove that overhead, so I can forget about that when
@@ -788,13 +793,13 @@ fs_visitor::emit_shader_time_end()
*/
add = ADD(diff, diff, fs_reg(-2u));
add->force_writemask_all = true;
- emit(add);
+ end->insert_before(add);
- emit(SHADER_TIME_ADD(type, diff));
- emit(SHADER_TIME_ADD(written_type, fs_reg(1u)));
- emit(BRW_OPCODE_ELSE);
- emit(SHADER_TIME_ADD(reset_type, fs_reg(1u)));
- emit(BRW_OPCODE_ENDIF);
+ end->insert_before(SHADER_TIME_ADD(type, diff));
+ end->insert_before(SHADER_TIME_ADD(written_type, fs_reg(1u)));
+ end->insert_before(new(mem_ctx) fs_inst(BRW_OPCODE_ELSE, dispatch_width));
+ end->insert_before(SHADER_TIME_ADD(reset_type, fs_reg(1u)));
+ end->insert_before(new(mem_ctx) fs_inst(BRW_OPCODE_ENDIF, dispatch_width));
}
fs_inst *
@@ -3823,6 +3828,9 @@ fs_visitor::run_fs()
emit_fb_writes();
+ if (INTEL_DEBUG & DEBUG_SHADER_TIME)
+ emit_shader_time_end();
+
optimize();
assign_curb_setup();
diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
index d8e10df..0e4b814 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
@@ -3522,9 +3522,6 @@ fs_visitor::emit_fb_writes()
fs_inst *inst;
if (do_dual_src) {
- if (INTEL_DEBUG & DEBUG_SHADER_TIME)
- emit_shader_time_end();
-
this->current_annotation = ralloc_asprintf(this->mem_ctx,
"FB dual-source write");
inst = emit_single_fb_write(this->outputs[0], this->dual_src_output,
@@ -3540,19 +3537,12 @@ fs_visitor::emit_fb_writes()
if (brw->gen >= 6 && key->replicate_alpha && target != 0)
src0_alpha = offset(outputs[0], 3);
- if (target == key->nr_color_regions - 1 &&
- (INTEL_DEBUG & DEBUG_SHADER_TIME))
- emit_shader_time_end();
-
inst = emit_single_fb_write(this->outputs[target], reg_undef,
src0_alpha,
this->output_components[target]);
inst->target = target;
}
} else {
- if (INTEL_DEBUG & DEBUG_SHADER_TIME)
- emit_shader_time_end();
-
/* Even if there's no color buffers enabled, we still need to send
* alpha out the pipeline to our null renderbuffer to support
* alpha-testing, alpha-to-coverage, and so on.
@@ -3763,9 +3753,6 @@ fs_visitor::emit_urb_writes()
if (length == 8 || last)
flush = true;
if (flush) {
- if (last && (INTEL_DEBUG & DEBUG_SHADER_TIME))
- emit_shader_time_end();
-
fs_reg *payload_sources = ralloc_array(mem_ctx, fs_reg, length + 1);
fs_reg payload = fs_reg(GRF, virtual_grf_alloc(length + 1),
BRW_REGISTER_TYPE_F);
commit 0d625e1ae7a112fee1e5068b7817e07ee1a253e1
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Thu Feb 26 23:51:27 2015 -0800
i965/fs: Make get_timestamp() pass back the MOV rather than emitting it.
This makes another part of the INTEL_DEBUG=shader_time code emittable
at arbitrary locations, rather than just at the end of the instruction
stream.
v2: Don't lose smear! Caught by Topi Pohjolainen.
v3: Don't set smear on the destination of the MOV. Thanks Topi!
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Matt Turner <mattst88 at gmail.com>
Cc: mesa-stable at lists.freedesktop.org
(cherry picked from commit e43af8d09f919d02b5ac0810c1c0f1783cbef6ef)
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp
index 347bdb9..a2bfaf2 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
@@ -678,8 +678,14 @@ fs_visitor::type_size(const struct glsl_type *type)
return 0;
}
+/**
+ * Create a MOV to read the timestamp register.
+ *
+ * The caller is responsible for emitting the MOV. The return value is
+ * the destination of the MOV, with extra parameters set.
+ */
fs_reg
-fs_visitor::get_timestamp()
+fs_visitor::get_timestamp(fs_inst **out_mov)
{
assert(brw->gen >= 7);
@@ -690,7 +696,7 @@ fs_visitor::get_timestamp()
fs_reg dst = fs_reg(GRF, virtual_grf_alloc(1), BRW_REGISTER_TYPE_UD, 4);
- fs_inst *mov = emit(MOV(dst, ts));
+ fs_inst *mov = MOV(dst, ts);
/* We want to read the 3 fields we care about even if it's not enabled in
* the dispatch.
*/
@@ -708,6 +714,7 @@ fs_visitor::get_timestamp()
*/
dst.set_smear(0);
+ *out_mov = mov;
return dst;
}
@@ -715,7 +722,9 @@ void
fs_visitor::emit_shader_time_begin()
{
current_annotation = "shader time start";
- shader_start_time = get_timestamp();
+ fs_inst *mov;
+ shader_start_time = get_timestamp(&mov);
+ emit(mov);
}
void
@@ -751,7 +760,9 @@ fs_visitor::emit_shader_time_end()
unreachable("fs_visitor::emit_shader_time_end missing code");
}
- fs_reg shader_end_time = get_timestamp();
+ fs_inst *tm_read;
+ fs_reg shader_end_time = get_timestamp(&tm_read);
+ emit(tm_read);
/* Check that there weren't any timestamp reset events (assuming these
* were the only two timestamp reads that happened).
diff --git a/src/mesa/drivers/dri/i965/brw_fs.h b/src/mesa/drivers/dri/i965/brw_fs.h
index fcc8a5a..bf8bb0b 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.h
+++ b/src/mesa/drivers/dri/i965/brw_fs.h
@@ -622,7 +622,7 @@ public:
void resolve_ud_negate(fs_reg *reg);
void resolve_bool_comparison(ir_rvalue *rvalue, fs_reg *reg);
- fs_reg get_timestamp();
+ fs_reg get_timestamp(fs_inst **out_mov);
struct brw_reg interp_reg(int location, int channel);
void setup_uniform_values(ir_variable *ir);
commit e9e182658dbb329e6a8e5b54794d173a878c9151
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Thu Feb 26 22:49:04 2015 -0800
i965/fs: Make emit_shader_time_write return rather than emit.
Instead of emit_shader_time_write, we now do emit(SHADER_TIME_ADD(...)).
The advantage is that we can also insert a shader time write at an
arbitrary location in the instruction stream, rather than being
restricted to emitting at the end.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
Reviewed-by: Matt Turner <mattst88 at gmail.com>
Cc: mesa-stable at lists.freedesktop.org
(cherry picked from commit bea854c7f33cc10b8292f931f114afc4f88a8dd4)
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp
index 5caea5a..347bdb9 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
@@ -779,16 +779,15 @@ fs_visitor::emit_shader_time_end()
add->force_writemask_all = true;
emit(add);
- emit_shader_time_write(type, diff);
- emit_shader_time_write(written_type, fs_reg(1u));
+ emit(SHADER_TIME_ADD(type, diff));
+ emit(SHADER_TIME_ADD(written_type, fs_reg(1u)));
emit(BRW_OPCODE_ELSE);
- emit_shader_time_write(reset_type, fs_reg(1u));
+ emit(SHADER_TIME_ADD(reset_type, fs_reg(1u)));
emit(BRW_OPCODE_ENDIF);
}
-void
-fs_visitor::emit_shader_time_write(enum shader_time_shader_type type,
- fs_reg value)
+fs_inst *
+fs_visitor::SHADER_TIME_ADD(enum shader_time_shader_type type, fs_reg value)
{
int shader_time_index =
brw_get_shader_time_index(brw, shader_prog, prog, type);
@@ -800,8 +799,8 @@ fs_visitor::emit_shader_time_write(enum shader_time_shader_type type,
else
payload = vgrf(glsl_type::uint_type);
- emit(new(mem_ctx) fs_inst(SHADER_OPCODE_SHADER_TIME_ADD,
- fs_reg(), payload, offset, value));
+ return new(mem_ctx) fs_inst(SHADER_OPCODE_SHADER_TIME_ADD,
+ fs_reg(), payload, offset, value);
}
void
diff --git a/src/mesa/drivers/dri/i965/brw_fs.h b/src/mesa/drivers/dri/i965/brw_fs.h
index b95e2c0..fcc8a5a 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.h
+++ b/src/mesa/drivers/dri/i965/brw_fs.h
@@ -601,8 +601,7 @@ public:
void emit_shader_time_begin();
void emit_shader_time_end();
- void emit_shader_time_write(enum shader_time_shader_type type,
- fs_reg value);
+ fs_inst *SHADER_TIME_ADD(enum shader_time_shader_type type, fs_reg value);
void emit_untyped_atomic(unsigned atomic_op, unsigned surf_index,
fs_reg dst, fs_reg offset, fs_reg src0,
commit 82ef4994ddc0222241b101bcda8e729e729d93b0
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Sun Mar 8 00:13:41 2015 -0800
i965/fs: Set smear on shader_time diff register.
The ADD(diff, diff, fs_reg(-2u)) instruction reads diff, which is a
width 1 register. We need to read it as <0,1,0> with a subreg of 0,
which is what smear accomplishes.
Fixes assertion:
brw_eu_emit.c:285: validate_reg: Assertion `hstride == 0' failed.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=86974
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Matt Turner <mattst88 at gmail.com>
Cc: mesa-stable at lists.freedesktop.org
(cherry picked from commit f1adc45dbe649cdd4538fb96f6d2a27328bbfba1)
Conflicts:
src/mesa/drivers/dri/i965/brw_fs.cpp
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp
index 67719d3..5caea5a 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
@@ -766,6 +766,7 @@ fs_visitor::emit_shader_time_end()
fs_reg start = shader_start_time;
start.negate = true;
fs_reg diff = fs_reg(GRF, virtual_grf_alloc(1), BRW_REGISTER_TYPE_UD, 1);
+ diff.set_smear(0);
fs_inst *add = ADD(diff, start, shader_end_time);
add->force_writemask_all = true;
emit(add);
commit c3fc8b2870668fe0313fd35b2789306dbf3b9594
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Sat Mar 7 23:01:07 2015 -0800
i965/fs: Set force_writemask_all on shader_time instructions.
These computations don't have anything to do with the currently
executing channels, so they should use force_writemask_all.
This fixes assert failures.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=86974
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Matt Turner <mattst88 at gmail.com>
Cc: mesa-stable at lists.freedesktop.org
(cherry picked from commit ef9cc7d0c176669c03130abf576f2b700be39514)
Conflicts:
src/mesa/drivers/dri/i965/brw_fs.cpp
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp
index 1fc8cca..67719d3 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
@@ -760,18 +760,23 @@ fs_visitor::emit_shader_time_end()
reset.set_smear(2);
fs_inst *test = emit(AND(reg_null_d, reset, fs_reg(1u)));
test->conditional_mod = BRW_CONDITIONAL_Z;
+ test->force_writemask_all = true;
emit(IF(BRW_PREDICATE_NORMAL));
fs_reg start = shader_start_time;
start.negate = true;
fs_reg diff = fs_reg(GRF, virtual_grf_alloc(1), BRW_REGISTER_TYPE_UD, 1);
- emit(ADD(diff, start, shader_end_time));
+ fs_inst *add = ADD(diff, start, shader_end_time);
+ add->force_writemask_all = true;
+ emit(add);
/* If there were no instructions between the two timestamp gets, the diff
* is 2 cycles. Remove that overhead, so I can forget about that when
* trying to determine the time taken for single instructions.
*/
- emit(ADD(diff, diff, fs_reg(-2u)));
+ add = ADD(diff, diff, fs_reg(-2u));
+ add->force_writemask_all = true;
+ emit(add);
emit_shader_time_write(type, diff);
emit_shader_time_write(written_type, fs_reg(1u));
commit aea510a95fab2e3c2ddeca2a3b3aae349d1ec3dc
Author: Marek Olšák <marek.olsak at amd.com>
Date: Mon Mar 9 21:20:03 2015 +0100
r300g: fix sRGB->sRGB blits
Cc: 10.5 10.4 <mesa-stable at lists.freedesktop.org>
(cherry picked from commit c939231e7223510408a446400ad23b8b5ce2922e)
diff --git a/src/gallium/drivers/r300/r300_blit.c b/src/gallium/drivers/r300/r300_blit.c
index 4e7efc5..baf05ce 100644
--- a/src/gallium/drivers/r300/r300_blit.c
+++ b/src/gallium/drivers/r300/r300_blit.c
@@ -803,6 +803,15 @@ static void r300_blit(struct pipe_context *pipe,
(struct pipe_framebuffer_state*)r300->fb_state.state;
struct pipe_blit_info info = *blit;
+ /* The driver supports sRGB textures but not framebuffers. Blitting
+ * from sRGB to sRGB should be the same as blitting from linear
+ * to linear, so use that, This avoids incorrect linearization.
+ */
+ if (util_format_is_srgb(info.src.format)) {
+ info.src.format = util_format_linear(info.src.format);
+ info.dst.format = util_format_linear(info.dst.format);
+ }
+
/* MSAA resolve. */
if (info.src.resource->nr_samples > 1 &&
!util_format_is_depth_or_stencil(info.src.resource->format)) {
commit c898d5c931ff9a19da93f2cc700bb92e02f60cfa
Author: Marek Olšák <marek.olsak at amd.com>
Date: Tue Feb 24 23:15:59 2015 +0100
r300g: fix a crash when resolving into an sRGB texture
Cc: 10.5 10.4 <mesa-stable at lists.freedesktop.org>
(cherry picked from commit 9953586af2254f83a610d4cd284f52f37fa18b98)
diff --git a/src/gallium/drivers/r300/r300_texture.c b/src/gallium/drivers/r300/r300_texture.c
index e85a818..6c01c0d 100644
--- a/src/gallium/drivers/r300/r300_texture.c
+++ b/src/gallium/drivers/r300/r300_texture.c
@@ -938,14 +938,16 @@ static void r300_texture_setup_fb_state(struct r300_surface *surf)
surf->pitch_zmask = tex->tex.zmask_stride_in_pixels[level];
surf->pitch_hiz = tex->tex.hiz_stride_in_pixels[level];
} else {
+ enum pipe_format format = util_format_linear(surf->base.format);
+
surf->pitch =
stride |
- r300_translate_colorformat(surf->base.format) |
+ r300_translate_colorformat(format) |
R300_COLOR_TILE(tex->tex.macrotile[level]) |
R300_COLOR_MICROTILE(tex->tex.microtile);
- surf->format = r300_translate_out_fmt(surf->base.format);
+ surf->format = r300_translate_out_fmt(format);
surf->colormask_swizzle =
- r300_translate_colormask_swizzle(surf->base.format);
+ r300_translate_colormask_swizzle(format);
surf->pitch_cmask = tex->tex.cmask_stride_in_pixels;
}
}
commit 32a7f119dc0e65574adfc56600d68dc79ec0c840
Author: Marek Olšák <marek.olsak at amd.com>
Date: Mon Mar 9 20:04:04 2015 +0100
r300g: fix RGTC1 and LATC1 SNORM formats
Cc: 10.5 10.4 <mesa-stable at lists.freedesktop.org>
(cherry picked from commit 74a757f92f7377f59c0feb7f84c7518f9a167631)
diff --git a/src/gallium/drivers/r300/r300_fs.c b/src/gallium/drivers/r300/r300_fs.c
index c00f55f..79eee73 100644
--- a/src/gallium/drivers/r300/r300_fs.c
+++ b/src/gallium/drivers/r300/r300_fs.c
@@ -170,24 +170,10 @@ static void get_external_state(
}
state->unit[i].non_normalized_coords = !s->state.normalized_coords;
- state->unit[i].convert_unorm_to_snorm =
- v->base.format == PIPE_FORMAT_RGTC1_SNORM ||
- v->base.format == PIPE_FORMAT_LATC1_SNORM;
+ state->unit[i].convert_unorm_to_snorm = 0;
/* Pass texture swizzling to the compiler, some lowering passes need it. */
- if (v->base.format == PIPE_FORMAT_RGTC1_SNORM ||
- v->base.format == PIPE_FORMAT_LATC1_SNORM) {
- unsigned char swizzle[4];
-
- util_format_compose_swizzles(
- util_format_description(v->base.format)->swizzle,
- v->swizzle,
- swizzle);
-
- state->unit[i].texture_swizzle =
- RC_MAKE_SWIZZLE(swizzle[0], swizzle[1],
- swizzle[2], swizzle[3]);
- } else if (state->unit[i].compare_mode_enabled) {
+ if (state->unit[i].compare_mode_enabled) {
state->unit[i].texture_swizzle =
RC_MAKE_SWIZZLE(v->swizzle[0], v->swizzle[1],
v->swizzle[2], v->swizzle[3]);
diff --git a/src/gallium/drivers/r300/r300_texture.c b/src/gallium/drivers/r300/r300_texture.c
index 340b8fc..e85a818 100644
--- a/src/gallium/drivers/r300/r300_texture.c
+++ b/src/gallium/drivers/r300/r300_texture.c
@@ -169,22 +169,21 @@ uint32_t r300_translate_texformat(enum pipe_format format,
/* Add swizzling. */
/* The RGTC1_SNORM and LATC1_SNORM swizzle is done in the shader. */
- if (format != PIPE_FORMAT_RGTC1_SNORM &&
+ if (util_format_is_compressed(format) &&
+ dxtc_swizzle &&
+ format != PIPE_FORMAT_RGTC2_UNORM &&
+ format != PIPE_FORMAT_RGTC2_SNORM &&
+ format != PIPE_FORMAT_LATC2_UNORM &&
+ format != PIPE_FORMAT_LATC2_SNORM &&
+ format != PIPE_FORMAT_RGTC1_UNORM &&
+ format != PIPE_FORMAT_RGTC1_SNORM &&
+ format != PIPE_FORMAT_LATC1_UNORM &&
format != PIPE_FORMAT_LATC1_SNORM) {
- if (util_format_is_compressed(format) &&
- dxtc_swizzle &&
- format != PIPE_FORMAT_RGTC2_UNORM &&
- format != PIPE_FORMAT_RGTC2_SNORM &&
- format != PIPE_FORMAT_LATC2_UNORM &&
- format != PIPE_FORMAT_LATC2_SNORM &&
- format != PIPE_FORMAT_RGTC1_UNORM &&
- format != PIPE_FORMAT_LATC1_UNORM) {
- result |= r300_get_swizzle_combined(desc->swizzle, swizzle_view,
- TRUE);
- } else {
- result |= r300_get_swizzle_combined(desc->swizzle, swizzle_view,
- FALSE);
- }
+ result |= r300_get_swizzle_combined(desc->swizzle, swizzle_view,
+ TRUE);
+ } else {
+ result |= r300_get_swizzle_combined(desc->swizzle, swizzle_view,
+ FALSE);
}
/* S3TC formats. */
@@ -215,6 +214,7 @@ uint32_t r300_translate_texformat(enum pipe_format format,
switch (format) {
case PIPE_FORMAT_RGTC1_SNORM:
case PIPE_FORMAT_LATC1_SNORM:
+ result |= sign_bit[0];
case PIPE_FORMAT_LATC1_UNORM:
case PIPE_FORMAT_RGTC1_UNORM:
return R500_TX_FORMAT_ATI1N | result;
commit 578ac079c77abbe9c972bb95ddb57abea7eeec99
Author: Stefan Dösinger <stefandoesinger at gmx.at>
Date: Mon Mar 9 16:15:13 2015 +0100
r300g: Fix the ATI1N swizzle (RGTC1 and LATC1)
This fixes the GL_COMPRESSED_RED_RGTC1 part of piglit's rgtc-teximage-01
test as well as the precision part of Wine's 3dc format test (fd.o bug
89156).
The Z component seems to contain a lower precision version of the
result, probably a temporary value from the decompression computation.
The Y and W component contain different data that depends on the input
values as well, but I could not make sense of them (Not that I tried
very hard).
GL_COMPRESSED_SIGNED_RED_RGTC1 still seems to have precision problems in
piglit, and both formats are affected by a compiler bug if they're
sampled by the shader with a swizzle other than .xyzw. Wine uses .xxxx,
which returns random garbage.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89156
Signed-off-by: Marek Olšák <marek.olsak at amd.com>
Cc: 10.5 10.4 <mesa-stable at lists.freedesktop.org>
(cherry picked from commit f710b99071fe4e3c2ee88cdcb6bb5c10298e014e)
diff --git a/src/gallium/drivers/r300/r300_texture.c b/src/gallium/drivers/r300/r300_texture.c
index ffe8c00..340b8fc 100644
--- a/src/gallium/drivers/r300/r300_texture.c
+++ b/src/gallium/drivers/r300/r300_texture.c
@@ -176,7 +176,9 @@ uint32_t r300_translate_texformat(enum pipe_format format,
format != PIPE_FORMAT_RGTC2_UNORM &&
format != PIPE_FORMAT_RGTC2_SNORM &&
format != PIPE_FORMAT_LATC2_UNORM &&
- format != PIPE_FORMAT_LATC2_SNORM) {
+ format != PIPE_FORMAT_LATC2_SNORM &&
+ format != PIPE_FORMAT_RGTC1_UNORM &&
+ format != PIPE_FORMAT_LATC1_UNORM) {
result |= r300_get_swizzle_combined(desc->swizzle, swizzle_view,
TRUE);
} else {
commit 0ea3c150cfc273e66626c8dc0958269c68d9e739
Author: Rob Clark <robclark at freedesktop.org>
Date: Thu Mar 5 15:27:27 2015 -0500
freedreno/ir3: fix silly typo for binning pass shaders
Was resulting in gl_PointSize write being optimized out, causing
particle system type shaders to hang if hw binning enabled.
Fixes neverball, OGLES2ParticleSystem, etc.
Signed-off-by: Rob Clark <robclark at freedesktop.org>
(cherry picked from commit 60096ed906e5ebfdce41024c7af69f03b96dbe82)
diff --git a/src/gallium/drivers/freedreno/ir3/ir3_compiler.c b/src/gallium/drivers/freedreno/ir3/ir3_compiler.c
index cf028bc..707bad5 100644
--- a/src/gallium/drivers/freedreno/ir3/ir3_compiler.c
+++ b/src/gallium/drivers/freedreno/ir3/ir3_compiler.c
@@ -3280,7 +3280,7 @@ ir3_compile_shader(struct ir3_shader_variant *so,
if (key.binning_pass) {
for (i = 0, j = 0; i < so->outputs_count; i++) {
unsigned name = sem2name(so->outputs[i].semantic);
- unsigned idx = sem2name(so->outputs[i].semantic);
+ unsigned idx = sem2idx(so->outputs[i].semantic);
/* throw away everything but first position/psize */
if ((idx == 0) && ((name == TGSI_SEMANTIC_POSITION) ||
commit b542424ab893ecfc3dbff4176d641fc0bacba203
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date: Sat Mar 7 18:25:54 2015 -0500
freedreno/ir3: get the # of miplevels from getinfo
This fixes ARB_texture_query_levels to actually return the desired
value.
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
Reviewed-by: Rob Clark <robclark at freedesktop.org>
Cc: "10.4 10.5" <mesa-stable at lists.freedesktop.org>
(cherry picked from commit cb3eb43ad690a7355429ba8dcd40120646c55b9c)
diff --git a/src/gallium/drivers/freedreno/ir3/ir3_compiler.c b/src/gallium/drivers/freedreno/ir3/ir3_compiler.c
index 7555f5c..cf028bc 100644
--- a/src/gallium/drivers/freedreno/ir3/ir3_compiler.c
+++ b/src/gallium/drivers/freedreno/ir3/ir3_compiler.c
@@ -1592,6 +1592,26 @@ trans_txq(const struct instr_translater *t,
add_dst_reg_wrmask(ctx, instr, dst, 0, dst->WriteMask);
add_src_reg_wrmask(ctx, instr, level, level->SwizzleX, 0x1);
}
+
+ if (dst->WriteMask & TGSI_WRITEMASK_W) {
+ /* The # of levels comes from getinfo.z. We need to add 1 to it, since
+ * the value in TEX_CONST_0 is zero-based.
+ */
+ struct tgsi_dst_register tmp_dst;
+ struct tgsi_src_register *tmp_src;
+
+ tmp_src = get_internal_temp(ctx, &tmp_dst);
+ instr = instr_create(ctx, 5, OPC_GETINFO);
+ instr->cat5.type = get_utype(ctx);
+ instr->cat5.samp = samp->Index;
+ instr->cat5.tex = samp->Index;
+ add_dst_reg_wrmask(ctx, instr, &tmp_dst, 0, TGSI_WRITEMASK_Z);
+
+ instr = instr_create(ctx, 2, OPC_ADD_U);
+ add_dst_reg(ctx, instr, dst, 3);
+ add_src_reg(ctx, instr, tmp_src, src_swiz(tmp_src, 2));
+ ir3_reg_create(instr, 0, IR3_REG_IMMED)->iim_val = 1;
+ }
}
/* DDX/DDY */
commit d8ed6aa4742b37d2fda95fa7e6bea584582569e4
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date: Sat Mar 7 17:41:47 2015 -0500
freedreno/ir3: fix array count returned by TXQ
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
Reviewed-by: Rob Clark <robclark at freedesktop.org>
Cc: "10.4 10.5" <mesa-stable at lists.freedesktop.org>
(cherry picked from commit 8ac957a51c67fc095db9539df6482b9533b1d05c)
diff --git a/src/gallium/drivers/freedreno/ir3/ir3_compiler.c b/src/gallium/drivers/freedreno/ir3/ir3_compiler.c
index 8c88bf7..7555f5c 100644
--- a/src/gallium/drivers/freedreno/ir3/ir3_compiler.c
+++ b/src/gallium/drivers/freedreno/ir3/ir3_compiler.c
@@ -1537,6 +1537,7 @@ trans_txq(const struct instr_translater *t,
struct tgsi_dst_register *dst = &inst->Dst[0].Register;
struct tgsi_src_register *level = &inst->Src[0].Register;
struct tgsi_src_register *samp = &inst->Src[1].Register;
+ const struct target_info *tgt = &tex_targets[inst->Texture.Texture];
struct tex_info tinf;
memset(&tinf, 0, sizeof(tinf));
@@ -1550,8 +1551,47 @@ trans_txq(const struct instr_translater *t,
instr->cat5.tex = samp->Index;
instr->flags |= tinf.flags;
- add_dst_reg_wrmask(ctx, instr, dst, 0, dst->WriteMask);
- add_src_reg_wrmask(ctx, instr, level, level->SwizzleX, 0x1);
+ if (tgt->array && (dst->WriteMask & (1 << tgt->dims))) {
+ /* Array size actually ends up in .w rather than .z. This doesn't
+ * matter for miplevel 0, but for higher mips the value in z is
+ * minified whereas w stays. Also, the value in TEX_CONST_3_DEPTH is
+ * returned, which means that we have to add 1 to it for arrays.
+ */
+ struct tgsi_dst_register tmp_dst;
+ struct tgsi_src_register *tmp_src;
+ type_t type_mov = get_utype(ctx);
+
+ tmp_src = get_internal_temp(ctx, &tmp_dst);
+ add_dst_reg_wrmask(ctx, instr, &tmp_dst, 0,
+ dst->WriteMask | TGSI_WRITEMASK_W);
+ add_src_reg_wrmask(ctx, instr, level, level->SwizzleX, 0x1);
+
+ if (dst->WriteMask & TGSI_WRITEMASK_X) {
+ instr = instr_create(ctx, 1, 0);
+ instr->cat1.src_type = type_mov;
+ instr->cat1.dst_type = type_mov;
+ add_dst_reg(ctx, instr, dst, 0);
+ add_src_reg(ctx, instr, tmp_src, src_swiz(tmp_src, 0));
+ }
+
+ if (tgt->dims == 2) {
+ if (dst->WriteMask & TGSI_WRITEMASK_Y) {
+ instr = instr_create(ctx, 1, 0);
+ instr->cat1.src_type = type_mov;
+ instr->cat1.dst_type = type_mov;
+ add_dst_reg(ctx, instr, dst, 1);
+ add_src_reg(ctx, instr, tmp_src, src_swiz(tmp_src, 1));
+ }
+ }
+
+ instr = instr_create(ctx, 2, OPC_ADD_U);
+ add_dst_reg(ctx, instr, dst, tgt->dims);
+ add_src_reg(ctx, instr, tmp_src, src_swiz(tmp_src, 3));
+ ir3_reg_create(instr, 0, IR3_REG_IMMED)->iim_val = 1;
+ } else {
+ add_dst_reg_wrmask(ctx, instr, dst, 0, dst->WriteMask);
+ add_src_reg_wrmask(ctx, instr, level, level->SwizzleX, 0x1);
+ }
}
/* DDX/DDY */
commit 5b1bd4fc9e442568bacdec3a7e9697a87968158d
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date: Mon Mar 2 21:22:27 2015 -0500
freedreno: move fb state copy after checking for size change
Fixes: 1f3ca56b ("freedreno: use util_copy_framebuffer_state()")
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
Reviewed-by: Rob Clark <robclark at freedesktop.org>
Cc: "10.4 10.5" <mesa-stable at lists.freedesktop.org>
(cherry picked from commit f3dfe6513c26d1ce50b3b0fc830d4d8ff7f6b922)
diff --git a/src/gallium/drivers/freedreno/freedreno_state.c b/src/gallium/drivers/freedreno/freedreno_state.c
index 6293f43..77aa4f2 100644
--- a/src/gallium/drivers/freedreno/freedreno_state.c
+++ b/src/gallium/drivers/freedreno/freedreno_state.c
@@ -123,12 +123,12 @@ fd_set_framebuffer_state(struct pipe_context *pctx,
fd_context_render(pctx);
- util_copy_framebuffer_state(cso, framebuffer);
-
if ((cso->width != framebuffer->width) ||
(cso->height != framebuffer->height))
ctx->needs_rb_fbd = true;
+ util_copy_framebuffer_state(cso, framebuffer);
+
ctx->dirty |= FD_DIRTY_FRAMEBUFFER;
ctx->disabled_scissor.minx = 0;
commit cddbb3a7ba632e525b5c5a57c39e78b1a926c70f
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Thu Mar 5 23:18:36 2015 -0800
glsl: Mark array access when copying to a temporary for the ?: operator.
Piglit's spec/glsl-1.20/compiler/structure-and-array-operations/
array-selection.vert test contains the following code:
gl_Position = (pick_from_a_or_b ? a : b)[i];
where "a" and "b" are uniform vec4[2] variables.
ast_to_hir creates a temporary vec4[2] variable, conditional_tmp, and
generates an if-block to copy one or the other:
(declare (temporary) (array vec4 2) conditional_tmp)
(if (var_ref pick_from_a_or_b)
((assign () (var_ref conditional_tmp) (var_ref a)))
((assign () (var_ref conditional_tmp) (var_ref b))))
However, we failed to update max_array_access for "a" and "b", so it
remained 0 - here, the whole array is being accessed. At link time,
update_array_sizes() used this bogus information to change the types
of "a" and "b" to vec4[1]. We then had assignments from a vec4[1] to
a vec4[2], which is highly illegal.
This tripped assertions in nir_split_var_copies with scalar VS.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand at intel.com>
Cc: mesa-stable at lists.freedesktop.org
(cherry picked from commit 9f1e250e77ebd9255bbd9a83bd68c9e4068c2aab)
diff --git a/src/glsl/ast_to_hir.cpp b/src/glsl/ast_to_hir.cpp
index ed0eb09..1dcb924 100644
--- a/src/glsl/ast_to_hir.cpp
+++ b/src/glsl/ast_to_hir.cpp
@@ -1603,6 +1603,12 @@ ast_expression::do_hir(exec_list *instructions,
&& cond_val != NULL) {
result = cond_val->value.b[0] ? op[1] : op[2];
} else {
+ /* The copy to conditional_tmp reads the whole array. */
+ if (type->is_array()) {
+ mark_whole_array_access(op[1]);
+ mark_whole_array_access(op[2]);
+ }
+
ir_variable *const tmp =
new(ctx) ir_variable(type, "conditional_tmp", ir_var_temporary);
instructions->push_tail(tmp);
commit e4d3bd685540e59cd7fe722ad6bd3a2c32f277ec
Author: Neil Roberts <neil at linux.intel.com>
Date: Wed Feb 25 15:33:08 2015 +0000
meta: Fix the y offset for 1D_ARRAY in _mesa_meta_pbo_TexSubImage
The yoffset needs to be interpreted as a slice offset for 1D array
textures. This patch implements that by moving the yoffset into
zoffset similar to how it moves the height into depth.
Reviewed-by: Jason Ekstrand <jason.ekstrand at intel.com>
Cc: "10.5" <mesa-stable at lists.freedesktop.org>
(cherry picked from commit 7286a6899176a8b26aa794097288eff941f5178c)
diff --git a/src/mesa/drivers/common/meta_tex_subimage.c b/src/mesa/drivers/common/meta_tex_subimage.c
index 1d175f6..af911c3 100644
--- a/src/mesa/drivers/common/meta_tex_subimage.c
+++ b/src/mesa/drivers/common/meta_tex_subimage.c
@@ -195,8 +195,12 @@ _mesa_meta_pbo_TexSubImage(struct gl_context *ctx, GLuint dims,
if (tex_image->TexObject->Target == GL_TEXTURE_1D_ARRAY) {
assert(depth == 1);
+ assert(zoffset == 0);
depth = height;
height = 1;
+ image_height = 1;
+ zoffset = yoffset;
+ yoffset = 0;
}
_mesa_meta_bind_fbo_image(GL_READ_FRAMEBUFFER, GL_COLOR_ATTACHMENT0,
@@ -312,8 +316,12 @@ _mesa_meta_pbo_GetTexSubImage(struct gl_context *ctx, GLuint dims,
if (tex_image && tex_image->TexObject->Target == GL_TEXTURE_1D_ARRAY) {
assert(depth == 1);
+ assert(zoffset == 0);
depth = height;
height = 1;
+ image_height = 1;
+ zoffset = yoffset;
+ yoffset = 0;
}
/* If we were given a texture, bind it to the read framebuffer. If not,
commit 614e7ebdad0ea1e0f14773db195cfcb75f74558d
Author: Neil Roberts <neil at linux.intel.com>
Date: Thu Feb 26 12:53:50 2015 +0000
meta: Allow GL_UN/PACK_IMAGE_HEIGHT in _mesa_meta_pbo_Get/TexSubImage
Now that a layered source PBO is interpreted as a single tall 2D image
it's quite easy to accept the image height packing option by just
creating an image that is tall enough to include the image padding.
I'm not sure whether the image height property should affect 1D_ARRAY
textures. My intuition and interpretation of the GL spec (which is a
bit vague) would be that it shouldn't. However the software fallback
path in Mesa uses the property for packing but not for unpacking. The
binary NVidia driver uses it for both. This patch doesn't use it for
either case so it is different from the software fallback. There is
some discussion about this here:
http://lists.freedesktop.org/archives/mesa-dev/2015-February/077925.html
This is tested by the texsubimage Piglit test with the array and pbo
arguments. Previously this test was skipping this code path because it
always sets the image height.
I've also tested it by modifying the getteximage-targets test. It
wasn't using this code path before because it was using the default
texture object so this code couldn't successfully create a frame
buffer. I also modified it to add some image padding with the image
height in the PBO.
Reviewed-by: Jason Ekstrand <jason.ekstrand at intel.com>
Cc: "10.5" <mesa-stable at lists.freedesktop.org>
(cherry picked from commit a08bff1e98b8e630f8bdf341af1491cd99e7d104)
diff --git a/src/mesa/drivers/common/meta_tex_subimage.c b/src/mesa/drivers/common/meta_tex_subimage.c
index f57db3c..1d175f6 100644
--- a/src/mesa/drivers/common/meta_tex_subimage.c
+++ b/src/mesa/drivers/common/meta_tex_subimage.c
@@ -134,6 +134,7 @@ _mesa_meta_pbo_TexSubImage(struct gl_context *ctx, GLuint dims,
const struct gl_pixelstore_attrib *packing)
{
GLuint pbo = 0, pbo_tex = 0, fbos[2] = { 0, 0 };
+ int full_height, image_height;
struct gl_texture_image *pbo_tex_image;
GLenum status;
bool success = false;
@@ -167,14 +168,16 @@ _mesa_meta_pbo_TexSubImage(struct gl_context *ctx, GLuint dims,
return true;
}
- /* Only accept tightly packed pixels from the user. */
- if (packing->ImageHeight != 0 && packing->ImageHeight != height)
- return false;
+ /* For arrays, use a tall (height * depth) 2D texture but taking into
+ * account the inter-image padding specified with the image height packing
+ * property.
+ */
+ image_height = packing->ImageHeight == 0 ? height : packing->ImageHeight;
+ full_height = image_height * (depth - 1) + height;
- /* For arrays, use a tall (height * depth) 2D texture. */
pbo_tex_image = create_texture_for_pbo(ctx, create_pbo,
GL_PIXEL_UNPACK_BUFFER,
- width, height * depth,
+ width, full_height,
format, type, pixels, packing,
&pbo, &pbo_tex);
if (!pbo_tex_image)
@@ -226,7 +229,8 @@ _mesa_meta_pbo_TexSubImage(struct gl_context *ctx, GLuint dims,
_mesa_update_state(ctx);
_mesa_meta_BlitFramebuffer(ctx, ctx->ReadBuffer, ctx->DrawBuffer,
- 0, z * height, width, (z + 1) * height,
+ 0, z * image_height,
+ width, z * image_height + height,
xoffset, yoffset,
xoffset + width, yoffset + height,
GL_COLOR_BUFFER_BIT, GL_NEAREST);
@@ -253,6 +257,7 @@ _mesa_meta_pbo_GetTexSubImage(struct gl_context *ctx, GLuint dims,
const struct gl_pixelstore_attrib *packing)
{
GLuint pbo = 0, pbo_tex = 0, fbos[2] = { 0, 0 };
+ int full_height, image_height;
struct gl_texture_image *pbo_tex_image;
GLenum status;
bool success = false;
@@ -286,13 +291,15 @@ _mesa_meta_pbo_GetTexSubImage(struct gl_context *ctx, GLuint dims,
return true;
}
- /* Only accept tightly packed pixels from the user. */
- if (packing->ImageHeight != 0 && packing->ImageHeight != height)
- return false;
+ /* For arrays, use a tall (height * depth) 2D texture but taking into
+ * account the inter-image padding specified with the image height packing
+ * property.
+ */
+ image_height = packing->ImageHeight == 0 ? height : packing->ImageHeight;
+ full_height = image_height * (depth - 1) + height;
- /* For arrays, use a tall (height * depth) 2D texture. */
pbo_tex_image = create_texture_for_pbo(ctx, false, GL_PIXEL_PACK_BUFFER,
- width, height * depth,
+ width, full_height * depth,
format, type, pixels, packing,
&pbo, &pbo_tex);
if (!pbo_tex_image)
@@ -351,7 +358,8 @@ _mesa_meta_pbo_GetTexSubImage(struct gl_context *ctx, GLuint dims,
_mesa_meta_BlitFramebuffer(ctx, ctx->ReadBuffer, ctx->DrawBuffer,
xoffset, yoffset,
xoffset + width, yoffset + height,
- 0, z * height, width, (z + 1) * height,
+ 0, z * image_height,
+ width, z * image_height + height,
GL_COLOR_BUFFER_BIT, GL_NEAREST);
}
commit 7f32fa0dcb7dcdc9cb28521c26ec93e48c198bfa
Author: Neil Roberts <neil at linux.intel.com>
Date: Thu Feb 26 12:12:15 2015 +0000
Revert "common: Fix PBOs for 1D_ARRAY."
This reverts commit 546aba143d13ba3f993ead4cc30b2404abfc0202.
I think the changes to the calls to glBlitFramebuffer from this patch
are no different to what it was doing previously because it used to
set height to 1 before doing the blits. However it was introducing
some problems with the blit for layer 0 because this was no longer
special cased. It didn't fix problems with the yoffset which needs to
be interpreted as a slice offset. I think a better solution would be
to modify the original if statement to cope with the yoffset.
Conflicts:
src/mesa/drivers/common/meta_tex_subimage.c
Cc: "10.5" <mesa-stable at lists.freedesktop.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand at intel.com>
(cherry picked from commit 7d10d2feee381739eef97f4720cbadbd65bb4fc6)
diff --git a/src/mesa/drivers/common/meta_tex_subimage.c b/src/mesa/drivers/common/meta_tex_subimage.c
index 42cbf0c..f57db3c 100644
--- a/src/mesa/drivers/common/meta_tex_subimage.c
+++ b/src/mesa/drivers/common/meta_tex_subimage.c
@@ -137,7 +137,7 @@ _mesa_meta_pbo_TexSubImage(struct gl_context *ctx, GLuint dims,
struct gl_texture_image *pbo_tex_image;
GLenum status;
bool success = false;
- int z, iters;
+ int z;
/* XXX: This should probably be passed in from somewhere */
const char *where = "_mesa_meta_pbo_TexSubImage";
@@ -190,6 +190,12 @@ _mesa_meta_pbo_TexSubImage(struct gl_context *ctx, GLuint dims,
_mesa_BindFramebuffer(GL_READ_FRAMEBUFFER, fbos[0]);
_mesa_BindFramebuffer(GL_DRAW_FRAMEBUFFER, fbos[1]);
+ if (tex_image->TexObject->Target == GL_TEXTURE_1D_ARRAY) {
+ assert(depth == 1);
+ depth = height;
+ height = 1;
+ }
+
_mesa_meta_bind_fbo_image(GL_READ_FRAMEBUFFER, GL_COLOR_ATTACHMENT0,
pbo_tex_image, 0);
/* If this passes on the first layer it should pass on the others */
@@ -213,27 +219,17 @@ _mesa_meta_pbo_TexSubImage(struct gl_context *ctx, GLuint dims,
GL_COLOR_BUFFER_BIT, GL_NEAREST))
goto fail;
- iters = tex_image->TexObject->Target == GL_TEXTURE_1D_ARRAY ?
- height : depth;
-
- for (z = 1; z < iters; z++) {
+ for (z = 1; z < depth; z++) {
_mesa_meta_bind_fbo_image(GL_DRAW_FRAMEBUFFER, GL_COLOR_ATTACHMENT0,
tex_image, zoffset + z);
_mesa_update_state(ctx);
- if (tex_image->TexObject->Target == GL_TEXTURE_1D_ARRAY)
- _mesa_meta_BlitFramebuffer(ctx, ctx->ReadBuffer, ctx->DrawBuffer,
- 0, z, width, z + 1,
- xoffset, yoffset,
- xoffset + width, yoffset + 1,
- GL_COLOR_BUFFER_BIT, GL_NEAREST);
- else
- _mesa_meta_BlitFramebuffer(ctx, ctx->ReadBuffer, ctx->DrawBuffer,
- 0, z * height, width, (z + 1) * height,
- xoffset, yoffset,
- xoffset + width, yoffset + height,
- GL_COLOR_BUFFER_BIT, GL_NEAREST);
+ _mesa_meta_BlitFramebuffer(ctx, ctx->ReadBuffer, ctx->DrawBuffer,
+ 0, z * height, width, (z + 1) * height,
+ xoffset, yoffset,
+ xoffset + width, yoffset + height,
+ GL_COLOR_BUFFER_BIT, GL_NEAREST);
}
success = true;
@@ -260,7 +256,7 @@ _mesa_meta_pbo_GetTexSubImage(struct gl_context *ctx, GLuint dims,
struct gl_texture_image *pbo_tex_image;
GLenum status;
bool success = false;
- int z, iters;
+ int z;
/* XXX: This should probably be passed in from somewhere */
const char *where = "_mesa_meta_pbo_GetTexSubImage";
@@ -307,6 +303,12 @@ _mesa_meta_pbo_GetTexSubImage(struct gl_context *ctx, GLuint dims,
_mesa_GenFramebuffers(2, fbos);
+ if (tex_image && tex_image->TexObject->Target == GL_TEXTURE_1D_ARRAY) {
+ assert(depth == 1);
+ depth = height;
+ height = 1;
+ }
+
/* If we were given a texture, bind it to the read framebuffer. If not,
* we're doing a ReadPixels and we should just use whatever framebuffer
* the client has bound.
@@ -340,29 +342,17 @@ _mesa_meta_pbo_GetTexSubImage(struct gl_context *ctx, GLuint dims,
GL_COLOR_BUFFER_BIT, GL_NEAREST))
goto fail;
- if (tex_image && tex_image->TexObject->Target == GL_TEXTURE_1D_ARRAY)
- iters = height;
- else
- iters = depth;
-
- for (z = 1; z < iters; z++) {
+ for (z = 1; z < depth; z++) {
_mesa_meta_bind_fbo_image(GL_READ_FRAMEBUFFER, GL_COLOR_ATTACHMENT0,
tex_image, zoffset + z);
_mesa_update_state(ctx);
- if (tex_image->TexObject->Target == GL_TEXTURE_1D_ARRAY)
- _mesa_meta_BlitFramebuffer(ctx, ctx->ReadBuffer, ctx->DrawBuffer,
- xoffset, yoffset,
- xoffset + width, yoffset + 1,
- 0, z, width, z + 1,
- GL_COLOR_BUFFER_BIT, GL_NEAREST);
- else
- _mesa_meta_BlitFramebuffer(ctx, ctx->ReadBuffer, ctx->DrawBuffer,
- xoffset, yoffset,
- xoffset + width, yoffset + height,
- 0, z * height, width, (z + 1) * height,
- GL_COLOR_BUFFER_BIT, GL_NEAREST);
+ _mesa_meta_BlitFramebuffer(ctx, ctx->ReadBuffer, ctx->DrawBuffer,
+ xoffset, yoffset,
+ xoffset + width, yoffset + height,
+ 0, z * height, width, (z + 1) * height,
+ GL_COLOR_BUFFER_BIT, GL_NEAREST);
}
success = true;
commit a15de1ae1aa0a74f3caeb9f651430facefee8937
Author: Neil Roberts <neil at linux.intel.com>
Date: Wed Feb 25 15:10:01 2015 +0000
meta: In pbo_{Get,}TexSubImage don't repeatedly rebind the source tex
A layered PBO image is now interpreted as a single tall 2D image so
the z argument in _mesa_meta_bind_fbo_image is ignored. Therefore this
was just redundantly rebinding the same image repeatedly.
Reviewed-by: Jason Ekstrand <jason.ekstrand at intel.com>
(cherry picked from commit a44606eb8164be2aa37eb288fd90894d74bd0935)
diff --git a/src/mesa/drivers/common/meta_tex_subimage.c b/src/mesa/drivers/common/meta_tex_subimage.c
index 9f0c115..42cbf0c 100644
--- a/src/mesa/drivers/common/meta_tex_subimage.c
+++ b/src/mesa/drivers/common/meta_tex_subimage.c
@@ -217,8 +217,6 @@ _mesa_meta_pbo_TexSubImage(struct gl_context *ctx, GLuint dims,
height : depth;
for (z = 1; z < iters; z++) {
- _mesa_meta_bind_fbo_image(GL_READ_FRAMEBUFFER, GL_COLOR_ATTACHMENT0,
- pbo_tex_image, z);
_mesa_meta_bind_fbo_image(GL_DRAW_FRAMEBUFFER, GL_COLOR_ATTACHMENT0,
tex_image, zoffset + z);
@@ -350,8 +348,6 @@ _mesa_meta_pbo_GetTexSubImage(struct gl_context *ctx, GLuint dims,
for (z = 1; z < iters; z++) {
_mesa_meta_bind_fbo_image(GL_READ_FRAMEBUFFER, GL_COLOR_ATTACHMENT0,
tex_image, zoffset + z);
- _mesa_meta_bind_fbo_image(GL_DRAW_FRAMEBUFFER, GL_COLOR_ATTACHMENT0,
- pbo_tex_image, z);
_mesa_update_state(ctx);
commit 31fcb21ef523434a254c0bbff515345c2c6d8152
Author: Matt Turner <mattst88 at gmail.com>
Date: Fri Feb 27 10:59:17 2015 -0800
i965: Avoid applying negate to wrong MAD source.
For some given GLSL IR like (+ (neg x) (* 1.2 x)), the try_emit_mad
function would see that one of the +'s sources was a negate expression
and set mul_negate = true without confirming that it was actually a
multiply.
Cc: 10.5 <mesa-stable at lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89315
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89095
Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
(cherry picked from commit d528907fd2950c7bb968fff66dd79863cd128890)
[Emil Velikov: drop the changes in brw_vec4_visitor.cpp]
Signed-off-by: Emil Velikov <emil.l.velikov at gmail.com>
Conflicts:
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
index 6cddcf5..d8e10df 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
@@ -428,21 +428,16 @@ fs_visitor::try_emit_mad(ir_expression *ir)
if (ir->type != glsl_type::float_type)
return false;
- ir_rvalue *nonmul = ir->operands[1];
- ir_expression *mul = ir->operands[0]->as_expression();
+ ir_rvalue *nonmul;
+ ir_expression *mul;
+ bool mul_negate, mul_abs;
- bool mul_negate = false, mul_abs = false;
- if (mul && mul->operation == ir_unop_abs) {
- mul = mul->operands[0]->as_expression();
- mul_abs = true;
- } else if (mul && mul->operation == ir_unop_neg) {
- mul = mul->operands[0]->as_expression();
- mul_negate = true;
- }
+ for (int i = 0; i < 2; i++) {
+ mul_negate = false;
+ mul_abs = false;
- if (!mul || mul->operation != ir_binop_mul) {
- nonmul = ir->operands[0];
- mul = ir->operands[1]->as_expression();
+ mul = ir->operands[i]->as_expression();
+ nonmul = ir->operands[1 - i];
if (mul && mul->operation == ir_unop_abs) {
mul = mul->operands[0]->as_expression();
@@ -452,10 +447,13 @@ fs_visitor::try_emit_mad(ir_expression *ir)
mul_negate = true;
}
- if (!mul || mul->operation != ir_binop_mul)
- return false;
+ if (mul && mul->operation == ir_binop_mul)
+ break;
}
+ if (!mul || mul->operation != ir_binop_mul)
+ return false;
+
if (nonmul->as_constant() ||
mul->operands[0]->as_constant() ||
mul->operands[1]->as_constant())
commit 0cd8e357e323f39603bfb178108d94f83d6a3c37
Author: Laura Ekstrand <laura at jlekstrand.net>
Date: Wed Feb 25 15:45:47 2015 -0800
main: Fix target checking for CopyTexSubImage*D.
This fixes a dEQP test failure. In the test,
glCopyTexSubImage2D was called with target = 0 and failed to throw
INVALID ENUM. This failure was caused by _mesa_get_current_tex_object(ctx,
target) being called before the target checking. To remedy this, target
checking was separated from the main error-checking function and
called prior to _mesa_get_current_tex_object.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89312
Reviewed-by: Anuj Phogat <anuj.phogat at gmail.com>
(cherry picked from commit ca65764d6042d2ea220a1e3952490f79c226f3e0)
diff --git a/src/mesa/main/teximage.c b/src/mesa/main/teximage.c
index e1730b5..129c149 100644
--- a/src/mesa/main/teximage.c
+++ b/src/mesa/main/teximage.c
@@ -2818,14 +2818,6 @@ copytexsubimage_error_check(struct gl_context *ctx, GLuint dimensions,
}
}
- /* check target (proxies not allowed) */
- if (!legal_texsubimage_target(ctx, dimensions, target, dsa)) {
- _mesa_error(ctx, GL_INVALID_ENUM, "glCopyTex%sSubImage%uD(target=%s)",
- suffix, dimensions,
- _mesa_lookup_enum_by_nr(target));
- return GL_TRUE;
- }
-
/* Check level */
if (level < 0 || level >= _mesa_max_texture_levels(ctx, target)) {
_mesa_error(ctx, GL_INVALID_VALUE,
@@ -4091,6 +4083,16 @@ _mesa_CopyTexSubImage1D( GLenum target, GLint level,
struct gl_texture_object* texObj;
GET_CURRENT_CONTEXT(ctx);
+ /* Check target (proxies not allowed). Target must be checked prior to
+ * calling _mesa_get_current_tex_object.
+ */
+ if (!legal_texsubimage_target(ctx, 1, target, false)) {
+ _mesa_error(ctx, GL_INVALID_ENUM,
+ "glCopyTexSubImage1D(invalid target %s)",
+ _mesa_lookup_enum_by_nr(target));
+ return;
+ }
+
texObj = _mesa_get_current_tex_object(ctx, target);
if (!texObj)
return;
@@ -4109,6 +4111,16 @@ _mesa_CopyTexSubImage2D( GLenum target, GLint level,
struct gl_texture_object* texObj;
GET_CURRENT_CONTEXT(ctx);
+ /* Check target (proxies not allowed). Target must be checked prior to
+ * calling _mesa_get_current_tex_object.
+ */
+ if (!legal_texsubimage_target(ctx, 2, target, false)) {
+ _mesa_error(ctx, GL_INVALID_ENUM,
+ "glCopyTexSubImage2D(invalid target %s)",
+ _mesa_lookup_enum_by_nr(target));
+ return;
+ }
+
texObj = _mesa_get_current_tex_object(ctx, target);
if (!texObj)
return;
@@ -4128,6 +4140,16 @@ _mesa_CopyTexSubImage3D( GLenum target, GLint level,
struct gl_texture_object* texObj;
GET_CURRENT_CONTEXT(ctx);
+ /* Check target (proxies not allowed). Target must be checked prior to
+ * calling _mesa_get_current_tex_object.
+ */
+ if (!legal_texsubimage_target(ctx, 3, target, false)) {
+ _mesa_error(ctx, GL_INVALID_ENUM,
+ "glCopyTexSubImage3D(invalid target %s)",
+ _mesa_lookup_enum_by_nr(target));
+ return;
+ }
+
texObj = _mesa_get_current_tex_object(ctx, target);
if (!texObj)
return;
@@ -4148,6 +4170,14 @@ _mesa_CopyTextureSubImage1D(GLuint texture, GLint level,
if (!texObj)
return;
+ /* Check target (proxies not allowed). */
+ if (!legal_texsubimage_target(ctx, 1, texObj->Target, true)) {
+ _mesa_error(ctx, GL_INVALID_ENUM,
+ "glCopyTextureSubImage1D(invalid target %s)",
+ _mesa_lookup_enum_by_nr(texObj->Target));
+ return;
+ }
+
_mesa_copy_texture_sub_image(ctx, 1, texObj, texObj->Target, level,
xoffset, 0, 0, x, y, width, 1, true);
}
@@ -4164,6 +4194,14 @@ _mesa_CopyTextureSubImage2D(GLuint texture, GLint level,
if (!texObj)
return;
+ /* Check target (proxies not allowed). */
+ if (!legal_texsubimage_target(ctx, 2, texObj->Target, true)) {
+ _mesa_error(ctx, GL_INVALID_ENUM,
+ "glCopyTextureSubImage2D(invalid target %s)",
+ _mesa_lookup_enum_by_nr(texObj->Target));
+ return;
+ }
+
_mesa_copy_texture_sub_image(ctx, 2, texObj, texObj->Target, level,
xoffset, yoffset, 0,
x, y, width, height, true);
@@ -4183,6 +4221,14 @@ _mesa_CopyTextureSubImage3D(GLuint texture, GLint level,
if (!texObj)
return;
+ /* Check target (proxies not allowed). */
+ if (!legal_texsubimage_target(ctx, 3, texObj->Target, true)) {
+ _mesa_error(ctx, GL_INVALID_ENUM,
+ "glCopyTextureSubImage3D(invalid target %s)",
+ _mesa_lookup_enum_by_nr(texObj->Target));
+ return;
+ }
+
_mesa_copy_texture_sub_image(ctx, 3, texObj, texObj->Target, level,
xoffset, yoffset, zoffset,
x, y, width, height, true);
commit 8b4db9c6877fab9ed37a7377fe6592ff76828555
Author: Laura Ekstrand <laura at jlekstrand.net>
Date: Wed Feb 25 10:34:03 2015 -0800
main: Fix target checking for CompressedTexSubImage*D.
This fixes a dEQP test failure. In the test,
glCompressedTexSubImage2D was called with target = 0 and failed to throw
INVALID ENUM. This failure was caused by _mesa_get_current_tex_object(ctx,
target) being called before the target checking. To remedy this, target
checking was made into its own function and called prior to
_mesa_get_current_tex_object.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89311
Reviewed-by: Anuj Phogat <anuj.phogat at gmail.com>
(cherry picked from commit 549078cb5a95e0ee381d036b8c36bc41506f21bc)
diff --git a/src/mesa/main/teximage.c b/src/mesa/main/teximage.c
index 74a306a..e1730b5 100644
--- a/src/mesa/main/teximage.c
+++ b/src/mesa/main/teximage.c
@@ -4457,25 +4457,21 @@ out:
/**
- * Error checking for glCompressedTexSubImage[123]D().
+ * Target checking for glCompressedTexSubImage[123]D().
* \return GL_TRUE if error, GL_FALSE if no error
+ * Must come before other error checking so that the texture object can
+ * be correctly retrieved using _mesa_get_current_tex_object.
*/
static GLboolean
-compressed_subtexture_error_check(struct gl_context *ctx, GLint dims,
- const struct gl_texture_object *texObj,
- GLenum target, GLint level,
- GLint xoffset, GLint yoffset, GLint zoffset,
- GLsizei width, GLsizei height, GLsizei depth,
- GLenum format, GLsizei imageSize, bool dsa)
+compressed_subtexture_target_check(struct gl_context *ctx, GLenum target,
+ GLint dims, GLenum format, bool dsa,
+ const char *caller)
{
- struct gl_texture_image *texImage;
- GLint expectedSize;
GLboolean targetOK;
- const char *suffix = dsa ? "ture" : "";
if (dsa && target == GL_TEXTURE_RECTANGLE) {
- _mesa_error(ctx, GL_INVALID_OPERATION,
- "glCompressedSubTexture%dD(target)", dims);
+ _mesa_error(ctx, GL_INVALID_OPERATION, "%s(invalid target %s)", caller,
+ _mesa_lookup_enum_by_nr(target));
return GL_TRUE;
}
@@ -4538,7 +4534,9 @@ compressed_subtexture_error_check(struct gl_context *ctx, GLint dims,
}
if (invalidformat) {
_mesa_error(ctx, GL_INVALID_OPERATION,
- "glCompressedTex%sSubImage%uD(target)", suffix, dims);
+ "%s(invalid target %s for format %s)", caller,
+ _mesa_lookup_enum_by_nr(target),
+ _mesa_lookup_enum_by_nr(format));
return GL_TRUE;
}
}
@@ -4552,11 +4550,30 @@ compressed_subtexture_error_check(struct gl_context *ctx, GLint dims,
}
if (!targetOK) {
- _mesa_error(ctx, GL_INVALID_ENUM,
- "glCompressedTex%sSubImage%uD(target)", suffix, dims);
+ _mesa_error(ctx, GL_INVALID_ENUM, "%s(invalid target %s)", caller,
+ _mesa_lookup_enum_by_nr(target));
return GL_TRUE;
}
+ return GL_FALSE;
+}
+
+/**
+ * Error checking for glCompressedTexSubImage[123]D().
+ * \return GL_TRUE if error, GL_FALSE if no error
+ */
+static GLboolean
+compressed_subtexture_error_check(struct gl_context *ctx, GLint dims,
+ const struct gl_texture_object *texObj,
+ GLenum target, GLint level,
+ GLint xoffset, GLint yoffset, GLint zoffset,
+ GLsizei width, GLsizei height, GLsizei depth,
+ GLenum format, GLsizei imageSize, bool dsa)
+{
+ struct gl_texture_image *texImage;
+ GLint expectedSize;
+ const char *suffix = dsa ? "ture" : "";
+
/* this will catch any invalid compressed format token */
if (!_mesa_is_compressed_format(ctx, format)) {
_mesa_error(ctx, GL_INVALID_ENUM,
@@ -4712,6 +4729,11 @@ _mesa_CompressedTexSubImage1D(GLenum target, GLint level, GLint xoffset,
struct gl_texture_object *texObj;
GET_CURRENT_CONTEXT(ctx);
+ if (compressed_subtexture_target_check(ctx, target, 1, format, false,
+ "glCompressedTexSubImage1D")) {
+ return;
+ }
+
texObj = _mesa_get_current_tex_object(ctx, target);
if (!texObj)
return;
@@ -4734,6 +4756,12 @@ _mesa_CompressedTextureSubImage1D(GLuint texture, GLint level, GLint xoffset,
if (!texObj)
return;
+ if (compressed_subtexture_target_check(ctx, texObj->Target, 1, format,
+ true,
+ "glCompressedTextureSubImage1D")) {
+ return;
+ }
+
_mesa_compressed_texture_sub_image(ctx, 1, texObj, texObj->Target, level,
xoffset, 0, 0, width, 1, 1,
format, imageSize, data, true);
@@ -4749,6 +4777,11 @@ _mesa_CompressedTexSubImage2D(GLenum target, GLint level, GLint xoffset,
struct gl_texture_object *texObj;
GET_CURRENT_CONTEXT(ctx);
+ if (compressed_subtexture_target_check(ctx, target, 2, format, false,
+ "glCompressedTexSubImage2D")) {
+ return;
+ }
+
texObj = _mesa_get_current_tex_object(ctx, target);
if (!texObj)
return;
@@ -4773,6 +4806,12 @@ _mesa_CompressedTextureSubImage2D(GLuint texture, GLint level, GLint xoffset,
if (!texObj)
return;
+ if (compressed_subtexture_target_check(ctx, texObj->Target, 2, format,
+ true,
+ "glCompressedTextureSubImage2D")) {
+ return;
+ }
+
_mesa_compressed_texture_sub_image(ctx, 2, texObj, texObj->Target, level,
xoffset, yoffset, 0, width, height, 1,
format, imageSize, data, true);
@@ -4787,6 +4826,11 @@ _mesa_CompressedTexSubImage3D(GLenum target, GLint level, GLint xoffset,
struct gl_texture_object *texObj;
GET_CURRENT_CONTEXT(ctx);
+ if (compressed_subtexture_target_check(ctx, target, 3, format, false,
+ "glCompressedTexSubImage3D")) {
+ return;
+ }
+
texObj = _mesa_get_current_tex_object(ctx, target);
if (!texObj)
return;
@@ -4812,6 +4856,12 @@ _mesa_CompressedTextureSubImage3D(GLuint texture, GLint level, GLint xoffset,
if (!texObj)
return;
+ if (compressed_subtexture_target_check(ctx, texObj->Target, 3, format,
+ true,
+ "glCompressedTextureSubImage3D")) {
+ return;
+ }
+
_mesa_compressed_texture_sub_image(ctx, 3, texObj, texObj->Target, level,
xoffset, yoffset, zoffset,
width, height, depth,
commit b0400a58dbbfba8dce7427cf489361a8db2c9312
Author: Frank Henigman <fjhenigman at google.com>
Date: Thu Feb 19 15:09:20 2015 -0800
intel: fix EGLImage renderbuffer _BaseFormat
Correctly set _BaseFormat field when creating a gl_renderbuffer
with EGLImage storage.
Change-Id: I8c9f7302d18b617f54fa68304d8ffee087ed8a77
Signed-off-by: Frank Henigman <fjhenigman at google.com>
Reviewed-by: Stéphane Marchesin <marcheu at chromium.org>
Reviewed-by: Chad Versace <chad.versace at intel.com>
(cherry picked from commit e43729943e67972e547a19123fb3afca6b77202b)
Nominated-by: Chad Versace <chad.versace at intel.com>
diff --git a/src/mesa/drivers/dri/i915/intel_fbo.c b/src/mesa/drivers/dri/i915/intel_fbo.c
index ead1b17..6c2e181 100644
--- a/src/mesa/drivers/dri/i915/intel_fbo.c
+++ b/src/mesa/drivers/dri/i915/intel_fbo.c
@@ -287,8 +287,7 @@ intel_image_target_renderbuffer_storage(struct gl_context *ctx,
rb->Width = image->region->width;
rb->Height = image->region->height;
rb->Format = image->format;
- rb->_BaseFormat = _mesa_base_fbo_format(&intel->ctx,
- image->internal_format);
+ rb->_BaseFormat = _mesa_get_format_base_format(image->format);
rb->NeedsFinishRenderTexture = true;
}
diff --git a/src/mesa/drivers/dri/i965/intel_fbo.c b/src/mesa/drivers/dri/i965/intel_fbo.c
index 293b68e..c98cbb0 100644
--- a/src/mesa/drivers/dri/i965/intel_fbo.c
+++ b/src/mesa/drivers/dri/i965/intel_fbo.c
@@ -398,7 +398,7 @@ intel_image_target_renderbuffer_storage(struct gl_context *ctx,
rb->Width = image->width;
rb->Height = image->height;
rb->Format = image->format;
- rb->_BaseFormat = _mesa_base_fbo_format(ctx, image->internal_format);
+ rb->_BaseFormat = _mesa_get_format_base_format(image->format);
rb->NeedsFinishRenderTexture = true;
irb->layer_count = 1;
}
commit ef1c87ba09d34e4985fa9cbdc4e32b2945314dc6
Author: Matt Turner <mattst88 at gmail.com>
Date: Sat Feb 28 12:12:22 2015 -0800
Revert SHA1 additions.
The shader-cache isn't finished, so the configure checks are a bit
premature and will only stand to confuse users of Mesa 10.5.0.
This is a squash of the follow four reverts:
Revert "Rename sha1.c and sha1.h to mesa-sha1.c and mesa-sha1.h"
Revert "configure: Add machinery for --enable-shader-cache (and --disable-shader-cache)"
Revert "sha1: Fix gcry_md_hd_t typo."
Revert "mesa: Add mesa SHA-1 functions"
Reviewed-by: Carl Worth <cworth at cworth.org>
diff --git a/configure.ac b/configure.ac
index beb7a7d..f596a9d 100644
--- a/configure.ac
+++ b/configure.ac
@@ -9,7 +9,6 @@ dnl Copyright © 2009-2014 Jon TURNEY
dnl Copyright © 2011-2012 Benjamin Franzke
dnl Copyright © 2008-2014 David Airlie
dnl Copyright © 2009-2013 Brian Paul
-dnl Copyright © 2003-2007 Keith Packard, Daniel Stone
dnl
dnl Permission is hereby granted, free of charge, to any person obtaining a
dnl copy of this software and associated documentation files (the "Software"),
@@ -935,144 +934,6 @@ fi
AC_SUBST([MESA_LLVM])
-# SHA1 hashing
-AC_ARG_WITH([sha1],
- [AS_HELP_STRING([--with-sha1=libc|libmd|libnettle|libgcrypt|libcrypto|libsha1|CommonCrypto|CryptoAPI],
- [choose SHA1 implementation])])
-case "x$with_sha1" in
-x | xlibc | xlibmd | xlibnettle | xlibgcrypt | xlibcrypto | xlibsha1 | xCommonCrypto | xCryptoAPI)
- ;;
-*)
- AC_MSG_ERROR([Illegal value for --with-sha1: $with_sha1])
-esac
-
-AC_CHECK_FUNC([SHA1Init], [HAVE_SHA1_IN_LIBC=yes])
-if test "x$with_sha1" = x && test "x$HAVE_SHA1_IN_LIBC" = xyes; then
- with_sha1=libc
-fi
-if test "x$with_sha1" = xlibc && test "x$HAVE_SHA1_IN_LIBC" != xyes; then
- AC_MSG_ERROR([sha1 in libc requested but not found])
-fi
-if test "x$with_sha1" = xlibc; then
- AC_DEFINE([HAVE_SHA1_IN_LIBC], [1],
- [Use libc SHA1 functions])
- SHA1_LIBS=""
-fi
-AC_CHECK_FUNC([CC_SHA1_Init], [HAVE_SHA1_IN_COMMONCRYPTO=yes])
-if test "x$with_sha1" = x && test "x$HAVE_SHA1_IN_COMMONCRYPTO" = xyes; then
- with_sha1=CommonCrypto
-fi
-if test "x$with_sha1" = xCommonCrypto && test "x$HAVE_SHA1_IN_COMMONCRYPTO" != xyes; then
- AC_MSG_ERROR([CommonCrypto requested but not found])
-fi
-if test "x$with_sha1" = xCommonCrypto; then
- AC_DEFINE([HAVE_SHA1_IN_COMMONCRYPTO], [1],
- [Use CommonCrypto SHA1 functions])
- SHA1_LIBS=""
-fi
-dnl stdcall functions cannot be tested with AC_CHECK_LIB
-AC_CHECK_HEADER([wincrypt.h], [HAVE_SHA1_IN_CRYPTOAPI=yes], [], [#include <windows.h>])
-if test "x$with_sha1" = x && test "x$HAVE_SHA1_IN_CRYPTOAPI" = xyes; then
- with_sha1=CryptoAPI
-fi
-if test "x$with_sha1" = xCryptoAPI && test "x$HAVE_SHA1_IN_CRYPTOAPI" != xyes; then
- AC_MSG_ERROR([CryptoAPI requested but not found])
-fi
-if test "x$with_sha1" = xCryptoAPI; then
- AC_DEFINE([HAVE_SHA1_IN_CRYPTOAPI], [1],
- [Use CryptoAPI SHA1 functions])
- SHA1_LIBS=""
-fi
-AC_CHECK_LIB([md], [SHA1Init], [HAVE_LIBMD=yes])
-if test "x$with_sha1" = x && test "x$HAVE_LIBMD" = xyes; then
- with_sha1=libmd
-fi
-if test "x$with_sha1" = xlibmd && test "x$HAVE_LIBMD" != xyes; then
- AC_MSG_ERROR([libmd requested but not found])
-fi
-if test "x$with_sha1" = xlibmd; then
- AC_DEFINE([HAVE_SHA1_IN_LIBMD], [1],
- [Use libmd SHA1 functions])
- SHA1_LIBS=-lmd
-fi
-PKG_CHECK_MODULES([LIBSHA1], [libsha1], [HAVE_LIBSHA1=yes], [HAVE_LIBSHA1=no])
-if test "x$with_sha1" = x && test "x$HAVE_LIBSHA1" = xyes; then
- with_sha1=libsha1
-fi
-if test "x$with_sha1" = xlibsha1 && test "x$HAVE_LIBSHA1" != xyes; then
- AC_MSG_ERROR([libsha1 requested but not found])
-fi
-if test "x$with_sha1" = xlibsha1; then
- AC_DEFINE([HAVE_SHA1_IN_LIBSHA1], [1],
- [Use libsha1 for SHA1])
- SHA1_LIBS=-lsha1
-fi
-AC_CHECK_LIB([nettle], [nettle_sha1_init], [HAVE_LIBNETTLE=yes])
-if test "x$with_sha1" = x && test "x$HAVE_LIBNETTLE" = xyes; then
- with_sha1=libnettle
-fi
-if test "x$with_sha1" = xlibnettle && test "x$HAVE_LIBNETTLE" != xyes; then
- AC_MSG_ERROR([libnettle requested but not found])
-fi
-if test "x$with_sha1" = xlibnettle; then
- AC_DEFINE([HAVE_SHA1_IN_LIBNETTLE], [1],
- [Use libnettle SHA1 functions])
- SHA1_LIBS=-lnettle
-fi
-AC_CHECK_LIB([gcrypt], [gcry_md_open], [HAVE_LIBGCRYPT=yes])
-if test "x$with_sha1" = x && test "x$HAVE_LIBGCRYPT" = xyes; then
- with_sha1=libgcrypt
-fi
-if test "x$with_sha1" = xlibgcrypt && test "x$HAVE_LIBGCRYPT" != xyes; then
- AC_MSG_ERROR([libgcrypt requested but not found])
-fi
-if test "x$with_sha1" = xlibgcrypt; then
- AC_DEFINE([HAVE_SHA1_IN_LIBGCRYPT], [1],
- [Use libgcrypt SHA1 functions])
- SHA1_LIBS=-lgcrypt
-fi
-# We don't need all of the OpenSSL libraries, just libcrypto
-AC_CHECK_LIB([crypto], [SHA1_Init], [HAVE_LIBCRYPTO=yes])
-PKG_CHECK_MODULES([OPENSSL], [openssl], [HAVE_OPENSSL_PKC=yes],
- [HAVE_OPENSSL_PKC=no])
-if test "x$HAVE_LIBCRYPTO" = xyes || test "x$HAVE_OPENSSL_PKC" = xyes; then
- if test "x$with_sha1" = x; then
- with_sha1=libcrypto
- fi
-else
- if test "x$with_sha1" = xlibcrypto; then
- AC_MSG_ERROR([OpenSSL libcrypto requested but not found])
- fi
-fi
-if test "x$with_sha1" = xlibcrypto; then
- if test "x$HAVE_LIBCRYPTO" = xyes; then
- SHA1_LIBS=-lcrypto
- else
- SHA1_LIBS="$OPENSSL_LIBS"
- SHA1_CFLAGS="$OPENSSL_CFLAGS"
- fi
-fi
-AC_MSG_CHECKING([for SHA1 implementation])
-AC_MSG_RESULT([$with_sha1])
-AC_SUBST(SHA1_LIBS)
-AC_SUBST(SHA1_CFLAGS)
-
-# Allow user to configure out the shader-cache feature
-AC_ARG_ENABLE([shader-cache],
- AS_HELP_STRING([--disable-shader-cache], [Disable binary shader cache]),
- [enable_shader_cache="$enableval"],
- [if test "x$with_sha1" != "x"; then
- enable_shader_cache=yes
- else
- enable_shader_cache=no
- fi])
-if test "x$with_sha1" = "x"; then
- if test "x$enable_shader_cache" = "xyes"; then
- AC_MSG_ERROR([Cannot enable shader cache (no SHA-1 implementation found)])
- fi
-fi
-AM_CONDITIONAL([ENABLE_SHADER_CACHE], [test x$enable_shader_cache = xyes])
-
# Check for libdrm
PKG_CHECK_MODULES([LIBDRM], [libdrm >= $LIBDRM_REQUIRED],
[have_libdrm=yes], [have_libdrm=no])
@@ -2529,12 +2390,6 @@ else
echo " Gallium: no"
fi
-dnl Shader cache
-echo ""
-echo " Shader cache: $enable_shader_cache"
-if test "x$enable_shader_cache" = "xyes"; then
- echo " With SHA1 from: $with_sha1"
-fi
dnl Libraries
echo ""
diff --git a/src/util/Makefile.am b/src/util/Makefile.am
index 7512138..c7e183e 100644
--- a/src/util/Makefile.am
+++ b/src/util/Makefile.am
@@ -31,19 +31,12 @@ libmesautil_la_CPPFLAGS = \
-I$(top_srcdir)/src \
-I$(top_srcdir)/src/mapi \
-I$(top_srcdir)/src/mesa \
- $(SHA1_CFLAGS) \
$(VISIBILITY_CFLAGS)
libmesautil_la_SOURCES = \
$(MESA_UTIL_FILES) \
$(MESA_UTIL_GENERATED_FILES)
-if ENABLE_SHADER_CACHE
-libmesautil_la_SOURCES += $(MESA_UTIL_SHADER_CACHE_FILES)
-endif
-
-libmesautil_la_LIBADD = $(SHA1_LIBS)
-
check_PROGRAMS = u_atomic_test
TESTS = $(check_PROGRAMS)
diff --git a/src/util/Makefile.sources b/src/util/Makefile.sources
index 1e29a03..7aee950 100644
--- a/src/util/Makefile.sources
+++ b/src/util/Makefile.sources
@@ -1,7 +1,3 @@
-MESA_UTIL_SHADER_CACHE_FILES := \
- mesa-sha1.c \
- mesa-sha1.h
-
MESA_UTIL_FILES := \
format_srgb.h \
hash_table.c \
diff --git a/src/util/SConscript b/src/util/SConscript
index 28fedd8..34b9a2d 100644
--- a/src/util/SConscript
+++ b/src/util/SConscript
@@ -29,11 +29,6 @@ mesautil_sources = (
source_lists['MESA_UTIL_GENERATED_FILES']
)
-# XXX We don't yet have scons support for detecting any of the various
-# HAVE_SHA1_* definitions, so for now simply disable the shader cache.
-if False:
- mesautil_sources += source_lists['MESA_UTIL_SHADER_CACHE_FILES']
-
mesautil = env.ConvenienceLibrary(
target = 'mesautil',
source = mesautil_sources,
diff --git a/src/util/mesa-sha1.c b/src/util/mesa-sha1.c
deleted file mode 100644
index fa28193..0000000
--- a/src/util/mesa-sha1.c
+++ /dev/null
@@ -1,316 +0,0 @@
-/* Copyright © 2007 Carl Worth
- * Copyright © 2009 Jeremy Huddleston, Julien Cristau, and Matthieu Herrb
- * Copyright © 2009-2010 Mikhail Gusarov
- * Copyright © 2012 Yaakov Selkowitz and Keith Packard
- * Copyright © 2014 Intel Corporation
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- */
-
-#include "mesa-sha1.h"
-
-#if defined(HAVE_SHA1_IN_LIBMD) /* Use libmd for SHA1 */ \
- || defined(HAVE_SHA1_IN_LIBC) /* Use libc for SHA1 */
-
-#include <sha1.h>
-
-struct mesa_sha1 *
-_mesa_sha1_init(void)
-{
- SHA1_CTX *ctx = malloc(sizeof(*ctx));
-
- if (!ctx)
- return NULL;
-
- SHA1Init(ctx);
- return (struct mesa_sha1 *) ctx;
-}
-
-int
-_mesa_sha1_update(struct mesa_sha1 *ctx, const void *data, int size)
-{
- SHA1_CTX *sha1_ctx = (SHA1_CTX *) ctx;
-
- SHA1Update(sha1_ctx, data, size);
- return 1;
-}
-
-int
-_mesa_sha1_final(struct mesa_sha1 *ctx, unsigned char result[20])
-{
- SHA1_CTX *sha1_ctx = (SHA1_CTX *) ctx;
-
- SHA1Final(result, sha1_ctx);
- free(sha1_ctx);
- return 1;
-}
-
-#elif defined(HAVE_SHA1_IN_COMMONCRYPTO) /* Use CommonCrypto for SHA1 */
-
-#include <CommonCrypto/CommonDigest.h>
-
-struct mesa_sha1 *
-_mesa_sha1_init(void)
-{
- CC_SHA1_CTX *ctx = malloc(sizeof(*ctx));
-
- if (!ctx)
- return NULL;
-
- CC_SHA1_Init(ctx);
- return (struct mesa_sha1 *) ctx;
-}
-
-int
-_mesa_sha1_update(struct mesa_sha1 *ctx, const void *data, int size)
-{
- CC_SHA1_CTX *sha1_ctx = (CC_SHA1_CTX *) ctx;
-
- CC_SHA1_Update(sha1_ctx, data, size);
- return 1;
-}
-
-int
-_mesa_sha1_final(struct mesa_sha1 *ctx, unsigned char result[20])
-{
- CC_SHA1_CTX *sha1_ctx = (CC_SHA1_CTX *) ctx;
-
- CC_SHA1_Final(result, sha1_ctx);
- free(sha1_ctx);
- return 1;
-}
-
-#elif defined(HAVE_SHA1_IN_CRYPTOAPI) /* Use CryptoAPI for SHA1 */
-
-#define WIN32_LEAN_AND_MEAN
-#include <windows.h>
-#include <wincrypt.h>
-
-static HCRYPTPROV hProv;
-
-struct mesa_sha1 *
-_mesa_sha1_init(void)
-{
- HCRYPTHASH *ctx = malloc(sizeof(*ctx));
-
- if (!ctx)
- return NULL;
-
- CryptAcquireContext(&hProv, NULL, MS_DEF_PROV, PROV_RSA_FULL, CRYPT_VERIFYCONTEXT);
- CryptCreateHash(hProv, CALG_SHA1, 0, 0, ctx);
- return (struct mesa_sha1 *) ctx;
-}
-
-int
-_mesa_sha1_update(struct mesa_sha1 *ctx, const void *data, int size)
-{
- HCRYPTHASH *hHash = (HCRYPTHASH *) ctx;
-
- CryptHashData(*hHash, data, size, 0);
- return 1;
-}
-
-int
-_mesa_sha1_final(struct mesa_sha1 *ctx, unsigned char result[20])
-{
- HCRYPTHASH *hHash = (HCRYPTHASH *) ctx;
- DWORD len = 20;
-
- CryptGetHashParam(*hHash, HP_HASHVAL, result, &len, 0);
- CryptDestroyHash(*hHash);
- CryptReleaseContext(hProv, 0);
- free(ctx);
- return 1;
-}
-
-#elif defined(HAVE_SHA1_IN_LIBNETTLE) /* Use libnettle for SHA1 */
-
-#include <nettle/sha.h>
-
-struct mesa_sha1 *
-_mesa_sha1_init(void)
-{
- struct sha1_ctx *ctx = malloc(sizeof(*ctx));
-
- if (!ctx)
- return NULL;
- sha1_init(ctx);
- return (struct mesa_sha1 *) ctx;
-}
-
-int
-_mesa_sha1_update(struct mesa_sha1 *ctx, const void *data, int size)
-{
- sha1_update((struct sha1_ctx *) ctx, size, data);
- return 1;
-}
-
-int
-_mesa_sha1_final(struct mesa_sha1 *ctx, unsigned char result[20])
-{
- sha1_digest((struct sha1_ctx *) ctx, 20, result);
- free(ctx);
- return 1;
-}
-
-#elif defined(HAVE_SHA1_IN_LIBGCRYPT) /* Use libgcrypt for SHA1 */
-
-#include <gcrypt.h>
-
-struct mesa_sha1 *
-_mesa_sha1_init(void)
-{
- static int init;
- gcry_md_hd_t h;
- gcry_error_t err;
-
- if (!init) {
- if (!gcry_check_version(NULL))
- return NULL;
- gcry_control(GCRYCTL_DISABLE_SECMEM, 0);
- gcry_control(GCRYCTL_INITIALIZATION_FINISHED, 0);
- init = 1;
- }
-
- err = gcry_md_open(&h, GCRY_MD_SHA1, 0);
- if (err)
- return NULL;
- return (struct mesa_sha1 *) h;
-}
-
-int
-_mesa_sha1_update(struct mesa_sha1 *ctx, const void *data, int size)
-{
- gcry_md_hd_t h = (gcry_md_hd_t) ctx;
-
- gcry_md_write(h, data, size);
- return 1;
-}
-
-int
-_mesa_sha1_final(struct mesa_sha1 *ctx, unsigned char result[20])
-{
- gcry_md_hd_t h = (gcry_md_hd_t) ctx;
-
- memcpy(result, gcry_md_read(h, GCRY_MD_SHA1), 20);
- gcry_md_close(h);
- return 1;
-}
-
-#elif defined(HAVE_SHA1_IN_LIBSHA1) /* Use libsha1 */
-
-#include <libsha1.h>
-
-struct mesa_sha1 *
-_mesa_sha1_init(void)
-{
- sha1_ctx *ctx = malloc(sizeof(*ctx));
-
- if (!ctx)
- return NULL;
- sha1_begin(ctx);
- return (struct mesa_sha1 *) ctx;
-}
-
-int
-_mesa_sha1_update(struct mesa_sha1 *ctx, const void *data, int size)
-{
- sha1_hash(data, size, (sha1_ctx *) ctx);
- return 1;
-}
-
-int
-_mesa_sha1_final(struct mesa_sha1 *ctx, unsigned char result[20])
-{
- sha1_end(result, (sha1_ctx *) ctx);
- free(ctx);
- return 1;
-}
-
-#else /* Use OpenSSL's libcrypto */
-
-#include <stddef.h> /* buggy openssl/sha.h wants size_t */
-#include <openssl/sha.h>
-
-struct mesa_sha1 *
-_mesa_sha1_init(void)
-{
- int ret;
- SHA_CTX *ctx = malloc(sizeof(*ctx));
-
- if (!ctx)
- return NULL;
- ret = SHA1_Init(ctx);
- if (!ret) {
- free(ctx);
- return NULL;
- }
- return (struct mesa_sha1 *) ctx;
-}
-
-int
-_mesa_sha1_update(struct mesa_sha1 *ctx, const void *data, int size)
-{
- int ret;
- SHA_CTX *sha_ctx = (SHA_CTX *) ctx;
-
- ret = SHA1_Update(sha_ctx, data, size);
- if (!ret)
- free(sha_ctx);
- return ret;
-}
-
-int
-_mesa_sha1_final(struct mesa_sha1 *ctx, unsigned char result[20])
-{
- int ret;
- SHA_CTX *sha_ctx = (SHA_CTX *) ctx;
-
- ret = SHA1_Final(result, (SHA_CTX *) sha_ctx);
- free(sha_ctx);
- return ret;
-}
-
-#endif
-
-void
-_mesa_sha1_compute(const void *data, size_t size, unsigned char result[20])
-{
- struct mesa_sha1 *ctx;
-
- ctx = _mesa_sha1_init();
- _mesa_sha1_update(ctx, data, size);
- _mesa_sha1_final(ctx, result);
-}
-
-char *
-_mesa_sha1_format(char *buf, const unsigned char *sha1)
-{
- static const char hex_digits[] = "0123456789abcdef";
- int i;
-
- for (i = 0; i < 40; i += 2) {
- buf[i] = hex_digits[sha1[i >> 1] >> 4];
- buf[i + 1] = hex_digits[sha1[i >> 1] & 0x0f];
- }
- buf[i] = '\0';
-
- return buf;
-}
diff --git a/src/util/mesa-sha1.h b/src/util/mesa-sha1.h
deleted file mode 100644
index 1599405..0000000
--- a/src/util/mesa-sha1.h
+++ /dev/null
@@ -1,53 +0,0 @@
-/* Copyright © 2014 Intel Corporation
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- */
-
-#ifndef SHA1_H
-#define SHA1_H
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#include <stdlib.h>
-
-struct mesa_sha1;
-
-struct mesa_sha1 *
-_mesa_sha1_init(void);
-
-int
-_mesa_sha1_update(struct mesa_sha1 *ctx, const void *data, int size);
-
-int
-_mesa_sha1_final(struct mesa_sha1 *ctx, unsigned char result[20]);
-
-char *
-_mesa_sha1_format(char *buf, const unsigned char *sha1);
-
-void
-_mesa_sha1_compute(const void *data, size_t size, unsigned char result[20]);
-
-#ifdef __cplusplus
-} /* extern C */
-#endif
-
-#endif
commit a71223eb594cee382cde633b318fc43a6e85c1dd
Author: Andrey Sudnik <andrey.sudnik at intel.com>
Date: Thu Mar 5 11:16:49 2015 -0800
i965/vec4: Don't lose the saturate modifier in copy propagation.
Cc: 10.4, 10.5 <mesa-stable at lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89224
Reviewed-by: Matt Turner <mattst88 at gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
(cherry picked from commit 0dfec59a2785cf7a87ee5128889ecebe810b611b)
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_copy_propagation.cpp b/src/mesa/drivers/dri/i965/brw_vec4_copy_propagation.cpp
index 638d99a..10fa81b 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_copy_propagation.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_copy_propagation.cpp
@@ -428,7 +428,7 @@ vec4_visitor::opt_copy_propagation(bool do_constant_prop)
entries[reg].saturatemask = 0x0;
for (int i = 0; i < 4; i++) {
if (inst->dst.writemask & (1 << i)) {
- entries[reg].value[i] = direct_copy ? &inst->src[0] : NULL;
+ entries[reg].value[i] = (!inst->saturate && direct_copy) ? &inst->src[0] : NULL;
entries[reg].saturatemask |= (((inst->saturate && direct_copy) ? 1 : 0) << i);
}
}
commit 47a3ae1f20a5e936c2f4bed864dd2d9427ed651d
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Wed Mar 4 18:14:31 2015 -0800
i965: Split Gen4-5 BlitFramebuffer code; prefer BLT over Meta.
A while back I switched intel_blit_framebuffer to prefer Meta over the
BLT. This meant that Gen8 platforms would start using the 3D engine
for blits, just like we do on Gen6-7.5.
However, I hadn't considered Gen4-5 when making that change. The BLT
engine appears to be substantially faster on 965GM than using Meta to
drive the 3D engine. This isn't too surprising: original Gen4 doesn't
support tile offsets (that came on G45), and the level/layer fields
don't work for cubemap rendering, so for inconvenient miplevel
alignments, we end up blitting or copying data to/from temporaries
in order to render to it. We may as well just use the blitter.
I chose to use the BLT on Gen4-5 because they use the same ring for
both 3D and BLT; Gen6+ splits it out.
Fixes regressions on 965GM due to botched tile offset code (we should
fix those properly as well, but they're longstanding bugs - for now,
put things back to the status quo).
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89430
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen at intel.com>
Cc: "10.5" <mesa-stable at lists.freedesktop.org>
(cherry picked from commit aa0705c06c03d2b882ac7b185ed123bc8a10d716)
diff --git a/src/mesa/drivers/dri/i965/intel_fbo.c b/src/mesa/drivers/dri/i965/intel_fbo.c
index 174cea0..293b68e 100644
--- a/src/mesa/drivers/dri/i965/intel_fbo.c
+++ b/src/mesa/drivers/dri/i965/intel_fbo.c
@@ -916,6 +916,51 @@ intel_blit_framebuffer(struct gl_context *ctx,
}
/**
+ * Gen4-5 implementation of glBlitFrameBuffer().
+ *
+ * Tries BLT, Meta, then swrast.
+ *
+ * Gen4-5 have a single ring for both 3D and BLT operations, so there's no
+ * inter-ring synchronization issues like on Gen6+. It is apparently faster
+ * than using the 3D pipeline. Original Gen4 also has to rebase and copy
+ * miptree slices in order to render to unaligned locations.
+ */
+static void
+gen4_blit_framebuffer(struct gl_context *ctx,
+ struct gl_framebuffer *readFb,
+ struct gl_framebuffer *drawFb,
+ GLint srcX0, GLint srcY0, GLint srcX1, GLint srcY1,
+ GLint dstX0, GLint dstY0, GLint dstX1, GLint dstY1,
+ GLbitfield mask, GLenum filter)
+{
+ /* Page 679 of OpenGL 4.4 spec says:
+ * "Added BlitFramebuffer to commands affected by conditional rendering in
+ * section 10.10 (Bug 9562)."
+ */
+ if (!_mesa_check_conditional_render(ctx))
+ return;
+
+ mask = intel_blit_framebuffer_with_blitter(ctx, readFb, drawFb,
+ srcX0, srcY0, srcX1, srcY1,
+ dstX0, dstY0, dstX1, dstY1,
+ mask, filter);
+ if (mask == 0x0)
+ return;
+
+ mask = _mesa_meta_BlitFramebuffer(ctx, readFb, drawFb,
+ srcX0, srcY0, srcX1, srcY1,
+ dstX0, dstY0, dstX1, dstY1,
+ mask, filter);
+ if (mask == 0x0)
+ return;
+
+ _swrast_BlitFramebuffer(ctx, readFb, drawFb,
+ srcX0, srcY0, srcX1, srcY1,
+ dstX0, dstY0, dstX1, dstY1,
+ mask, filter);
+}
+
+/**
* Does the renderbuffer have hiz enabled?
*/
bool
@@ -1049,7 +1094,10 @@ intel_fbo_init(struct brw_context *brw)
dd->UnmapRenderbuffer = intel_unmap_renderbuffer;
dd->RenderTexture = intel_render_texture;
dd->ValidateFramebuffer = intel_validate_framebuffer;
- dd->BlitFramebuffer = intel_blit_framebuffer;
+ if (brw->gen >= 6)
+ dd->BlitFramebuffer = intel_blit_framebuffer;
+ else
+ dd->BlitFramebuffer = gen4_blit_framebuffer;
dd->EGLImageTargetRenderbufferStorage =
intel_image_target_renderbuffer_storage;
commit dbf974636af53d15cd9b0924262a1f29d21dcfb1
Author: Matt Turner <mattst88 at gmail.com>
Date: Wed Mar 4 15:21:53 2015 -0800
i965: Tell intel_get_memcpy() which direction the memcpy() is going.
The SSSE3 swizzling code was written for fast uploads to the GPU and
assumed the destination was always 16-byte aligned. When we began using
this code for fast downloads as well we didn't do anything to account
for the fact that the destination pointer given by glReadPixels() or
glGetTexImage() is not guaranteed to be suitably aligned.
With SSSE3 enabled (at compile-time), some applications would crash when
an SSE aligned-store instruction tried to store to an unaligned
destination (or an assertion that the destination is aligned would
trigger).
To remedy this, tell intel_get_memcpy() whether we're uploading or
downloading so that it can select whether to assume the destination or
source is aligned, respectively.
Cc: 10.5 <mesa-stable at lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89416
Tested-by: Uriy Zhuravlev <stalkerg at gmail.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand at intel.com>
(cherry picked from commit 2e4c95dfe2cb205c327ceaa12b44a9273bdb20dc)
diff --git a/src/mesa/drivers/dri/i965/intel_pixel_read.c b/src/mesa/drivers/dri/i965/intel_pixel_read.c
index df22a63..0972121 100644
--- a/src/mesa/drivers/dri/i965/intel_pixel_read.c
+++ b/src/mesa/drivers/dri/i965/intel_pixel_read.c
@@ -139,7 +139,8 @@ intel_readpixels_tiled_memcpy(struct gl_context * ctx,
rb->Format == MESA_FORMAT_R8G8B8X8_UNORM)
return false;
- if (!intel_get_memcpy(rb->Format, format, type, &mem_copy, &cpp))
+ if (!intel_get_memcpy(rb->Format, format, type, &mem_copy, &cpp,
+ INTEL_DOWNLOAD))
return false;
if (!irb->mt ||
diff --git a/src/mesa/drivers/dri/i965/intel_tex_image.c b/src/mesa/drivers/dri/i965/intel_tex_image.c
index 6eebfc4..d18e0bf 100644
--- a/src/mesa/drivers/dri/i965/intel_tex_image.c
+++ b/src/mesa/drivers/dri/i965/intel_tex_image.c
@@ -399,7 +399,8 @@ intel_gettexsubimage_tiled_memcpy(struct gl_context *ctx,
texImage->TexFormat == MESA_FORMAT_R8G8B8X8_UNORM)
return false;
- if (!intel_get_memcpy(texImage->TexFormat, format, type, &mem_copy, &cpp))
+ if (!intel_get_memcpy(texImage->TexFormat, format, type, &mem_copy, &cpp,
+ INTEL_DOWNLOAD))
return false;
/* If this is a nontrivial texture view, let another path handle it instead. */
diff --git a/src/mesa/drivers/dri/i965/intel_tex_subimage.c b/src/mesa/drivers/dri/i965/intel_tex_subimage.c
index 4262f71..909ff25 100644
--- a/src/mesa/drivers/dri/i965/intel_tex_subimage.c
+++ b/src/mesa/drivers/dri/i965/intel_tex_subimage.c
@@ -118,7 +118,8 @@ intel_texsubimage_tiled_memcpy(struct gl_context * ctx,
packing->Invert)
return false;
- if (!intel_get_memcpy(texImage->TexFormat, format, type, &mem_copy, &cpp))
+ if (!intel_get_memcpy(texImage->TexFormat, format, type, &mem_copy, &cpp,
+ INTEL_UPLOAD))
return false;
/* If this is a nontrivial texture view, let another path handle it instead. */
diff --git a/src/mesa/drivers/dri/i965/intel_tiled_memcpy.c b/src/mesa/drivers/dri/i965/intel_tiled_memcpy.c
index f2b35cb..2097aaa 100644
--- a/src/mesa/drivers/dri/i965/intel_tiled_memcpy.c
+++ b/src/mesa/drivers/dri/i965/intel_tiled_memcpy.c
@@ -60,42 +60,79 @@ static const uint32_t ytile_span = 16;
static const uint8_t rgba8_permutation[16] =
{ 2,1,0,3, 6,5,4,7, 10,9,8,11, 14,13,12,15 };
-/* NOTE: dst must be 16 byte aligned */
-#define rgba8_copy_16(dst, src) \
- *(__m128i *)(dst) = _mm_shuffle_epi8( \
- (__m128i) _mm_loadu_ps((float *)(src)), \
- *(__m128i *) rgba8_permutation \
- )
+/* NOTE: dst must be 16-byte aligned. src may be unaligned. */
+#define rgba8_copy_16_aligned_dst(dst, src) \
+ _mm_store_si128((__m128i *)(dst), \
+ _mm_shuffle_epi8(_mm_loadu_si128((__m128i *)(src)), \
+ *(__m128i *) rgba8_permutation))
+
+/* NOTE: src must be 16-byte aligned. dst may be unaligned. */
+#define rgba8_copy_16_aligned_src(dst, src) \
+ _mm_storeu_si128((__m128i *)(dst), \
+ _mm_shuffle_epi8(_mm_load_si128((__m128i *)(src)), \
+ *(__m128i *) rgba8_permutation))
#endif
/**
- * Copy RGBA to BGRA - swap R and B.
+ * Copy RGBA to BGRA - swap R and B, with the destination 16-byte aligned.
*/
static inline void *
-rgba8_copy(void *dst, const void *src, size_t bytes)
+rgba8_copy_aligned_dst(void *dst, const void *src, size_t bytes)
{
uint8_t *d = dst;
uint8_t const *s = src;
#ifdef __SSSE3__
- /* Fast copying for tile spans.
- *
- * As long as the destination texture is 16 aligned,
- * any 16 or 64 spans we get here should also be 16 aligned.
- */
-
if (bytes == 16) {
assert(!(((uintptr_t)dst) & 0xf));
- rgba8_copy_16(d+ 0, s+ 0);
+ rgba8_copy_16_aligned_dst(d+ 0, s+ 0);
return dst;
}
if (bytes == 64) {
assert(!(((uintptr_t)dst) & 0xf));
- rgba8_copy_16(d+ 0, s+ 0);
- rgba8_copy_16(d+16, s+16);
- rgba8_copy_16(d+32, s+32);
- rgba8_copy_16(d+48, s+48);
+ rgba8_copy_16_aligned_dst(d+ 0, s+ 0);
+ rgba8_copy_16_aligned_dst(d+16, s+16);
+ rgba8_copy_16_aligned_dst(d+32, s+32);
+ rgba8_copy_16_aligned_dst(d+48, s+48);
+ return dst;
+ }
+#endif
+
+ while (bytes >= 4) {
+ d[0] = s[2];
+ d[1] = s[1];
+ d[2] = s[0];
+ d[3] = s[3];
+ d += 4;
+ s += 4;
+ bytes -= 4;
+ }
+ return dst;
+}
+
+/**
+ * Copy RGBA to BGRA - swap R and B, with the source 16-byte aligned.
+ */
+static inline void *
+rgba8_copy_aligned_src(void *dst, const void *src, size_t bytes)
+{
+ uint8_t *d = dst;
+ uint8_t const *s = src;
+
+#ifdef __SSSE3__
+ if (bytes == 16) {
+ assert(!(((uintptr_t)src) & 0xf));
+ rgba8_copy_16_aligned_src(d+ 0, s+ 0);
+ return dst;
+ }
+
+ if (bytes == 64) {
+ assert(!(((uintptr_t)src) & 0xf));
+ rgba8_copy_16_aligned_src(d+ 0, s+ 0);
+ rgba8_copy_16_aligned_src(d+16, s+16);
+ rgba8_copy_16_aligned_src(d+32, s+32);
+ rgba8_copy_16_aligned_src(d+48, s+48);
return dst;
}
#endif
@@ -357,16 +394,18 @@ linear_to_xtiled_faster(uint32_t x0, uint32_t x1, uint32_t x2, uint32_t x3,
if (mem_copy == memcpy)
return linear_to_xtiled(0, 0, xtile_width, xtile_width, 0, xtile_height,
dst, src, src_pitch, swizzle_bit, memcpy);
- else if (mem_copy == rgba8_copy)
+ else if (mem_copy == rgba8_copy_aligned_dst)
return linear_to_xtiled(0, 0, xtile_width, xtile_width, 0, xtile_height,
- dst, src, src_pitch, swizzle_bit, rgba8_copy);
+ dst, src, src_pitch, swizzle_bit,
+ rgba8_copy_aligned_dst);
} else {
if (mem_copy == memcpy)
return linear_to_xtiled(x0, x1, x2, x3, y0, y1,
dst, src, src_pitch, swizzle_bit, memcpy);
- else if (mem_copy == rgba8_copy)
+ else if (mem_copy == rgba8_copy_aligned_dst)
return linear_to_xtiled(x0, x1, x2, x3, y0, y1,
- dst, src, src_pitch, swizzle_bit, rgba8_copy);
+ dst, src, src_pitch, swizzle_bit,
+ rgba8_copy_aligned_dst);
}
linear_to_xtiled(x0, x1, x2, x3, y0, y1,
dst, src, src_pitch, swizzle_bit, mem_copy);
@@ -393,16 +432,18 @@ linear_to_ytiled_faster(uint32_t x0, uint32_t x1, uint32_t x2, uint32_t x3,
if (mem_copy == memcpy)
return linear_to_ytiled(0, 0, ytile_width, ytile_width, 0, ytile_height,
dst, src, src_pitch, swizzle_bit, memcpy);
- else if (mem_copy == rgba8_copy)
+ else if (mem_copy == rgba8_copy_aligned_dst)
return linear_to_ytiled(0, 0, ytile_width, ytile_width, 0, ytile_height,
- dst, src, src_pitch, swizzle_bit, rgba8_copy);
+ dst, src, src_pitch, swizzle_bit,
+ rgba8_copy_aligned_dst);
} else {
if (mem_copy == memcpy)
return linear_to_ytiled(x0, x1, x2, x3, y0, y1,
dst, src, src_pitch, swizzle_bit, memcpy);
- else if (mem_copy == rgba8_copy)
+ else if (mem_copy == rgba8_copy_aligned_dst)
return linear_to_ytiled(x0, x1, x2, x3, y0, y1,
- dst, src, src_pitch, swizzle_bit, rgba8_copy);
+ dst, src, src_pitch, swizzle_bit,
+ rgba8_copy_aligned_dst);
}
linear_to_ytiled(x0, x1, x2, x3, y0, y1,
dst, src, src_pitch, swizzle_bit, mem_copy);
@@ -429,16 +470,18 @@ xtiled_to_linear_faster(uint32_t x0, uint32_t x1, uint32_t x2, uint32_t x3,
if (mem_copy == memcpy)
return xtiled_to_linear(0, 0, xtile_width, xtile_width, 0, xtile_height,
dst, src, dst_pitch, swizzle_bit, memcpy);
- else if (mem_copy == rgba8_copy)
+ else if (mem_copy == rgba8_copy_aligned_src)
return xtiled_to_linear(0, 0, xtile_width, xtile_width, 0, xtile_height,
- dst, src, dst_pitch, swizzle_bit, rgba8_copy);
+ dst, src, dst_pitch, swizzle_bit,
+ rgba8_copy_aligned_src);
} else {
if (mem_copy == memcpy)
return xtiled_to_linear(x0, x1, x2, x3, y0, y1,
dst, src, dst_pitch, swizzle_bit, memcpy);
- else if (mem_copy == rgba8_copy)
+ else if (mem_copy == rgba8_copy_aligned_src)
return xtiled_to_linear(x0, x1, x2, x3, y0, y1,
- dst, src, dst_pitch, swizzle_bit, rgba8_copy);
+ dst, src, dst_pitch, swizzle_bit,
+ rgba8_copy_aligned_src);
}
xtiled_to_linear(x0, x1, x2, x3, y0, y1,
dst, src, dst_pitch, swizzle_bit, mem_copy);
@@ -465,16 +508,18 @@ ytiled_to_linear_faster(uint32_t x0, uint32_t x1, uint32_t x2, uint32_t x3,
if (mem_copy == memcpy)
return ytiled_to_linear(0, 0, ytile_width, ytile_width, 0, ytile_height,
dst, src, dst_pitch, swizzle_bit, memcpy);
- else if (mem_copy == rgba8_copy)
+ else if (mem_copy == rgba8_copy_aligned_src)
return ytiled_to_linear(0, 0, ytile_width, ytile_width, 0, ytile_height,
- dst, src, dst_pitch, swizzle_bit, rgba8_copy);
+ dst, src, dst_pitch, swizzle_bit,
+ rgba8_copy_aligned_src);
} else {
if (mem_copy == memcpy)
return ytiled_to_linear(x0, x1, x2, x3, y0, y1,
dst, src, dst_pitch, swizzle_bit, memcpy);
- else if (mem_copy == rgba8_copy)
+ else if (mem_copy == rgba8_copy_aligned_src)
return ytiled_to_linear(x0, x1, x2, x3, y0, y1,
- dst, src, dst_pitch, swizzle_bit, rgba8_copy);
+ dst, src, dst_pitch, swizzle_bit,
+ rgba8_copy_aligned_src);
}
ytiled_to_linear(x0, x1, x2, x3, y0, y1,
dst, src, dst_pitch, swizzle_bit, mem_copy);
@@ -684,7 +729,8 @@ tiled_to_linear(uint32_t xt1, uint32_t xt2,
* \return true if the format and type combination are valid
*/
bool intel_get_memcpy(mesa_format tiledFormat, GLenum format,
- GLenum type, mem_copy_fn* mem_copy, uint32_t* cpp)
+ GLenum type, mem_copy_fn *mem_copy, uint32_t *cpp,
+ enum intel_memcpy_direction direction)
{
if (type == GL_UNSIGNED_INT_8_8_8_8_REV &&
!(format == GL_RGBA || format == GL_BGRA))
@@ -700,7 +746,8 @@ bool intel_get_memcpy(mesa_format tiledFormat, GLenum format,
if (format == GL_BGRA) {
*mem_copy = memcpy;
} else if (format == GL_RGBA) {
- *mem_copy = rgba8_copy;
+ *mem_copy = direction == INTEL_UPLOAD ? rgba8_copy_aligned_dst
+ : rgba8_copy_aligned_src;
}
} else if ((tiledFormat == MESA_FORMAT_R8G8B8A8_UNORM) ||
(tiledFormat == MESA_FORMAT_R8G8B8X8_UNORM)) {
@@ -709,7 +756,8 @@ bool intel_get_memcpy(mesa_format tiledFormat, GLenum format,
/* Copying from RGBA to BGRA is the same as BGRA to RGBA so we can
* use the same function.
*/
- *mem_copy = rgba8_copy;
+ *mem_copy = direction == INTEL_UPLOAD ? rgba8_copy_aligned_dst
+ : rgba8_copy_aligned_src;
} else if (format == GL_RGBA) {
*mem_copy = memcpy;
}
diff --git a/src/mesa/drivers/dri/i965/intel_tiled_memcpy.h b/src/mesa/drivers/dri/i965/intel_tiled_memcpy.h
index 3ff0d71..9dc1088 100644
--- a/src/mesa/drivers/dri/i965/intel_tiled_memcpy.h
+++ b/src/mesa/drivers/dri/i965/intel_tiled_memcpy.h
@@ -55,7 +55,20 @@ tiled_to_linear(uint32_t xt1, uint32_t xt2,
uint32_t tiling,
mem_copy_fn mem_copy);
+/* Tells intel_get_memcpy() whether the memcpy() is
+ *
+ * - an upload to the GPU with an aligned destination and a potentially
+ * unaligned source; or
+ * - a download from the GPU with an aligned source and a potentially
+ * unaligned destination.
+ */
+enum intel_memcpy_direction {
+ INTEL_UPLOAD,
+ INTEL_DOWNLOAD
+};
+
bool intel_get_memcpy(mesa_format tiledFormat, GLenum format,
- GLenum type, mem_copy_fn* mem_copy, uint32_t* cpp);
+ GLenum type, mem_copy_fn *mem_copy, uint32_t *cpp,
+ enum intel_memcpy_direction direction);
#endif /* INTEL_TILED_MEMCPY */
commit 35909f0e12fcb726e5f25fff7ff9a11293e054fd
Author: Emil Velikov <emil.l.velikov at gmail.com>
Date: Sat Mar 7 17:52:02 2015 +0000
mapi: fix commit 90411b56f6bc817e229d8801ac0adad6d4e3fb7a
Handle static glapi as well.
Signed-off-by: Emil Velikov <emil.l.velikov at gmail.com>
diff --git a/src/mapi/Makefile.am b/src/mapi/Makefile.am
index ab82e00..572f340 100644
--- a/src/mapi/Makefile.am
+++ b/src/mapi/Makefile.am
@@ -115,7 +115,7 @@ glapi_libglapi_la_CPPFLAGS = \
-I$(top_srcdir)/src/mesa
if HAVE_SHARED_GLAPI
-glapi_libglapi_la_SOURCES += $(MAPI_BRIDGE_FILES)
+glapi_libglapi_la_SOURCES += $(MAPI_BRIDGE_FILES) glapi/glapi_mapi_tmp.h
glapi_libglapi_la_CPPFLAGS += \
-DMAPI_MODE_BRIDGE \
-DMAPI_ABI_HEADER=\"glapi/glapi_mapi_tmp.h\"
commit b83333ac5b9eeae24739d47902e3fd75e9cfeaeb
Author: Emil Velikov <emil.l.velikov at gmail.com>
Date: Sat Mar 7 17:50:29 2015 +0000
cherry-ignore: ignore a few more commits picked without -x
Signed-off-by: Emil Velikov <emil.l.velikov at gmail.com>
diff --git a/bin/.cherry-ignore b/bin/.cherry-ignore
index e784b19..58c07fb 100644
--- a/bin/.cherry-ignore
+++ b/bin/.cherry-ignore
@@ -10,3 +10,14 @@
# auxiliary/vl: bring back the VL code for the dri targets
c39dbfdd0f764b1aaa7319b4694e7335692993dd
+
+# mesa: rename format_info.c to format_info.h
+3f6c28f2a976e35128b7a4a513cfa60af00301e1
+# mesa: fix dependency tracking of generated sources
+d22391cb165af4ed2f9a9e5d6233072a432cc969
+# mesa: drop Makefile from get_hash.h dependency list
+2c0f72d5389a9838cc4fbf4cc4f4291aa56c7845
+# mapi: fix *glapi dependency tracking
+fe5fddd7e2df74233a2a02ae021418485f39d11c
+# xmlpool: make sure we ship options.h
+8d8ca64c28170ec7e9ffa01638bcf8fd30a96088
commit 30079d6846124e9580335393f75464f8b65149fe
Author: Emil Velikov <emil.l.velikov at gmail.com>
Date: Sat Feb 28 17:20:01 2015 +0000
egl/main: no longer export internal function
With the split of the gallium egl module we had previously it required
access to some of the internal functions. As the only build (automake)
that did this no longer builds it we can now appropriately hide those
functions.
Cc: 10.5 <mesa-stable at lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov at gmail.com>
Reviewed-by: Matt Turner <mattst88 at gmail.com>
Reviewed-by: Brian Paul <brianp at vmware.com>
(cherry picked from commit dd438ae34bdbaa6651cdd226d5fec15a892923bf)
diff --git a/src/egl/main/eglarray.h b/src/egl/main/eglarray.h
index d07f301..da95a90 100644
--- a/src/egl/main/eglarray.h
+++ b/src/egl/main/eglarray.h
@@ -49,7 +49,7 @@ extern _EGLArray *
_eglCreateArray(const char *name, EGLint init_size);
-PUBLIC void
+extern void
_eglDestroyArray(_EGLArray *array, void (*free_cb)(void *));
@@ -65,7 +65,7 @@ void *
_eglFindArray(_EGLArray *array, void *elem);
-PUBLIC EGLint
+extern EGLint
_eglFilterArray(_EGLArray *array, void **data, EGLint size,
_EGLArrayForEach filter, void *filter_data);
diff --git a/src/egl/main/eglconfig.c b/src/egl/main/eglconfig.c
index 1ac716c..c365312 100644
--- a/src/egl/main/eglconfig.c
+++ b/src/egl/main/eglconfig.c
@@ -75,7 +75,7 @@ _eglInitConfig(_EGLConfig *conf, _EGLDisplay *dpy, EGLint id)
*
* Note that we just save the ptr to the config (we don't copy the config).
*/
-PUBLIC EGLConfig
+EGLConfig
_eglLinkConfig(_EGLConfig *conf)
{
_EGLDisplay *dpy = conf->Display;
diff --git a/src/egl/main/eglconfig.h b/src/egl/main/eglconfig.h
index b00f872..81a4666 100644
--- a/src/egl/main/eglconfig.h
+++ b/src/egl/main/eglconfig.h
@@ -162,11 +162,11 @@ _eglGetConfigKey(const _EGLConfig *conf, EGLint key)
}
-PUBLIC void
+extern void
_eglInitConfig(_EGLConfig *config, _EGLDisplay *dpy, EGLint id);
-PUBLIC EGLConfig
+extern EGLConfig
_eglLinkConfig(_EGLConfig *conf);
@@ -184,25 +184,25 @@ _eglGetConfigHandle(_EGLConfig *conf)
}
-PUBLIC EGLBoolean
+extern EGLBoolean
_eglValidateConfig(const _EGLConfig *conf, EGLBoolean for_matching);
-PUBLIC EGLBoolean
+extern EGLBoolean
_eglMatchConfig(const _EGLConfig *conf, const _EGLConfig *criteria);
-PUBLIC EGLBoolean
+extern EGLBoolean
_eglParseConfigAttribList(_EGLConfig *conf, _EGLDisplay *dpy,
const EGLint *attrib_list);
-PUBLIC EGLint
+extern EGLint
_eglCompareConfigs(const _EGLConfig *conf1, const _EGLConfig *conf2,
const _EGLConfig *criteria, EGLBoolean compare_id);
-PUBLIC EGLBoolean
+extern EGLBoolean
_eglFilterConfigArray(_EGLArray *array, EGLConfig *configs,
EGLint config_size, EGLint *num_configs,
EGLBoolean (*match)(const _EGLConfig *, void *),
diff --git a/src/egl/main/eglcontext.h b/src/egl/main/eglcontext.h
index 73badc5..3000a81 100644
--- a/src/egl/main/eglcontext.h
+++ b/src/egl/main/eglcontext.h
@@ -63,7 +63,7 @@ struct _egl_context
};
-PUBLIC EGLBoolean
+extern EGLBoolean
_eglInitContext(_EGLContext *ctx, _EGLDisplay *dpy,
_EGLConfig *config, const EGLint *attrib_list);
@@ -72,7 +72,7 @@ extern EGLBoolean
_eglQueryContext(_EGLDriver *drv, _EGLDisplay *dpy, _EGLContext *ctx, EGLint attribute, EGLint *value);
-PUBLIC EGLBoolean
+extern EGLBoolean
_eglBindContext(_EGLContext *ctx, _EGLSurface *draw, _EGLSurface *read,
_EGLContext **old_ctx,
_EGLSurface **old_draw, _EGLSurface **old_read);
diff --git a/src/egl/main/eglcurrent.c b/src/egl/main/eglcurrent.c
index fcb732d..5c83e98 100644
--- a/src/egl/main/eglcurrent.c
+++ b/src/egl/main/eglcurrent.c
@@ -242,7 +242,7 @@ _eglIsCurrentThreadDummy(void)
/**
* Return the currently bound context of the given API, or NULL.
*/
-PUBLIC _EGLContext *
+_EGLContext *
_eglGetAPIContext(EGLenum api)
{
_EGLThreadInfo *t = _eglGetCurrentThread();
diff --git a/src/egl/main/eglcurrent.h b/src/egl/main/eglcurrent.h
index 45fcc64..0739873 100644
--- a/src/egl/main/eglcurrent.h
+++ b/src/egl/main/eglcurrent.h
@@ -90,7 +90,7 @@ _eglConvertApiFromIndex(EGLint idx)
}
-PUBLIC _EGLThreadInfo *
+extern _EGLThreadInfo *
_eglGetCurrentThread(void);
@@ -102,15 +102,15 @@ extern EGLBoolean
_eglIsCurrentThreadDummy(void);
-PUBLIC _EGLContext *
+extern _EGLContext *
_eglGetAPIContext(EGLenum api);
-PUBLIC _EGLContext *
+extern _EGLContext *
_eglGetCurrentContext(void);
-PUBLIC EGLBoolean
+extern EGLBoolean
_eglError(EGLint errCode, const char *msg);
diff --git a/src/egl/main/egldisplay.h b/src/egl/main/egldisplay.h
index bcdc2b2..3ebceaf 100644
--- a/src/egl/main/egldisplay.h
+++ b/src/egl/main/egldisplay.h
@@ -177,11 +177,11 @@ extern _EGLDisplay *
_eglFindDisplay(_EGLPlatformType plat, void *plat_dpy);
-PUBLIC void
+extern void
_eglReleaseDisplayResources(_EGLDriver *drv, _EGLDisplay *dpy);
-PUBLIC void
+extern void
_eglCleanupDisplay(_EGLDisplay *disp);
@@ -189,7 +189,7 @@ extern EGLBoolean
_eglCheckDisplayHandle(EGLDisplay dpy);
-PUBLIC EGLBoolean
+extern EGLBoolean
_eglCheckResource(void *res, _EGLResourceType type, _EGLDisplay *dpy);
@@ -221,11 +221,11 @@ extern void
_eglInitResource(_EGLResource *res, EGLint size, _EGLDisplay *dpy);
-PUBLIC void
+extern void
_eglGetResource(_EGLResource *res);
-PUBLIC EGLBoolean
+extern EGLBoolean
_eglPutResource(_EGLResource *res);
diff --git a/src/egl/main/egldriver.h b/src/egl/main/egldriver.h
index e34f19f..5ec2c6f 100644
--- a/src/egl/main/egldriver.h
+++ b/src/egl/main/egldriver.h
@@ -96,7 +96,7 @@ extern _EGLDriver *
_eglBuiltInDriverGLX(const char *args);
-PUBLIC _EGLDriver *
+extern _EGLDriver *
_eglMain(const char *args);
@@ -113,11 +113,11 @@ _eglUnloadDrivers(void);
/* defined in eglfallbacks.c */
-PUBLIC void
+extern void
_eglInitDriverFallbacks(_EGLDriver *drv);
-PUBLIC void
+extern void
_eglSearchPathForEach(EGLBoolean (*callback)(const char *, size_t, void *),
void *callback_data);
diff --git a/src/egl/main/eglimage.h b/src/egl/main/eglimage.h
index 1b4d6cd..4335499 100644
--- a/src/egl/main/eglimage.h
+++ b/src/egl/main/eglimage.h
@@ -80,12 +80,12 @@ struct _egl_image
};
-PUBLIC EGLint
+extern EGLint
_eglParseImageAttribList(_EGLImageAttribs *attrs, _EGLDisplay *dpy,
const EGLint *attrib_list);
-PUBLIC EGLBoolean
+extern EGLBoolean
_eglInitImage(_EGLImage *img, _EGLDisplay *dpy);
diff --git a/src/egl/main/egllog.h b/src/egl/main/egllog.h
index bac5720..12a477e 100644
--- a/src/egl/main/egllog.h
+++ b/src/egl/main/egllog.h
@@ -43,15 +43,15 @@
typedef void (*_EGLLogProc)(EGLint level, const char *msg);
-PUBLIC void
+extern void
_eglSetLogProc(_EGLLogProc logger);
-PUBLIC void
+extern void
_eglSetLogLevel(EGLint level);
-PUBLIC void
+extern void
_eglLog(EGLint level, const char *fmtStr, ...);
diff --git a/src/egl/main/eglscreen.h b/src/egl/main/eglscreen.h
index 1cede44..555cee5 100644
--- a/src/egl/main/eglscreen.h
+++ b/src/egl/main/eglscreen.h
@@ -67,11 +67,11 @@ struct _egl_screen
};
-PUBLIC void
+extern void
_eglInitScreen(_EGLScreen *screen, _EGLDisplay *dpy, EGLint num_modes);
-PUBLIC EGLScreenMESA
+extern EGLScreenMESA
_eglLinkScreen(_EGLScreen *screen);
diff --git a/src/egl/main/eglsurface.h b/src/egl/main/eglsurface.h
index d13d301..d00917e 100644
--- a/src/egl/main/eglsurface.h
+++ b/src/egl/main/eglsurface.h
@@ -78,7 +78,7 @@ struct _egl_surface
};
-PUBLIC EGLBoolean
+extern EGLBoolean
_eglInitSurface(_EGLSurface *surf, _EGLDisplay *dpy, EGLint type,
_EGLConfig *config, const EGLint *attrib_list);
@@ -91,10 +91,10 @@ extern EGLBoolean
_eglSurfaceAttrib(_EGLDriver *drv, _EGLDisplay *dpy, _EGLSurface *surf, EGLint attribute, EGLint value);
-PUBLIC extern EGLBoolean
+extern EGLBoolean
_eglBindTexImage(_EGLDriver *drv, _EGLDisplay *dpy, _EGLSurface *surf, EGLint buffer);
-PUBLIC extern EGLBoolean
+extern EGLBoolean
_eglReleaseTexImage(_EGLDriver *drv, _EGLDisplay *disp, _EGLSurface *surf, EGLint buffer);
diff --git a/src/egl/main/eglsync.h b/src/egl/main/eglsync.h
index 9708d09..fc2058f 100644
--- a/src/egl/main/eglsync.h
+++ b/src/egl/main/eglsync.h
@@ -48,7 +48,7 @@ struct _egl_sync
};
-PUBLIC EGLBoolean
+extern EGLBoolean
_eglInitSync(_EGLSync *sync, _EGLDisplay *dpy, EGLenum type,
const EGLint *attrib_list);
commit e5eab59b576fd7c1c2bcb78dcca899331fb3f5e9
Author: Matt Turner <mattst88 at gmail.com>
Date: Fri Feb 27 10:22:21 2015 -0800
i965/fs: Don't propagate cmod to inst with different type.
Cc: 10.5 <mesa-stable at lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89317
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
(cherry picked from commit 1e128e9b69c6336762a2b6ee5d356c763b9ae3b0)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_cmod_propagation.cpp b/src/mesa/drivers/dri/i965/brw_fs_cmod_propagation.cpp
index c6384ab..58890ee 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_cmod_propagation.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_cmod_propagation.cpp
@@ -80,6 +80,10 @@ opt_cmod_propagation_local(fs_visitor *v, bblock_t *block)
scan_inst->dst.reg_offset != inst->src[0].reg_offset)
break;
+ /* Comparisons operate differently for ints and floats */
+ if (scan_inst->dst.type != inst->dst.type)
+ break;
+
/* If the instruction generating inst's source also wrote the
* flag, and inst is doing a simple .nz comparison, then inst
* is redundant - the appropriate value is already in the flag
diff --git a/src/mesa/drivers/dri/i965/test_fs_cmod_propagation.cpp b/src/mesa/drivers/dri/i965/test_fs_cmod_propagation.cpp
index fbe4fd9..cb92abf 100644
--- a/src/mesa/drivers/dri/i965/test_fs_cmod_propagation.cpp
+++ b/src/mesa/drivers/dri/i965/test_fs_cmod_propagation.cpp
@@ -415,3 +415,37 @@ TEST_F(cmod_propagation_test, movnz)
EXPECT_EQ(BRW_OPCODE_CMP, instruction(block0, 0)->opcode);
EXPECT_EQ(BRW_CONDITIONAL_GE, instruction(block0, 0)->conditional_mod);
}
+
+TEST_F(cmod_propagation_test, different_types_cmod_with_zero)
+{
+ fs_reg dest = v->vgrf(glsl_type::int_type);
+ fs_reg src0 = v->vgrf(glsl_type::int_type);
+ fs_reg src1 = v->vgrf(glsl_type::int_type);
+ fs_reg zero(0.0f);
+ v->emit(BRW_OPCODE_ADD, dest, src0, src1);
+ v->emit(BRW_OPCODE_CMP, v->reg_null_f, retype(dest, BRW_REGISTER_TYPE_F),
+ zero)
+ ->conditional_mod = BRW_CONDITIONAL_GE;
+
+ /* = Before =
+ *
+ * 0: add(8) dest:D src0:D src1:D
+ * 1: cmp.ge.f0(8) null:F dest:F 0.0f
+ *
+ * = After =
+ * (no changes)
+ */
+
+ v->calculate_cfg();
+ bblock_t *block0 = v->cfg->blocks[0];
+
+ EXPECT_EQ(0, block0->start_ip);
+ EXPECT_EQ(1, block0->end_ip);
+
+ EXPECT_FALSE(cmod_propagation(v));
+ EXPECT_EQ(0, block0->start_ip);
+ EXPECT_EQ(1, block0->end_ip);
+ EXPECT_EQ(BRW_OPCODE_ADD, instruction(block0, 0)->opcode);
+ EXPECT_EQ(BRW_OPCODE_CMP, instruction(block0, 1)->opcode);
+ EXPECT_EQ(BRW_CONDITIONAL_GE, instruction(block0, 1)->conditional_mod);
+}
commit 57f54b067b5c6d4fbf3ceb2bc1138aed8c913c8a
Author: Matt Turner <mattst88 at gmail.com>
Date: Tue Mar 3 16:09:58 2015 -0800
r300g: Check return value of snprintf().
Would have at least prevented the crash the previous patch fixed.
Cc: 10.4, 10.5 <mesa-stable at lists.freedesktop.org>
Bugzilla: https://bugs.gentoo.org/show_bug.cgi?id=540970
Reviewed-by: Tom Stellard <thomas.stellard at amd.com>
(cherry picked from commit ade0b580e75bdea227eec5345f6681b678d0811b)
diff --git a/src/gallium/drivers/r300/compiler/tests/rc_test_helpers.c b/src/gallium/drivers/r300/compiler/tests/rc_test_helpers.c
index 422bdb0..04c01f1 100644
--- a/src/gallium/drivers/r300/compiler/tests/rc_test_helpers.c
+++ b/src/gallium/drivers/r300/compiler/tests/rc_test_helpers.c
@@ -541,9 +541,14 @@ unsigned load_program(
unsigned *count;
char **string_store;
unsigned i = 0;
+ int n;
memset(line, 0, sizeof(line));
- snprintf(path, PATH_MAX, TEST_PATH "/%s", filename);
+ n = snprintf(path, PATH_MAX, TEST_PATH "/%s", filename);
+ if (n < 0 || n >= PATH_MAX) {
+ return 0;
+ }
+
file = fopen(path, "r");
if (!file) {
return 0;
commit e0670715bc511bb814ab42b10d9608a93d6ba439
Author: Matt Turner <mattst88 at gmail.com>
Date: Tue Mar 3 16:02:40 2015 -0800
r300g: Use PATH_MAX instead of limiting ourselves to 100 chars.
When built with Gentoo's package manager, the Mesa source directory
exists seven directories deep. The path to the .test file is too long
and is silently truncated, leading to a crash. Just use PATH_MAX.
Cc: 10.4, 10.5 <mesa-stable at lists.freedesktop.org>
Bugzilla: https://bugs.gentoo.org/show_bug.cgi?id=540970
Reviewed-by: Tom Stellard <thomas.stellard at amd.com>
(cherry picked from commit f5e2aa1324dd6a9666bb21834097d2fbc3cb99b6)
diff --git a/src/gallium/drivers/r300/compiler/tests/rc_test_helpers.c b/src/gallium/drivers/r300/compiler/tests/rc_test_helpers.c
index 7c9d177..422bdb0 100644
--- a/src/gallium/drivers/r300/compiler/tests/rc_test_helpers.c
+++ b/src/gallium/drivers/r300/compiler/tests/rc_test_helpers.c
@@ -28,6 +28,7 @@
*/
#include <errno.h>
+#include <limits.h>
#include <regex.h>
#include <stdlib.h>
#include <stdio.h>
@@ -528,7 +529,6 @@ void init_compiler(
}
#define MAX_LINE_LENGTH 100
-#define MAX_PATH_LENGTH 100
unsigned load_program(
struct radeon_compiler *c,
@@ -536,14 +536,14 @@ unsigned load_program(
const char *filename)
{
char line[MAX_LINE_LENGTH];
- char path[MAX_PATH_LENGTH];
+ char path[PATH_MAX];
FILE *file;
unsigned *count;
char **string_store;
unsigned i = 0;
memset(line, 0, sizeof(line));
- snprintf(path, MAX_PATH_LENGTH, TEST_PATH "/%s", filename);
+ snprintf(path, PATH_MAX, TEST_PATH "/%s", filename);
file = fopen(path, "r");
if (!file) {
return 0;
commit 8357abf4c3a7ea7f2c4e2dcc4381333a979a0758
Author: Daniel Stone <daniels at collabora.com>
Date: Mon Mar 2 13:52:59 2015 +0000
egl: Take alpha bits into account when selecting GBM formats
This fixes piglit when using PIGLIT_PLATFORM=gbm
Tom Stellard:
- Fix ARGB2101010 format
Cc: "10.4 10.5" <mesa-stable at lists.freedesktop.org>
Reviewed-by: Alex Deucher <alexander.deucher at amd.com>
Reviewed-by: Chad Versace <chad.versace at intel.com>
(cherry picked from commit 65c8965d033cf9ade5e6f3c88bda6d247d46af9d)
diff --git a/src/egl/drivers/dri2/platform_drm.c b/src/egl/drivers/dri2/platform_drm.c
index 02e87f7..bf205be 100644
--- a/src/egl/drivers/dri2/platform_drm.c
+++ b/src/egl/drivers/dri2/platform_drm.c
@@ -668,15 +668,21 @@ dri2_initialize_drm(_EGLDriver *drv, _EGLDisplay *disp)
for (i = 0; dri2_dpy->driver_configs[i]; i++) {
EGLint format, attr_list[3];
- unsigned int mask;
+ unsigned int red, alpha;
dri2_dpy->core->getConfigAttrib(dri2_dpy->driver_configs[i],
- __DRI_ATTRIB_RED_MASK, &mask);
- if (mask == 0x3ff00000)
+ __DRI_ATTRIB_RED_MASK, &red);
+ dri2_dpy->core->getConfigAttrib(dri2_dpy->driver_configs[i],
+ __DRI_ATTRIB_ALPHA_MASK, &alpha);
+ if (red == 0x3ff00000 && alpha == 0x00000000)
format = GBM_FORMAT_XRGB2101010;
- else if (mask == 0x00ff0000)
+ else if (red == 0x3ff00000 && alpha == 0xc0000000)
+ format = GBM_FORMAT_ARGB2101010;
+ else if (red == 0x00ff0000 && alpha == 0x00000000)
format = GBM_FORMAT_XRGB8888;
- else if (mask == 0xf800)
+ else if (red == 0x00ff0000 && alpha == 0xff000000)
+ format = GBM_FORMAT_ARGB8888;
+ else if (red == 0xf800)
format = GBM_FORMAT_RGB565;
else
continue;
commit b0f60c891aed6340a4c4e4d1dbf594b97c404d4f
Author: Marc-Andre Lureau <marcandre.lureau at gmail.com>
Date: Fri Feb 27 19:40:19 2015 +0100
gallium/auxiliary/indices: fix start param
Since commit 28f3f8d, indices generator take a start parameter. However, some
index values have been left to start at 0.
This fixes the glean/fbo test with the virgl driver, and copytexsubimage
with freedreno.
Reviewed-by: Ilia Mirkin <imirkin at alum.mit.edu>
Cc: "10.4 10.5" <mesa-stable at lists.freedesktop.org>
(cherry picked from commit 073a5d2e84ac9d95f0d037aeb04889822e76aa4e)
diff --git a/src/gallium/auxiliary/indices/u_indices_gen.py b/src/gallium/auxiliary/indices/u_indices_gen.py
index 2714df8..f05b70a 100644
--- a/src/gallium/auxiliary/indices/u_indices_gen.py
+++ b/src/gallium/auxiliary/indices/u_indices_gen.py
@@ -193,7 +193,7 @@ def lineloop(intype, outtype, inpv, outpv):
print ' for (i = start, j = 0; j < nr - 2; j+=2, i++) { '
do_line( intype, outtype, 'out+j', 'i', 'i+1', inpv, outpv );
print ' }'
- do_line( intype, outtype, 'out+j', 'i', '0', inpv, outpv );
+ do_line( intype, outtype, 'out+j', 'i', 'start', inpv, outpv );
postamble()
def tris(intype, outtype, inpv, outpv):
@@ -218,7 +218,7 @@ def tristrip(intype, outtype, inpv, outpv):
def trifan(intype, outtype, inpv, outpv):
preamble(intype, outtype, inpv, outpv, prim='trifan')
print ' for (i = start, j = 0; j < nr; j+=3, i++) { '
- do_tri( intype, outtype, 'out+j', '0', 'i+1', 'i+2', inpv, outpv );
+ do_tri( intype, outtype, 'out+j', 'start', 'i+1', 'i+2', inpv, outpv );
print ' }'
postamble()
@@ -228,9 +228,9 @@ def polygon(intype, outtype, inpv, outpv):
preamble(intype, outtype, inpv, outpv, prim='polygon')
print ' for (i = start, j = 0; j < nr; j+=3, i++) { '
if inpv == FIRST:
- do_tri( intype, outtype, 'out+j', '0', 'i+1', 'i+2', inpv, outpv );
+ do_tri( intype, outtype, 'out+j', 'start', 'i+1', 'i+2', inpv, outpv );
else:
- do_tri( intype, outtype, 'out+j', 'i+1', 'i+2', '0', inpv, outpv );
+ do_tri( intype, outtype, 'out+j', 'i+1', 'i+2', 'start', inpv, outpv );
print ' }'
postamble()
commit 73efd2891f9e044c89e9d24ac4b93931c02ea2fc
Author: Matt Turner <mattst88 at gmail.com>
Date: Tue Jan 13 15:35:57 2015 -0800
i965/fs: Don't use backend_visitor::instructions after creating the CFG.
This is a fix for a regression introduced in commit a9f8296d ("i965/fs:
Preserve the CFG in a few more places.").
The errata this code works around is described in a comment before the function:
"[DevBW, DevCL] Errata: A destination register from a send can not be
used as a destination register until after it has been sourced by an
instruction with a different destination register.
The framebuffer write's sources must be in message registers, which SEND
instructions cannot have as a destination. There's no way for this
errata to affect anything at the end of the program. Just remove the
code.
Cc: 10.4, 10.5 <mesa-stable at lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=84613
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
(cherry picked from commit e214000f258ae564e64d839cccee9418526f226b)
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp
index 200a494..1fc8cca 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
@@ -2956,16 +2956,6 @@ fs_visitor::insert_gen4_post_send_dependency_workarounds(bblock_t *block, fs_ins
if (i == write_len)
return;
}
-
- /* If we hit the end of the program, resolve all remaining dependencies out
- * of paranoia.
- */
- fs_inst *last_inst = (fs_inst *)this->instructions.get_tail();
- assert(last_inst->eot);
- for (int i = 0; i < write_len; i++) {
- if (needs_dep[i])
- last_inst->insert_before(block, DEP_RESOLVE_MOV(first_write_grf + i));
- }
}
void
commit 73f8e342a7d33e296eb7a92b3dffae55a66f8f9f
Author: Jason Ekstrand <jason at jlekstrand.net>
Date: Fri Feb 27 18:53:11 2015 -0500
main/base_tex_format: Properly handle STENCIL_INDEX1/4/16
This takes "fbo-stencil blit GL_STENCIL_INDEX1/4/16" from crash to pass on
BDW.
Cc: 10.5 <mesa-stable at lists.freedesktop.org>
Reviewed-by: Matt Turner <mattst88 at gmail.com>
(cherry picked from commit c4925d7f3b66d63fbdd7b7607cd809db1e58bee9)
diff --git a/src/mesa/main/teximage.c b/src/mesa/main/teximage.c
index c9c48bb..74a306a 100644
--- a/src/mesa/main/teximage.c
+++ b/src/mesa/main/teximage.c
@@ -224,7 +224,10 @@ _mesa_base_tex_format( struct gl_context *ctx, GLint internalFormat )
if (ctx->Extensions.ARB_stencil_texturing) {
switch (internalFormat) {
case GL_STENCIL_INDEX:
+ case GL_STENCIL_INDEX1:
+ case GL_STENCIL_INDEX4:
case GL_STENCIL_INDEX8:
+ case GL_STENCIL_INDEX16:
return GL_STENCIL_INDEX;
default:
; /* fallthrough */
commit 53d66c0c7c39fbe2a587a849e0714d6f9a01f476
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Fri Feb 27 12:29:03 2015 -0800
meta/TexSubImage: Stash everything other than PIXEL_TRANSFER/store in meta_begin
Previously, there were bugs where if the app set a scissor it could affect
the area of the texture that was downloaded. There was also potential that
the framebuffer SRGB state could affect downloads. This ensures that those
will get saved/restored and can't affect the texture download.
Cc: 10.5 <mesa-stable at lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89292
Reviewed-by: Neil Roberts <neil at linux.intel.com>
(cherry picked from commit b1ab02d9c0cc11ba8ef4efaba9452d644b6a0811)
diff --git a/src/mesa/drivers/common/meta_tex_subimage.c b/src/mesa/drivers/common/meta_tex_subimage.c
index ffbbacd..9f0c115 100644
--- a/src/mesa/drivers/common/meta_tex_subimage.c
+++ b/src/mesa/drivers/common/meta_tex_subimage.c
@@ -183,8 +183,8 @@ _mesa_meta_pbo_TexSubImage(struct gl_context *ctx, GLuint dims,
if (allocate_storage)
ctx->Driver.AllocTextureImageBuffer(ctx, tex_image);
- /* Only stash the current FBO */
- _mesa_meta_begin(ctx, 0);
+ _mesa_meta_begin(ctx, ~(MESA_META_PIXEL_TRANSFER |
+ MESA_META_PIXEL_STORE));
_mesa_GenFramebuffers(2, fbos);
_mesa_BindFramebuffer(GL_READ_FRAMEBUFFER, fbos[0]);
@@ -304,8 +304,8 @@ _mesa_meta_pbo_GetTexSubImage(struct gl_context *ctx, GLuint dims,
if (!pbo_tex_image)
return false;
- /* Only stash the current FBO */
- _mesa_meta_begin(ctx, 0);
+ _mesa_meta_begin(ctx, ~(MESA_META_PIXEL_TRANSFER |
+ MESA_META_PIXEL_STORE));
_mesa_GenFramebuffers(2, fbos);
commit 560fb4ee450659ed603338301f8d0af827d56f16
Author: Matt Turner <mattst88 at gmail.com>
Date: Sat Feb 28 13:36:21 2015 -0800
i965: Consider scratch writes to have side effects.
We could do better by tracking scratch reads and writes.
Cc: 10.5 <mesa-stable at lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=88793
Reviewed-by: Jason Ekstrand <jason.ekstrand at intel.com>
(cherry picked from commit da20bf068ef0f816968d9bc4dfea81facf0fd680)
diff --git a/src/mesa/drivers/dri/i965/brw_shader.cpp b/src/mesa/drivers/dri/i965/brw_shader.cpp
index 31ce3db..69d3a91 100644
--- a/src/mesa/drivers/dri/i965/brw_shader.cpp
+++ b/src/mesa/drivers/dri/i965/brw_shader.cpp
@@ -945,6 +945,7 @@ backend_instruction::has_side_effects() const
{
switch (opcode) {
case SHADER_OPCODE_UNTYPED_ATOMIC:
+ case SHADER_OPCODE_GEN4_SCRATCH_WRITE:
case SHADER_OPCODE_URB_WRITE_SIMD8:
case FS_OPCODE_FB_WRITE:
return true;
commit 446aa309e18e0c5a6335d7dd9688a4e521d29043
Author: Matt Turner <mattst88 at gmail.com>
Date: Sat Feb 28 11:14:02 2015 -0800
mesa: Correct backwards NULL check.
Cc: "10.4, 10.5" <mesa-stable at lists.freedesktop.org>
Reviewed-by: Emil Velikov <emil.l.velikov at gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
(cherry picked from commit 491d42135ad0e5670756216154f2ba9fc79d4ba7)
diff --git a/src/mesa/main/shaderapi.c b/src/mesa/main/shaderapi.c
index 52eab46..dad61f4 100644
--- a/src/mesa/main/shaderapi.c
+++ b/src/mesa/main/shaderapi.c
@@ -1713,7 +1713,7 @@ _mesa_GetProgramBinary(GLuint program, GLsizei bufSize, GLsizei *length,
* Ensure that length always points to valid storage to avoid multiple NULL
* pointer checks below.
*/
- if (length != NULL)
+ if (length == NULL)
length = &length_dummy;
commit 4c45e239385473da58d79100b0af25bd0b9edf9c
Author: Matt Turner <mattst88 at gmail.com>
Date: Sat Feb 28 11:08:17 2015 -0800
mesa: Free memory allocated for luminance in readpixels.
Cc: "10.4, 10.5" <mesa-stable at lists.freedesktop.org>
Reviewed-by: Brian Paul <brianp at vmware.com>
Reviewed-by: Iago Toral Quiroga <itoral at igalia.com>
(cherry picked from commit 87109acbed9c9b52f33d58ca06d9048d0ac7a215)
diff --git a/src/mesa/main/readpix.c b/src/mesa/main/readpix.c
index ca4b943..d1fe36df 100644
--- a/src/mesa/main/readpix.c
+++ b/src/mesa/main/readpix.c
@@ -594,6 +594,7 @@ read_rgba_pixels( struct gl_context *ctx,
_mesa_format_convert(dst, dst_format, dst_stride,
luminance, luminance_format, luminance_stride,
width, height, NULL);
+ free(luminance);
} else {
_mesa_pack_luminance_from_rgba_integer(width * height, src, !src_is_uint,
dst, format, type);
commit 9267820be63fedade5ab4087c00e2239c0129cbe
Author: Matt Turner <mattst88 at gmail.com>
Date: Sat Feb 28 11:00:51 2015 -0800
mesa: Indent break statements and add a missing one.
Always indenting break statements makes spotting missing ones easier.
Cc: "10.4, 10.5" <mesa-stable at lists.freedesktop.org>
Reviewed-by: Brian Paul <brianp at vmware.com>
Reviewed-by: Iago Toral Quiroga <itoral at igalia.com>
(cherry picked from commit 2b2fa1865248c6e3b7baec81c4f92774759b201f)
diff --git a/src/mesa/main/pack.c b/src/mesa/main/pack.c
index 4cc8468..965b870 100644
--- a/src/mesa/main/pack.c
+++ b/src/mesa/main/pack.c
@@ -1487,20 +1487,20 @@ _mesa_pack_luminance_from_rgba_integer(GLuint n,
case GL_UNSIGNED_BYTE: {
GLbyte *dst = (GLbyte *) dstAddr;
dst[i] = lum32;
+ break;
}
- break;
case GL_SHORT:
case GL_UNSIGNED_SHORT: {
GLshort *dst = (GLshort *) dstAddr;
dst[i] = lum32;
+ break;
}
- break;
case GL_INT:
case GL_UNSIGNED_INT: {
GLint *dst = (GLint *) dstAddr;
dst[i] = lum32;
+ break;
}
- break;
}
}
return;
@@ -1525,21 +1525,22 @@ _mesa_pack_luminance_from_rgba_integer(GLuint n,
GLbyte *dst = (GLbyte *) dstAddr;
dst[2*i] = lum32;
dst[2*i+1] = alpha;
+ break;
}
case GL_SHORT:
case GL_UNSIGNED_SHORT: {
GLshort *dst = (GLshort *) dstAddr;
dst[i] = lum32;
dst[2*i+1] = alpha;
+ break;
}
- break;
case GL_INT:
case GL_UNSIGNED_INT: {
GLint *dst = (GLint *) dstAddr;
dst[i] = lum32;
dst[2*i+1] = alpha;
+ break;
}
- break;
}
}
return;
commit b730f6e18eb290962474aade3bfb2eea3105063b
Author: Chris Forbes <chrisf at ijw.co.nz>
Date: Sat Feb 28 19:57:20 2015 +1300
i965/gs: Check newly-generated GS-out VUE map against correct stage
Previously, we compared our new GS-out VUE map to the existing *VS*-out
VUE map, which is bogus.
This would mostly manifest as redundant dirty flagging where the GS is
in use but the VS and GS output layouts differ; but there is a scary
case where we would fail to flag a GS-out layout change if it happened
to match the VS-out layout.
Signed-off-by: Chris Forbes <chrisf at ijw.co.nz>
Cc: "10.5, 10.4" <mesa-stable at lists.freedesktop.org>
Reviewed-by: Matt Turner <mattst88 at gmail.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=88885
(cherry picked from commit b51ff50a767cc78d678ed3d2c25995f5c4194fea)
diff --git a/src/mesa/drivers/dri/i965/brw_gs.c b/src/mesa/drivers/dri/i965/brw_gs.c
index c7ebe5f..d96a21e 100644
--- a/src/mesa/drivers/dri/i965/brw_gs.c
+++ b/src/mesa/drivers/dri/i965/brw_gs.c
@@ -351,7 +351,7 @@ brw_upload_gs_prog(struct brw_context *brw)
}
brw->gs.base.prog_data = &brw->gs.prog_data->base.base;
- if (memcmp(&brw->vs.prog_data->base.vue_map, &brw->vue_map_geom_out,
+ if (memcmp(&brw->gs.prog_data->base.vue_map, &brw->vue_map_geom_out,
sizeof(brw->vue_map_geom_out)) != 0) {
brw->vue_map_geom_out = brw->gs.prog_data->base.vue_map;
brw->state.dirty.brw |= BRW_NEW_VUE_MAP_GEOM_OUT;
commit f5fbed4831767b086a904281cdb7fe9fb9e9ae62
Author: Matt Turner <mattst88 at gmail.com>
Date: Thu Feb 26 22:49:47 2015 -0800
i965/vec4: Fix implementation of i2b.
I broke this in commit 2881b123d. I must have misread i2b as b2i.
Cc: 10.5 <mesa-stable at lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=88246
Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
(cherry picked from commit 43ef2657a08f850c5756f28520f2cbe506807f24)
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
index 7fa75b1..3912a49 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
@@ -1645,7 +1645,7 @@ vec4_visitor::visit(ir_expression *ir)
emit(CMP(result_dst, op[0], src_reg(0.0f), BRW_CONDITIONAL_NZ));
break;
case ir_unop_i2b:
- emit(AND(result_dst, op[0], src_reg(1)));
+ emit(CMP(result_dst, op[0], src_reg(0), BRW_CONDITIONAL_NZ));
break;
case ir_unop_trunc:
commit f7cc5fb2cbe42924655f8d41f9464e943a94b9ac
Author: Ian Romanick <ian.d.romanick at intel.com>
Date: Fri Feb 27 14:17:50 2015 -0800
i965/fs/nir: Use emit_math for nir_op_fpow
It appears that all the other instructions that need it already use it.
This one just got missed.
Signed-off-by: Ian Romanick <ian.d.romanick at intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand at intel.com>
Cc: "10.5" <mesa-stable at lists.freedesktop.org>
(cherry picked from commit b8a1637119249c1d5e76c27d0053360bbb7f4e77)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
index da81b61..124e8ce 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
@@ -986,7 +986,7 @@ fs_visitor::nir_emit_alu(nir_alu_instr *instr)
break;
case nir_op_fpow:
- inst = emit(SHADER_OPCODE_POW, result, op[0], op[1]);
+ inst = emit_math(SHADER_OPCODE_POW, result, op[0], op[1]);
inst->saturate = instr->dest.saturate;
break;
commit 0d3e4ed1349565dea8e6c5139400d7441b8ffdca
Author: Emil Velikov <emil.l.velikov at gmail.com>
Date: Fri Mar 6 23:58:47 2015 +0000
docs: Add sha256 sums for the 10.5.0 release
Signed-off-by: Emil Velikov <emil.l.velikov at gmail.com>
diff --git a/docs/relnotes/10.5.0.html b/docs/relnotes/10.5.0.html
index cde8f3d..1d3dd88 100644
--- a/docs/relnotes/10.5.0.html
+++ b/docs/relnotes/10.5.0.html
@@ -31,9 +31,10 @@ because compatibility contexts are not supported.
</p>
-<h2>MD5 checksums</h2>
+<h2>SHA256 checksums</h2>
<pre>
-TBD.
+2bb6e2e982ee4d8264d52d638c2a4e3f8a164190336d72d4e34ae1304d87ed91 mesa-10.5.0.tar.gz
+d7ca9f9044bbdd674377e3eebceef1fae339c8817b9aa435c2053e4fea44e5d3 mesa-10.5.0.tar.xz
</pre>
commit 97357d475fc8cbb5dbe7bf17ca41f535827fb253
Author: Emil Velikov <emil.l.velikov at gmail.com>
Date: Fri Mar 6 22:55:59 2015 +0000
docs: Update 10.5.0 release notes
Signed-off-by: Emil Velikov <emil.l.velikov at gmail.com>
diff --git a/docs/relnotes/10.5.0.html b/docs/relnotes/10.5.0.html
index 578db4f..cde8f3d 100644
--- a/docs/relnotes/10.5.0.html
+++ b/docs/relnotes/10.5.0.html
@@ -14,7 +14,7 @@
<iframe src="../contents.html"></iframe>
<div class="content">
-<h1>Mesa 10.5.0 Release Notes / TBD</h1>
+<h1>Mesa 10.5.0 Release Notes / March 06, 2015</h1>
<p>
Mesa 10.5.0 is a new development release.
@@ -55,7 +55,150 @@ Note: some of the new features are only available with certain drivers.
<h2>Bug fixes</h2>
-TBD.
+<p>This list is likely incomplete.</p>
+
+<ul>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=10370">Bug 10370</a> - Incorrect pixels read back if draw bitmap texture through Display list</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=45348">Bug 45348</a> - [swrast] piglit fbo-drawbuffers-arbfp regression</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=60879">Bug 60879</a> - [radeonsi] X11 can't start with acceleration enabled</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=67672">Bug 67672</a> - [llvmpipe] lp_test_arit fails on old CPUs</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=77544">Bug 77544</a> - i965: Try to use LINE instructions to perform MAD with immediate arguments</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=78770">Bug 78770</a> - [SNB bisected]Webglc conformance/textures/texture-size-limit.html fails</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=80568">Bug 80568</a> - [gen4] GPU Crash During Google Chrome Operation</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=82477">Bug 82477</a> - [softpipe] piglit fp-long-alu regression</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=82585">Bug 82585</a> - geometry shader with optional out variable segfaults</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=82991">Bug 82991</a> - Inverted bumpmap in webgl applications</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=83463">Bug 83463</a> - [swrast] piglit glsl-vs-clamp-1 regression</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=83500">Bug 83500</a> - si_dma_copy_tile causes GPU hangs</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=83510">Bug 83510</a> - Graphical glitches in Unreal Engine 4</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=83908">Bug 83908</a> - [i965] Incorrect icon colors in Steam Big Picture</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=84212">Bug 84212</a> - [BSW]ES3-CTS.shaders.loops.do_while_dynamic_iterations.vector_counter_vertex fails and causes GPU hang</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=84651">Bug 84651</a> - Distorted graphics or black window when running Battle.net app on Intel hardware via wine</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=84777">Bug 84777</a> - [BSW]Piglit spec_glsl-1.50_execution_geometry-basic fails</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=85367">Bug 85367</a> - [gen4] GPU hang in glmark-es2</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=85467">Bug 85467</a> - [llvmpipe] piglit gl-1.0-dlist-beginend failure with llvm-3.6.0svn</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=85529">Bug 85529</a> - Surfaces not drawn in Unvanquished</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=85647">Bug 85647</a> - Random radeonsi crashes with mesa 10.3.x</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=85696">Bug 85696</a> - r600g+nine: Bioshock shader failure after 7b1c0cbc90d456384b0950ad21faa3c61a6b43ff</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=86089">Bug 86089</a> - [r600g][mesa 10.4.0-dev] shader failure - r600_sb::bc_finalizer::cf_peephole() when starting Second Life</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=86618">Bug 86618</a> - [NV96] neg modifiers not working in MIN and MAX operations</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=86760">Bug 86760</a> - mesa doesn't build: recipe for target 'r600_llvm.lo' failed</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=86764">Bug 86764</a> - [SNB+ Bisected]Piglit glean/pointSprite fails</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=86788">Bug 86788</a> - (bisected) 32bit UrbanTerror 4.1 timedemo sse4.1 segfault...</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=86811">Bug 86811</a> - [BDW/BSW Bisected]Piglit spec_arb_shading_language_packing_execution_built-in-functions_vs-unpackSnorm4x8 fails</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=86837">Bug 86837</a> - kodi segfault since auxiliary/vl: rework the build of the VL code</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=86939">Bug 86939</a> - test_vf_float_conversions.cpp:63:12: error: expected primary-expression before ‘union’</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=86944">Bug 86944</a> - glsl_parser_extras.cpp", line 1455: Error: Badly formed expression. (Oracle Studio)</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=86958">Bug 86958</a> - lp_bld_misc.cpp:503:40: error: no matching function for call to ‘llvm::EngineBuilder::setMCJITMemoryManager(ShaderMemoryManager*&)’</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=86969">Bug 86969</a> - _drm_intel_gem_bo_references() function takes half the CPU with Witcher2 game</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=87076">Bug 87076</a> - Dead Island needs allow_glsl_extension_directive_midshader</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=87516">Bug 87516</a> - glProgramBinary violates spec</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=87619">Bug 87619</a> - Changes to state such as render targets change fragment shader without marking it dirty.</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=87658">Bug 87658</a> - [llvmpipe] SEGV in sse2_has_daz on ancient Pentium4-M</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=87694">Bug 87694</a> - [SNB] Crash in brw_begin_transform_feedback</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=87886">Bug 87886</a> - constant fps drops with Intel and Radeon</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=87887">Bug 87887</a> - [i965 Bisected]ES2-CTS.gtf.GL.cos.cos_float_vert_xvary fails</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=87913">Bug 87913</a> - CPU cacheline size of 0 can be returned by CPUID leaf 0x80000006 in some virtual machines</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=88079">Bug 88079</a> - dEQP-GLES3.functional.fbo.completeness.renderable.renderbuffer.color0 tests fail due to enabling of GL_RGB and GL_RGBA</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=88170">Bug 88170</a> - 32 bits opengl apps crash with latest llvm 3.6 git / mesa git / radeonsi</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=88219">Bug 88219</a> - include/c11/threads_posix.h:197: undefined reference to `pthread_mutex_lock'</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=88227">Bug 88227</a> - Radeonsi: High GTT usage in Prison Architect large map</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=88248">Bug 88248</a> - Calling glClear while there is an occlusion query in progress messes up the results</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=88335">Bug 88335</a> - format_pack.c:9567:22: error: expected ')'</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=88385">Bug 88385</a> - [SNB+ Bisected]Ogles3conform ES3-CTS.gtf.GL3Tests.packed_pixels.packed_pixels core dumped</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=88467">Bug 88467</a> - nir.c:140: error: ‘nir_src’ has no member named ‘ssa’</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=88478">Bug 88478</a> - #error "<malloc.h> has been replaced by <stdlib.h>"</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=88519">Bug 88519</a> - sha1.c:210:22: error: 'grcy_md_hd_t' undeclared (first use in this function)</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=88523">Bug 88523</a> - sha1.c:37: error: 'SHA1_CTX' undeclared (first use in this function)</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=88561">Bug 88561</a> - [radeonsi][regression,bisected] Depth test/buffer issues in Portal</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=88658">Bug 88658</a> - (bisected) Slow video playback on Kabini</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=88662">Bug 88662</a> - unaligned access to gl_dlist_node</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=88783">Bug 88783</a> - FTBFS: Clover: src/gallium/state_trackers/clover/llvm/invocation.cpp:335:49: error: no matching function for call to 'llvm::TargetLibraryInfo::TargetLibraryInfo(llvm::Triple)</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=88792">Bug 88792</a> - [BDW/BSW Bisected]Piglit spec_ARB_pixel_buffer_object_pbo-read-argb8888 fails</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=88806">Bug 88806</a> - nir/nir_constant_expressions.c:2754:15: error: controlling expression type 'unsigned int' not compatible with any generic association type</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=88841">Bug 88841</a> - [SNB/IVB/HSW/BDW Bisected]Piglit spec_EGL_NOK_texture_from_pixmap_basic fails</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=88852">Bug 88852</a> - macros.h(181) : error C2143: syntax error : missing '{' before 'enum [tag]'</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=88905">Bug 88905</a> - [SNB+ Bisected]Ogles3conform ES3-CTS.gtf.GL3Tests.packed_pixels.packed_pixels fails</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=88930">Bug 88930</a> - [osmesa] osbuffer->textures should be indexed by attachment type</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=88962">Bug 88962</a> - [osmesa] Crash on postprocessing if z buffer is NULL</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89032">Bug 89032</a> - [BDW/BSW/SKL Bisected]Piglit spec_OpenGL_1.1_infinite-spot-light fails</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89037">Bug 89037</a> - [SKL]Piglit spec_EXT_texture_array_copyteximage_1D_ARRAY_samples=2 sporadically causes GPU hang</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89068">Bug 89068</a> - glTexImage2D regression by texstore_rgba switch to _mesa_format_convert</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89069">Bug 89069</a> - Lack of grass in The Talos Principle on radeonsi (native\wine\nine)</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=89180">Bug 89180</a> - [IVB regression] Rendering issues in Mass Effect through VMware Workstation</li>
+
+<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=86330">Bug 86330</a> - lp_bld_debug.cpp:112: multiple definition of `raw_debug_ostream::write_impl(char const*, unsigned long)'</li>
+
+</ul>
+
<h2>Changes</h2>
commit c899144da6fddd97e4f865600cd8ebfda8112664
Author: Emil Velikov <emil.l.velikov at gmail.com>
Date: Fri Mar 6 22:46:49 2015 +0000
Bump version to 10.5.0 (final)
Signed-off-by: Emil Velikov <emil.l.velikov at gmail.com>
diff --git a/VERSION b/VERSION
index a42f4fc..2cf514e 100644
--- a/VERSION
+++ b/VERSION
@@ -1 +1 @@
-10.5.0-rc3
+10.5.0
commit b973acc0937a5fc10cdff6429757a55ad3b4f13a
Author: Emil Velikov <emil.l.velikov at gmail.com>
Date: Mon Mar 2 13:24:55 2015 +0000
xmlpool: make sure we ship options.h
The header is included in ../xmlpool.h. With the latter of which used
directly in a number of places in mesa.
Note that we can also add it (alongside t_option.h) to noinst_HEADERS,
but neither solution fixes the issue that brough us here - namely:
Do not regenerate the headers, if it already exists.
Cc: "10.5" <mesa-stable at lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov at gmail.com>
diff --git a/src/mesa/drivers/dri/common/xmlpool/Makefile.am b/src/mesa/drivers/dri/common/xmlpool/Makefile.am
index da7d034..5557716 100644
--- a/src/mesa/drivers/dri/common/xmlpool/Makefile.am
+++ b/src/mesa/drivers/dri/common/xmlpool/Makefile.am
@@ -52,7 +52,7 @@ POT=xmlpool.pot
.PHONY: all clean pot po mo
-EXTRA_DIST = gen_xmlpool.py t_options.h $(POS) SConscript
+EXTRA_DIST = gen_xmlpool.py options.h t_options.h $(POS) SConscript
BUILT_SOURCES = options.h
CLEANFILES = $(MOS) options.h
commit 90411b56f6bc817e229d8801ac0adad6d4e3fb7a
Author: Emil Velikov <emil.l.velikov at gmail.com>
Date: Mon Mar 2 14:33:50 2015 +0000
mapi: fix shared-glapi dependency tracking
I.e. add shared-glapi/glapi_mapi_tmp.h to the SOURCES list. Otherwise
there will be no knowledge that the file is required by others for the
build. Thus autotools won't pick it up for the distribution tarball.
Cc: "10.5" <mesa-stable at lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov at gmail.com>
diff --git a/src/mapi/Makefile.am b/src/mapi/Makefile.am
index 6794682..ab82e00 100644
--- a/src/mapi/Makefile.am
+++ b/src/mapi/Makefile.am
@@ -66,7 +66,7 @@ if HAVE_SHARED_GLAPI
BUILT_SOURCES += shared-glapi/glapi_mapi_tmp.h
lib_LTLIBRARIES += shared-glapi/libglapi.la
-shared_glapi_libglapi_la_SOURCES = $(MAPI_GLAPI_FILES)
+shared_glapi_libglapi_la_SOURCES = $(MAPI_GLAPI_FILES) shared-glapi/glapi_mapi_tmp.h
shared_glapi_libglapi_la_CPPFLAGS = \
$(AM_CPPFLAGS) \
-DMAPI_MODE_GLAPI \
commit 19422e433c5d1b72f2b72ea9a74cf991fd6cada9
Author: Emil Velikov <emil.l.velikov at gmail.com>
Date: Mon Mar 2 14:28:41 2015 +0000
mesa: drop Makefile from get_hash.h dependency list
Not required. Additionally this had the side effect of generating the
file, despite it's existence.
Cc: "10.5" <mesa-stable at lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov at gmail.com>
diff --git a/src/mesa/Makefile.am b/src/mesa/Makefile.am
index 17697bf..c1c466a 100644
--- a/src/mesa/Makefile.am
+++ b/src/mesa/Makefile.am
@@ -94,7 +94,7 @@ CLEANFILES = \
GET_HASH_GEN = main/get_hash_generator.py
main/get_hash.h: ../mapi/glapi/gen/gl_and_es_API.xml main/get_hash_params.py \
- $(GET_HASH_GEN) Makefile
+ $(GET_HASH_GEN)
$(AM_V_GEN)set -e; \
$(PYTHON2) $(PYTHON_FLAGS) $(srcdir)/$(GET_HASH_GEN) \
-f $< > $@.tmp; \
commit 1b00847bb2393285be514c0844e7e15a70fba284
Author: Emil Velikov <emil.l.velikov at gmail.com>
Date: Mon Mar 2 13:10:15 2015 +0000
mesa: fix dependency tracking of generated sources
Some of the files generated were not in the SOURCES variable, thus
although generated prior to compilation the dependency tracking was
incomplete. The latter of which resulted in the files missing from the
distribution tarball.
Cc: "10.5" <mesa-stable at lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov at gmail.com>
diff --git a/src/mesa/Makefile.sources b/src/mesa/Makefile.sources
index b5912b7..629f4a6 100644
--- a/src/mesa/Makefile.sources
+++ b/src/mesa/Makefile.sources
@@ -87,6 +87,7 @@ MAIN_FILES = \
main/ffvertex_prog.h \
main/fog.c \
main/fog.h \
+ main/format_info.h \
main/format_pack.h \
main/format_pack.c \
main/format_unpack.h \
@@ -101,6 +102,7 @@ MAIN_FILES = \
main/framebuffer.h \
main/get.c \
main/get.h \
+ main/get_hash.h \
main/genmipmap.c \
main/genmipmap.h \
main/getstring.c \
commit a0264d4076a12380320adfda3b5172de7b314e27
Author: Emil Velikov <emil.l.velikov at gmail.com>
Date: Mon Mar 2 13:04:37 2015 +0000
mesa: rename format_info.c to format_info.h
The file is auto-generated, and #included by formats.c. Let's rename it
to reflect the latter. This will also help up fix the dependency
tracking by adding it to the _SOURCES variable, without the side effect
of it being compiled (twice).
Cc: "10.4, 10.5" <mesa-stable at lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov at gmail.com>
diff --git a/src/mesa/Android.gen.mk b/src/mesa/Android.gen.mk
index c7b7f7e..caae2c1 100644
--- a/src/mesa/Android.gen.mk
+++ b/src/mesa/Android.gen.mk
@@ -122,5 +122,5 @@ format_info_deps := \
$(LOCAL_PATH)/main/format_parser.py \
$(FORMAT_INFO)
-$(intermediates)/main/format_info.c: $(format_info_deps)
+$(intermediates)/main/format_info.h: $(format_info_deps)
@$(MESA_PYTHON2) $(FORMAT_INFO) $< > $@
diff --git a/src/mesa/Makefile.am b/src/mesa/Makefile.am
index b6cb8f1..17697bf 100644
--- a/src/mesa/Makefile.am
+++ b/src/mesa/Makefile.am
@@ -80,7 +80,7 @@ EXTRA_DIST = \
BUILT_SOURCES = \
main/get_hash.h \
- main/format_info.c \
+ main/format_info.h \
main/git_sha1.h \
main/format_pack.c \
main/format_unpack.c \
@@ -100,7 +100,7 @@ main/get_hash.h: ../mapi/glapi/gen/gl_and_es_API.xml main/get_hash_params.py \
-f $< > $@.tmp; \
mv $@.tmp $@;
-main/format_info.c: main/formats.csv \
+main/format_info.h: main/formats.csv \
main/format_parser.py main/format_info.py
$(AM_V_GEN)set -e; \
$(PYTHON2) $(PYTHON_FLAGS) $(srcdir)/main/format_info.py \
@@ -123,7 +123,7 @@ main/format_unpack.c: main/format_unpack.py main/formats.csv \
$(srcdir)/main/formats.csv \
| $(INDENT) $(INDENT_FLAGS) > $@;
-main/formats.c: main/format_info.c
+main/formats.c: main/format_info.h
noinst_LTLIBRARIES = $(ARCH_LIBS)
if NEED_LIBMESA
diff --git a/src/mesa/SConscript b/src/mesa/SConscript
index 1ad5f26..4d2ed62 100644
--- a/src/mesa/SConscript
+++ b/src/mesa/SConscript
@@ -60,7 +60,7 @@ get_hash_header = env.CodeGenerate(
)
format_info = env.CodeGenerate(
- target = 'main/format_info.c',
+ target = 'main/format_info.h',
script = 'main/format_info.py',
source = 'main/formats.csv',
command = python_cmd + ' $SCRIPT ' + ' $SOURCE > $TARGET'
diff --git a/src/mesa/main/formats.c b/src/mesa/main/formats.c
index 958d6f2..a5aa793 100644
--- a/src/mesa/main/formats.c
+++ b/src/mesa/main/formats.c
@@ -75,7 +75,7 @@ struct gl_format_info
mesa_array_format ArrayFormat;
};
-#include "format_info.c"
+#include "format_info.h"
static const struct gl_format_info *
_mesa_get_format_info(mesa_format format)
commit c7d49878972ec4666d7287f7f8781bfdf2a65dd4
Author: Emil Velikov <emil.l.velikov at gmail.com>
Date: Mon Mar 2 13:00:55 2015 +0000
mesa/main: update .gitignore
Drop the no longer present get_es{1,2}.c from the list.
Signed-off-by: Emil Velikov <emil.l.velikov at gmail.com>
diff --git a/src/mesa/main/.gitignore b/src/mesa/main/.gitignore
index e65472d..8256ad7 100644
--- a/src/mesa/main/.gitignore
+++ b/src/mesa/main/.gitignore
@@ -1,13 +1,11 @@
api_exec.c
dispatch.h
enums.c
-get_es1.c
-get_es2.c
git_sha1.h
git_sha1.h.tmp
remap_helper.h
get_hash.h
get_hash.h.tmp
-format_info.c
+format_info.h
format_pack.c
format_unpack.c
commit c32d83528189be988275c9ccbd3bbb2e48ee4362
Author: Emil Velikov <emil.l.velikov at gmail.com>
Date: Sat Feb 28 00:04:30 2015 +0000
Increment version to 10.5.0-rc3
Signed-off-by: Emil Velikov <emil.l.velikov at gmail.com>
diff --git a/VERSION b/VERSION
index 0ae2dec..a42f4fc 100644
--- a/VERSION
+++ b/VERSION
@@ -1 +1 @@
-10.5.0-rc2
+10.5.0-rc3
commit 54cc3cdff4b514cc74dea34bf0824726631e5d64
Author: Jonathan Gray <jsg at jsg.id.au>
Date: Sun Feb 22 19:19:25 2015 +1100
auxilary/os: correct sysctl use in os_get_total_physical_memory()
The length argument passed to sysctl was the size of the pointer
not the type. The result of this is sysctl calls would fail on
32 bit BSD/Mac OS X.
Additionally the wrong pointer was passed as an argument to store
the result of the sysctl call.
Cc: "10.4, 10.5" <mesa-stable at lists.freedesktop.org>
Signed-off-by: Jonathan Gray <jsg at jsg.id.au>
Reviewed-by: Emil Velikov <emil.l.velikov at gmail.com>
(cherry picked from commit 7983a3d2e06b0bc16c1a16bddccc7f14fe1f132c)
diff --git a/src/gallium/auxiliary/os/os_misc.c b/src/gallium/auxiliary/os/os_misc.c
index ebf033c..c46078b 100644
--- a/src/gallium/auxiliary/os/os_misc.c
+++ b/src/gallium/auxiliary/os/os_misc.c
@@ -118,7 +118,7 @@ os_get_total_physical_memory(uint64_t *size)
*size = phys_pages * page_size;
return (phys_pages > 0 && page_size > 0);
#elif defined(PIPE_OS_APPLE) || defined(PIPE_OS_BSD)
- size_t len = sizeof(size);
+ size_t len = sizeof(*size);
int mib[2];
mib[0] = CTL_HW;
@@ -134,7 +134,7 @@ os_get_total_physical_memory(uint64_t *size)
#error Unsupported *BSD
#endif
- return (sysctl(mib, 2, &size, &len, NULL, 0) == 0);
+ return (sysctl(mib, 2, size, &len, NULL, 0) == 0);
#elif defined(PIPE_OS_HAIKU)
system_info info;
status_t ret;
commit c0f425bb813729ac9b4589c8a717ed27ba5998b9
Author: Dave Airlie <airlied at redhat.com>
Date: Wed Feb 18 10:13:20 2015 +1000
r600g/sb: treat undefined values like constants
When we schedule an instructions with undefined value, we
eventually will use 0, which is a constant, however sb wasn't
taking this into account and creating ops with illegal scalar
swizzles.
this replaces my fix for op3 in t slots.
Reviewed-by: Glenn Kennard <glenn.kennard at gmail.com>
Signed-off-by: Dave Airlie <airlied at redhat.com>
(cherry picked from commit e8e4437ed0660b3f1d1912f53d997cf5e25f486d)
diff --git a/src/gallium/drivers/r600/sb/sb_sched.cpp b/src/gallium/drivers/r600/sb/sb_sched.cpp
index 4fbdc4f..63e7464 100644
--- a/src/gallium/drivers/r600/sb/sb_sched.cpp
+++ b/src/gallium/drivers/r600/sb/sb_sched.cpp
@@ -266,7 +266,7 @@ bool rp_gpr_tracker::try_reserve(alu_node* n) {
for (i = 0; i < nsrc; ++i) {
value *v = n->src[i];
- if (v->is_readonly()) {
+ if (v->is_readonly() || v->is_undef()) {
const_count++;
if (trans && const_count == 3)
break;
@@ -295,7 +295,7 @@ bool rp_gpr_tracker::try_reserve(alu_node* n) {
if (need_unreserve && i--) {
do {
value *v = n->src[i];
- if (!v->is_readonly()) {
+ if (!v->is_readonly() && !v->is_undef()) {
if (i == 1 && opt)
continue;
unreserve(bs_cycle(trans, bs, i), n->bc.src[i].sel,
commit 7c448551eb246c2f5eb836e372f131dd2dd147ba
Author: Neil Roberts <neil at linux.intel.com>
Date: Mon Feb 2 17:47:23 2015 +0000
i965/skl: Implement WaDisable1DDepthStencil
Skylake+ doesn't support setting a depth buffer to a 1D surface but it
does allow pretending it's a 2D texture with a height of 1 instead.
This fixes the GL_DEPTH_COMPONENT_* tests of the copyteximage piglit
test (and also seems to avoid a subsequent GPU hang).
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89037
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
(cherry picked from commit 5b29b2922afe2b8167a589fc2896a071fc85b693)
Nominated-by: Ian Romanick <idr at freedesktop.org>
diff --git a/src/mesa/drivers/dri/i965/gen8_depth_state.c b/src/mesa/drivers/dri/i965/gen8_depth_state.c
index e428089..b4eb6e1 100644
--- a/src/mesa/drivers/dri/i965/gen8_depth_state.c
+++ b/src/mesa/drivers/dri/i965/gen8_depth_state.c
@@ -190,6 +190,18 @@ gen8_emit_depth_stencil_hiz(struct brw_context *brw,
case GL_TEXTURE_3D:
assert(mt);
depth = MAX2(mt->logical_depth0, 1);
+ surftype = translate_tex_target(gl_target);
+ break;
+ case GL_TEXTURE_1D_ARRAY:
+ case GL_TEXTURE_1D:
+ if (brw->gen >= 9) {
+ /* WaDisable1DDepthStencil. Skylake+ doesn't support 1D depth
+ * textures but it does allow pretending it's a 2D texture
+ * instead.
+ */
+ surftype = BRW_SURFACE_2D;
+ break;
+ }
/* fallthrough */
default:
surftype = translate_tex_target(gl_target);
commit 3e54be2e8ad2918a3371f2a33b6c18271b46020b
Author: Tom Stellard <thomas.stellard at amd.com>
Date: Tue Feb 24 19:43:43 2015 -0500
pipe-loader: Fix build with dri drivers enabled, and vl state trackers disabled
Configure arguments:
./configure --disable-dri3 --disable-xvmc --enable-opencl
--with-gallium-drivers=r300,r600,radeonsi
--with-egl-platforms=drm
Build error:
make[3]: *** No rule to make target
`../../../../src/gallium/auxiliary/libgalliumvlwinsys.la', needed by
`pipe_r300.la'. Stop.
Cc: "10.5" <mesa-stable at lists.freedestkop.org>
Reviewed-by: Emil Velikov <emil.l.velikov at gmail.com>
(cherry picked from commit ed07255149d7cffac07615e946289b3d683faa4b)
diff --git a/src/gallium/targets/pipe-loader/Makefile.am b/src/gallium/targets/pipe-loader/Makefile.am
index 94658f8..fe40f5b 100644
--- a/src/gallium/targets/pipe-loader/Makefile.am
+++ b/src/gallium/targets/pipe-loader/Makefile.am
@@ -40,13 +40,17 @@ PIPE_LIBS =
if NEED_GALLIUM_VL
PIPE_LIBS += \
- $(top_builddir)/src/gallium/auxiliary/libgalliumvlwinsys.la \
$(top_builddir)/src/gallium/auxiliary/libgalliumvl.la
else
PIPE_LIBS += \
$(top_builddir)/src/gallium/auxiliary/libgalliumvl_stub.la
endif
+if NEED_GALLIUM_VL_WINSYS
+PIPE_LIBS+= \
+ $(top_builddir)/src/gallium/auxiliary/libgalliumvlwinsys.la
+endif
+
PIPE_LIBS += \
$(top_builddir)/src/gallium/auxiliary/libgallium.la \
$(top_builddir)/src/util/libmesautil.la \
commit 6f52686d7783f20264932419fe133626c16646cc
Author: Matt Turner <mattst88 at gmail.com>
Date: Tue Feb 24 10:41:52 2015 -0800
glsl: Rewrite and fix min/max to saturate optimization.
There were some bugs, and the code was really difficult to follow. We
would optimize
min(max(x, b), 1.0) into max(sat(x), b)
but not pay attention to the order of min/max and also do
max(min(x, b), 1.0) into max(sat(x), b)
Corrects four shaders from Champions of Regnum that do
min(max(x, 1), 10)
and corrects rendering of Mass Effect under VMware Workstation.
Cc: "10.4 10.5" <mesa-stable at lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89180
Reviewed-by: Abdiel Janulgue <abdiel.janulgue at linux.intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
(cherry picked from commit cb25087c7bd5f1ad2515647278b32d3f07803f77)
diff --git a/src/glsl/opt_algebraic.cpp b/src/glsl/opt_algebraic.cpp
index c6f4a9c..fae58c7 100644
--- a/src/glsl/opt_algebraic.cpp
+++ b/src/glsl/opt_algebraic.cpp
@@ -696,48 +696,65 @@ ir_algebraic_visitor::handle_expression(ir_expression *ir)
* a saturate operation
*/
for (int op = 0; op < 2; op++) {
- ir_expression *minmax = op_expr[op];
+ ir_expression *inner_expr = op_expr[op];
ir_constant *outer_const = op_const[1 - op];
ir_expression_operation op_cond = (ir->operation == ir_binop_max) ?
ir_binop_min : ir_binop_max;
- if (!minmax || !outer_const || (minmax->operation != op_cond))
+ if (!inner_expr || !outer_const || (inner_expr->operation != op_cond))
continue;
+ /* One of these has to be a constant */
+ if (!inner_expr->operands[0]->as_constant() &&
+ !inner_expr->operands[1]->as_constant())
+ break;
+
/* Found a min(max) combination. Now try to see if its operands
* meet our conditions that we can do just a single saturate operation
*/
for (int minmax_op = 0; minmax_op < 2; minmax_op++) {
- ir_rvalue *inner_val_a = minmax->operands[minmax_op];
- ir_rvalue *inner_val_b = minmax->operands[1 - minmax_op];
+ ir_rvalue *x = inner_expr->operands[minmax_op];
+ ir_rvalue *y = inner_expr->operands[1 - minmax_op];
- if (!inner_val_a || !inner_val_b)
+ ir_constant *inner_const = y->as_constant();
+ if (!inner_const)
continue;
- /* Found a {min|max} ({max|min} (x, 0.0), 1.0) operation and its variations */
- if ((outer_const->is_one() && inner_val_a->is_zero()) ||
- (inner_val_a->is_one() && outer_const->is_zero()))
- return saturate(inner_val_b);
-
- /* Found a {min|max} ({max|min} (x, 0.0), b) where b < 1.0
- * and its variations
- */
- if (is_less_than_one(outer_const) && inner_val_b->is_zero())
- return expr(ir_binop_min, saturate(inner_val_a), outer_const);
-
- if (!inner_val_b->as_constant())
- continue;
-
- if (is_less_than_one(inner_val_b->as_constant()) && outer_const->is_zero())
- return expr(ir_binop_min, saturate(inner_val_a), inner_val_b);
-
- /* Found a {min|max} ({max|min} (x, b), 1.0), where b > 0.0
- * and its variations
- */
- if (outer_const->is_one() && is_greater_than_zero(inner_val_b->as_constant()))
- return expr(ir_binop_max, saturate(inner_val_a), inner_val_b);
- if (inner_val_b->as_constant()->is_one() && is_greater_than_zero(outer_const))
- return expr(ir_binop_max, saturate(inner_val_a), outer_const);
+ /* min(max(x, 0.0), 1.0) is sat(x) */
+ if (ir->operation == ir_binop_min &&
+ inner_const->is_zero() &&
+ outer_const->is_one())
+ return saturate(x);
+
+ /* max(min(x, 1.0), 0.0) is sat(x) */
+ if (ir->operation == ir_binop_max &&
+ inner_const->is_one() &&
+ outer_const->is_zero())
+ return saturate(x);
+
+ /* min(max(x, 0.0), b) where b < 1.0 is sat(min(x, b)) */
+ if (ir->operation == ir_binop_min &&
+ inner_const->is_zero() &&
+ is_less_than_one(outer_const))
+ return saturate(expr(ir_binop_min, x, outer_const));
+
+ /* max(min(x, b), 0.0) where b < 1.0 is sat(min(x, b)) */
+ if (ir->operation == ir_binop_max &&
+ is_less_than_one(inner_const) &&
+ outer_const->is_zero())
+ return saturate(expr(ir_binop_min, x, inner_const));
+
+ /* max(min(x, 1.0), b) where b > 0.0 is sat(max(x, b)) */
+ if (ir->operation == ir_binop_max &&
+ inner_const->is_one() &&
+ is_greater_than_zero(outer_const))
+ return saturate(expr(ir_binop_max, x, outer_const));
+
+ /* min(max(x, b), 1.0) where b > 0.0 is sat(max(x, b)) */
+ if (ir->operation == ir_binop_min &&
+ is_greater_than_zero(inner_const) &&
+ outer_const->is_one())
+ return saturate(expr(ir_binop_max, x, inner_const));
}
}
commit 1527f569e564a7ce2595a0fca9c955c2fd89f0d7
Author: Andreas Boll <andreas.boll.dev at gmail.com>
Date: Tue Feb 24 20:01:30 2015 +0100
glx: Fix returned values of GLX_RENDERER_PREFERRED_PROFILE_MESA
If the renderer supports the core profile the query returned incorrectly
0x8 as value, because it was using (1U << __DRI_API_OPENGL_CORE) for the
returned value.
The same happened with the compatibility profile. It returned 0x1
(1U << __DRI_API_OPENGL) instead of 0x2.
Internal DRI defines:
dri_interface.h: #define __DRI_API_OPENGL 0
dri_interface.h: #define __DRI_API_OPENGL_CORE 3
Those two bits are supposed for internal usage only and should be
translated to GLX_CONTEXT_CORE_PROFILE_BIT_ARB (0x1) for a preferred
core context profile and GLX_CONTEXT_COMPATIBILITY_PROFILE_BIT_ARB (0x2)
for a preferred compatibility context profile.
This patch implements the above translation in the glx module.
v2: Fix the incorrect behavior in the glx module
Cc: "10.3 10.4 10.5" <mesa-stable at lists.freedesktop.org>
Signed-off-by: Andreas Boll <andreas.boll.dev at gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
(cherry picked from commit 6d164f65c5a794164d07bc66c1f8f87280514e8c)
diff --git a/src/glx/dri_common_query_renderer.c b/src/glx/dri_common_query_renderer.c
index d598b12..b3e107d 100644
--- a/src/glx/dri_common_query_renderer.c
+++ b/src/glx/dri_common_query_renderer.c
@@ -65,10 +65,23 @@ dri2_convert_glx_query_renderer_attribs(int attribute)
return -1;
}
+/* Convert internal dri context profile bits into GLX context profile bits */
+static inline void
+dri_convert_context_profile_bits(int attribute, unsigned int *value)
+{
+ if (attribute == GLX_RENDERER_PREFERRED_PROFILE_MESA) {
+ if (value[0] == (1U << __DRI_API_OPENGL_CORE))
+ value[0] = GLX_CONTEXT_CORE_PROFILE_BIT_ARB;
+ else if (value[0] == (1U << __DRI_API_OPENGL))
+ value[0] = GLX_CONTEXT_COMPATIBILITY_PROFILE_BIT_ARB;
+ }
+}
+
_X_HIDDEN int
dri2_query_renderer_integer(struct glx_screen *base, int attribute,
unsigned int *value)
{
+ int ret;
struct dri2_screen *const psc = (struct dri2_screen *) base;
/* Even though there are invalid values (and
@@ -81,8 +94,11 @@ dri2_query_renderer_integer(struct glx_screen *base, int attribute,
if (psc->rendererQuery == NULL)
return -1;
- return psc->rendererQuery->queryInteger(psc->driScreen, dri_attribute,
- value);
+ ret = psc->rendererQuery->queryInteger(psc->driScreen, dri_attribute,
+ value);
+ dri_convert_context_profile_bits(attribute, value);
+
+ return ret;
}
_X_HIDDEN int
@@ -108,6 +124,7 @@ _X_HIDDEN int
dri3_query_renderer_integer(struct glx_screen *base, int attribute,
unsigned int *value)
{
+ int ret;
struct dri3_screen *const psc = (struct dri3_screen *) base;
/* Even though there are invalid values (and
@@ -120,8 +137,11 @@ dri3_query_renderer_integer(struct glx_screen *base, int attribute,
if (psc->rendererQuery == NULL)
return -1;
- return psc->rendererQuery->queryInteger(psc->driScreen, dri_attribute,
- value);
+ ret = psc->rendererQuery->queryInteger(psc->driScreen, dri_attribute,
+ value);
+ dri_convert_context_profile_bits(attribute, value);
+
+ return ret;
}
_X_HIDDEN int
@@ -147,6 +167,7 @@ _X_HIDDEN int
drisw_query_renderer_integer(struct glx_screen *base, int attribute,
unsigned int *value)
{
+ int ret;
struct drisw_screen *const psc = (struct drisw_screen *) base;
/* Even though there are invalid values (and
@@ -159,8 +180,11 @@ drisw_query_renderer_integer(struct glx_screen *base, int attribute,
if (psc->rendererQuery == NULL)
return -1;
- return psc->rendererQuery->queryInteger(psc->driScreen, dri_attribute,
- value);
+ ret = psc->rendererQuery->queryInteger(psc->driScreen, dri_attribute,
+ value);
+ dri_convert_context_profile_bits(attribute, value);
+
+ return ret;
}
_X_HIDDEN int
commit dfbaa8a8436be43a7889366ee87daa7b173eedd6
Author: Laura Ekstrand <laura at jlekstrand.net>
Date: Wed Feb 18 17:17:38 2015 -0800
common: Fix PBOs for 1D_ARRAY.
Corrects the way that _mesa_meta_pbo_TexSubImage and
_mesa_meta_pbo_GetTexSubImage handle 1D_ARRAY textures. Fixes a failure in
the Piglit arb_direct_state_access/gettextureimage-targets test.
Reviewed-by: Jason Ekstrand <jason.ekstrand at intel.com>
Tested-by: Laura Ekstrand <laura at jlekstrand.net>
Cc: "10.4, 10.5" <mesa-stable at lists.freedesktop.org>
(cherry picked from commit 546aba143d13ba3f993ead4cc30b2404abfc0202)
diff --git a/src/mesa/drivers/common/meta_tex_subimage.c b/src/mesa/drivers/common/meta_tex_subimage.c
index b659426..ffbbacd 100644
--- a/src/mesa/drivers/common/meta_tex_subimage.c
+++ b/src/mesa/drivers/common/meta_tex_subimage.c
@@ -137,7 +137,7 @@ _mesa_meta_pbo_TexSubImage(struct gl_context *ctx, GLuint dims,
struct gl_texture_image *pbo_tex_image;
GLenum status;
bool success = false;
- int z;
+ int z, iters;
/* XXX: This should probably be passed in from somewhere */
const char *where = "_mesa_meta_pbo_TexSubImage";
@@ -190,12 +190,6 @@ _mesa_meta_pbo_TexSubImage(struct gl_context *ctx, GLuint dims,
_mesa_BindFramebuffer(GL_READ_FRAMEBUFFER, fbos[0]);
_mesa_BindFramebuffer(GL_DRAW_FRAMEBUFFER, fbos[1]);
- if (tex_image->TexObject->Target == GL_TEXTURE_1D_ARRAY) {
- assert(depth == 1);
- depth = height;
- height = 1;
- }
-
_mesa_meta_bind_fbo_image(GL_READ_FRAMEBUFFER, GL_COLOR_ATTACHMENT0,
pbo_tex_image, 0);
/* If this passes on the first layer it should pass on the others */
@@ -219,7 +213,10 @@ _mesa_meta_pbo_TexSubImage(struct gl_context *ctx, GLuint dims,
GL_COLOR_BUFFER_BIT, GL_NEAREST))
goto fail;
- for (z = 1; z < depth; z++) {
+ iters = tex_image->TexObject->Target == GL_TEXTURE_1D_ARRAY ?
+ height : depth;
+
+ for (z = 1; z < iters; z++) {
_mesa_meta_bind_fbo_image(GL_READ_FRAMEBUFFER, GL_COLOR_ATTACHMENT0,
pbo_tex_image, z);
_mesa_meta_bind_fbo_image(GL_DRAW_FRAMEBUFFER, GL_COLOR_ATTACHMENT0,
@@ -227,11 +224,18 @@ _mesa_meta_pbo_TexSubImage(struct gl_context *ctx, GLuint dims,
_mesa_update_state(ctx);
- _mesa_meta_BlitFramebuffer(ctx, ctx->ReadBuffer, ctx->DrawBuffer,
- 0, z * height, width, (z + 1) * height,
- xoffset, yoffset,
- xoffset + width, yoffset + height,
- GL_COLOR_BUFFER_BIT, GL_NEAREST);
+ if (tex_image->TexObject->Target == GL_TEXTURE_1D_ARRAY)
+ _mesa_meta_BlitFramebuffer(ctx, ctx->ReadBuffer, ctx->DrawBuffer,
+ 0, z, width, z + 1,
+ xoffset, yoffset,
+ xoffset + width, yoffset + 1,
+ GL_COLOR_BUFFER_BIT, GL_NEAREST);
+ else
+ _mesa_meta_BlitFramebuffer(ctx, ctx->ReadBuffer, ctx->DrawBuffer,
+ 0, z * height, width, (z + 1) * height,
+ xoffset, yoffset,
+ xoffset + width, yoffset + height,
+ GL_COLOR_BUFFER_BIT, GL_NEAREST);
}
success = true;
@@ -258,7 +262,7 @@ _mesa_meta_pbo_GetTexSubImage(struct gl_context *ctx, GLuint dims,
struct gl_texture_image *pbo_tex_image;
GLenum status;
bool success = false;
- int z;
+ int z, iters;
/* XXX: This should probably be passed in from somewhere */
const char *where = "_mesa_meta_pbo_GetTexSubImage";
@@ -305,12 +309,6 @@ _mesa_meta_pbo_GetTexSubImage(struct gl_context *ctx, GLuint dims,
_mesa_GenFramebuffers(2, fbos);
- if (tex_image && tex_image->TexObject->Target == GL_TEXTURE_1D_ARRAY) {
- assert(depth == 1);
- depth = height;
- height = 1;
- }
-
/* If we were given a texture, bind it to the read framebuffer. If not,
* we're doing a ReadPixels and we should just use whatever framebuffer
* the client has bound.
@@ -344,7 +342,12 @@ _mesa_meta_pbo_GetTexSubImage(struct gl_context *ctx, GLuint dims,
GL_COLOR_BUFFER_BIT, GL_NEAREST))
goto fail;
- for (z = 1; z < depth; z++) {
+ if (tex_image && tex_image->TexObject->Target == GL_TEXTURE_1D_ARRAY)
+ iters = height;
+ else
+ iters = depth;
+
+ for (z = 1; z < iters; z++) {
_mesa_meta_bind_fbo_image(GL_READ_FRAMEBUFFER, GL_COLOR_ATTACHMENT0,
tex_image, zoffset + z);
_mesa_meta_bind_fbo_image(GL_DRAW_FRAMEBUFFER, GL_COLOR_ATTACHMENT0,
@@ -352,11 +355,18 @@ _mesa_meta_pbo_GetTexSubImage(struct gl_context *ctx, GLuint dims,
_mesa_update_state(ctx);
- _mesa_meta_BlitFramebuffer(ctx, ctx->ReadBuffer, ctx->DrawBuffer,
- xoffset, yoffset,
- xoffset + width, yoffset + height,
- 0, z * height, width, (z + 1) * height,
- GL_COLOR_BUFFER_BIT, GL_NEAREST);
+ if (tex_image->TexObject->Target == GL_TEXTURE_1D_ARRAY)
+ _mesa_meta_BlitFramebuffer(ctx, ctx->ReadBuffer, ctx->DrawBuffer,
+ xoffset, yoffset,
+ xoffset + width, yoffset + 1,
+ 0, z, width, z + 1,
+ GL_COLOR_BUFFER_BIT, GL_NEAREST);
+ else
+ _mesa_meta_BlitFramebuffer(ctx, ctx->ReadBuffer, ctx->DrawBuffer,
+ xoffset, yoffset,
+ xoffset + width, yoffset + height,
+ 0, z * height, width, (z + 1) * height,
+ GL_COLOR_BUFFER_BIT, GL_NEAREST);
}
success = true;
commit 9e8446beb1519464646aa906134fd4b2d3c0e99f
Author: Laura Ekstrand <laura at jlekstrand.net>
Date: Tue Feb 24 14:51:29 2015 -0800
common: Correct PBO 2D_ARRAY handling.
Changes PBO uploads and downloads to use a tall (height * depth) 2D texture
for blitting. This fixes the bug where 2D_ARRAY, 3D, and CUBE_MAP_ARRAY
textures are not properly uploaded and downloaded.
Removes the option to use a 2D ARRAY texture for the PBO during upload and
download. This option didn't work because the miptree couldn't be set up
reliably.
v2: Review from Jason Ekstrand and Neil Roberts:
-Delete the depth parameter from create_texture_for_pbo
-Abandon the option to create a 2D ARRAY texture in create_texture_for_pbo
Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand at intel.com>
Cc: "10.4, 10.5" <mesa-stable at lists.freedesktop.org>
(cherry picked from commit ccc5ce6f72c1ec86be4dfcef96c0b51fba0faa6d)
diff --git a/src/mesa/drivers/common/meta_tex_subimage.c b/src/mesa/drivers/common/meta_tex_subimage.c
index 2d2b9d8..b659426 100644
--- a/src/mesa/drivers/common/meta_tex_subimage.c
+++ b/src/mesa/drivers/common/meta_tex_subimage.c
@@ -44,7 +44,7 @@
static struct gl_texture_image *
create_texture_for_pbo(struct gl_context *ctx, bool create_pbo,
- GLenum pbo_target, int width, int height, int depth,
+ GLenum pbo_target, int width, int height,
GLenum format, GLenum type, const void *pixels,
const struct gl_pixelstore_attrib *packing,
GLuint *tmp_pbo, GLuint *tmp_tex)
@@ -57,8 +57,7 @@ create_texture_for_pbo(struct gl_context *ctx, bool create_pbo,
struct gl_texture_image *tex_image;
bool read_only;
- if ((packing->ImageHeight != 0 && packing->ImageHeight != height) ||
- packing->SwapBytes ||
+ if (packing->SwapBytes ||
packing->LsbFirst ||
packing->Invert)
return NULL;
@@ -99,7 +98,6 @@ create_texture_for_pbo(struct gl_context *ctx, bool create_pbo,
_mesa_GenTextures(1, tmp_tex);
tex_obj = _mesa_lookup_texture(ctx, *tmp_tex);
- tex_obj->Target = depth > 1 ? GL_TEXTURE_2D_ARRAY : GL_TEXTURE_2D;
_mesa_initialize_texture_object(ctx, tex_obj, *tmp_tex, GL_TEXTURE_2D);
/* This must be set after _mesa_initialize_texture_object, not before. */
tex_obj->Immutable = GL_TRUE;
@@ -109,7 +107,7 @@ create_texture_for_pbo(struct gl_context *ctx, bool create_pbo,
internal_format = _mesa_get_format_base_format(pbo_format);
tex_image = _mesa_get_tex_image(ctx, tex_obj, tex_obj->Target, 0);
- _mesa_init_teximage_fields(ctx, tex_image, width, height, depth,
+ _mesa_init_teximage_fields(ctx, tex_image, width, height, 1,
0, internal_format, pbo_format);
read_only = pbo_target == GL_PIXEL_UNPACK_BUFFER;
@@ -169,9 +167,14 @@ _mesa_meta_pbo_TexSubImage(struct gl_context *ctx, GLuint dims,
return true;
}
+ /* Only accept tightly packed pixels from the user. */
+ if (packing->ImageHeight != 0 && packing->ImageHeight != height)
+ return false;
+
+ /* For arrays, use a tall (height * depth) 2D texture. */
pbo_tex_image = create_texture_for_pbo(ctx, create_pbo,
GL_PIXEL_UNPACK_BUFFER,
- width, height, depth,
+ width, height * depth,
format, type, pixels, packing,
&pbo, &pbo_tex);
if (!pbo_tex_image)
@@ -225,7 +228,7 @@ _mesa_meta_pbo_TexSubImage(struct gl_context *ctx, GLuint dims,
_mesa_update_state(ctx);
_mesa_meta_BlitFramebuffer(ctx, ctx->ReadBuffer, ctx->DrawBuffer,
- 0, 0, width, height,
+ 0, z * height, width, (z + 1) * height,
xoffset, yoffset,
xoffset + width, yoffset + height,
GL_COLOR_BUFFER_BIT, GL_NEAREST);
@@ -285,8 +288,13 @@ _mesa_meta_pbo_GetTexSubImage(struct gl_context *ctx, GLuint dims,
return true;
}
+ /* Only accept tightly packed pixels from the user. */
+ if (packing->ImageHeight != 0 && packing->ImageHeight != height)
+ return false;
+
+ /* For arrays, use a tall (height * depth) 2D texture. */
pbo_tex_image = create_texture_for_pbo(ctx, false, GL_PIXEL_PACK_BUFFER,
- width, height, depth,
+ width, height * depth,
format, type, pixels, packing,
&pbo, &pbo_tex);
if (!pbo_tex_image)
@@ -347,7 +355,7 @@ _mesa_meta_pbo_GetTexSubImage(struct gl_context *ctx, GLuint dims,
_mesa_meta_BlitFramebuffer(ctx, ctx->ReadBuffer, ctx->DrawBuffer,
xoffset, yoffset,
xoffset + width, yoffset + height,
- 0, 0, width, height,
+ 0, z * height, width, (z + 1) * height,
GL_COLOR_BUFFER_BIT, GL_NEAREST);
}
commit 9e5af14163d5c4a782356c2b4787b2d5091ce5d3
Author: Laura Ekstrand <laura at jlekstrand.net>
Date: Tue Feb 24 13:29:11 2015 -0800
common: Correct texture init for meta pbo uploads and downloads.
This moves the line setting immutability for the texture to after
_mesa_initialize_texture_object so that the initializer function will not
cancel it out. Moreover, because of the ARB_texture_view extension, immutable
textures must have NumLayers > 0, or depth will equal (0-1)=0xFFFFFFFF during
SURFACE_STATE setup, which triggers assertions.
v2: Review from Kenneth Graunke:
- Include more explanation in the commit message.
- Make texture setup bug fixes into a separate patch.
Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand at intel.com>
Cc: "10.4, 10.5" <mesa-stable at lists.freedesktop.org>
(cherry picked from commit 06084652fefe49c3d6bf1b476ff74ff602fdc22a)
diff --git a/src/mesa/drivers/common/meta_tex_subimage.c b/src/mesa/drivers/common/meta_tex_subimage.c
index 68c8273..2d2b9d8 100644
--- a/src/mesa/drivers/common/meta_tex_subimage.c
+++ b/src/mesa/drivers/common/meta_tex_subimage.c
@@ -100,8 +100,11 @@ create_texture_for_pbo(struct gl_context *ctx, bool create_pbo,
_mesa_GenTextures(1, tmp_tex);
tex_obj = _mesa_lookup_texture(ctx, *tmp_tex);
tex_obj->Target = depth > 1 ? GL_TEXTURE_2D_ARRAY : GL_TEXTURE_2D;
- tex_obj->Immutable = GL_TRUE;
_mesa_initialize_texture_object(ctx, tex_obj, *tmp_tex, GL_TEXTURE_2D);
+ /* This must be set after _mesa_initialize_texture_object, not before. */
+ tex_obj->Immutable = GL_TRUE;
+ /* This is required for interactions with ARB_texture_view. */
+ tex_obj->NumLayers = 1;
internal_format = _mesa_get_format_base_format(pbo_format);
commit ed7272ade9ef2f7a1327077876e93130a48f8735
Author: Leo Liu <leo.liu at amd.com>
Date: Mon Feb 23 13:50:06 2015 -0500
st/omx/dec/h264: fix picture out-of-order with poc type 0 v2
poc counter should be reset with IDR frame,
otherwise there would be a re-order issue with
frames before and after IDR
v2: add commit message
Signed-off-by: Leo Liu <leo.liu at amd.com>
Reviewed-by: Christian König <christian.koenig at amd.com>
Cc: "10.4 10.5" <mesa-stable at lists.freedesktop.org>
(cherry picked from commit 9c7b343bc0a6aa6065055cbc1c0a891ccc445984)
diff --git a/src/gallium/state_trackers/omx/vid_dec_h264.c b/src/gallium/state_trackers/omx/vid_dec_h264.c
index 7b57785..e01e873 100644
--- a/src/gallium/state_trackers/omx/vid_dec_h264.c
+++ b/src/gallium/state_trackers/omx/vid_dec_h264.c
@@ -706,6 +706,11 @@ static void slice_header(vid_dec_PrivateType *priv, struct vl_rbsp *rbsp,
if (pic_order_cnt_lsb != priv->codec_data.h264.pic_order_cnt_lsb)
vid_dec_h264_EndFrame(priv);
+ if (IdrPicFlag) {
+ priv->codec_data.h264.pic_order_cnt_msb = 0;
+ priv->codec_data.h264.pic_order_cnt_lsb = 0;
+ }
+
if ((pic_order_cnt_lsb < priv->codec_data.h264.pic_order_cnt_lsb) &&
(priv->codec_data.h264.pic_order_cnt_lsb - pic_order_cnt_lsb) >= (max_pic_order_cnt_lsb / 2))
pic_order_cnt_msb = priv->codec_data.h264.pic_order_cnt_msb + max_pic_order_cnt_lsb;
commit 3592cbb21f7b191df5de2d52c7158f93ac284d81
Author: Emil Velikov <emil.l.velikov at gmail.com>
Date: Tue Feb 24 15:35:17 2015 +0000
Increment version to 10.5.0-rc2
Signed-off-by: Emil Velikov <emil.l.velikov at gmail.com>
diff --git a/VERSION b/VERSION
index 49dab28..0ae2dec 100644
--- a/VERSION
+++ b/VERSION
@@ -1 +1 @@
-10.5.0-rc1
+10.5.0-rc2
commit 5e026a2f637cc57bffa28e3fa0cef3eea5e9adc9
Author: Emil Velikov <emil.l.velikov at gmail.com>
Date: Tue Feb 24 14:05:15 2015 +0000
install-lib-links: remove the .install-lib-links file
With earlier commit (install-lib-links: don't depend on .libs directory)
we moved the location of the file from .libs/ to the current dir.
Although we did not attribute that in the former case autotools was
doing us a favour and removing the file. Explicitly remove the file at
clean-local time, otherwise we'll end up with dangling files.
Cc: "10.3 10.4 10.5" <mesa-stable at lists.freedesktop.org>
Cc: Matt Turner <mattst88 at gmail.com>
Cc: Lucas Stach <l.stach at pengutronix.de>
Signed-off-by: Emil Velikov <emil.l.velikov at gmail.com>
(cherry picked from commit fece147be53880ac8e8e5e2863f91cdd01d98b5c)
diff --git a/install-lib-links.mk b/install-lib-links.mk
index 3545b26..5fe9141 100644
--- a/install-lib-links.mk
+++ b/install-lib-links.mk
@@ -19,6 +19,7 @@ clean-local:
for f in $(notdir $(lib_LTLIBRARIES:%.la=.libs/%.$(LIB_EXT)*)); do \
$(RM) $(top_builddir)/$(LIB_DIR)/$$f; \
done;
+ $(RM) .install-mesa-links
endif
endif
commit 04dc301669693e8b34a98d759f3c7378a6c43cc7
Author: Eduardo Lima Mitev <elima at igalia.com>
Date: Mon Feb 2 18:14:47 2015 +0100
mesa: Fix error validating args for TexSubImage3D
The zoffset and depth values were not being considered when calling
error_check_subtexture_dimensions().
Fixes 2 dEQP tests:
* dEQP-GLES3.functional.negative_api.texture.texsubimage3d_neg_offset
* dEQP-GLES3.functional.negative_api.texture.texsubimage3d_invalid_offset
Reviewed-by: Brian Paul <brianp at vmware.com>
Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
Cc: "10.4 10.5" <mesa-stable at lists.freedestkop.org>
(cherry picked from commit 2aa71e9485a5a062b1bd2dd8bdc081a8fa4c873d)
diff --git a/src/mesa/main/teximage.c b/src/mesa/main/teximage.c
index 29c325b..c9c48bb 100644
--- a/src/mesa/main/teximage.c
+++ b/src/mesa/main/teximage.c
@@ -2491,8 +2491,8 @@ texsubimage_error_check(struct gl_context *ctx, GLuint dimensions,
}
if (error_check_subtexture_dimensions(ctx, dimensions,
- texImage, xoffset, yoffset, 0,
- width, height, 1,
+ texImage, xoffset, yoffset, zoffset,
+ width, height, depth,
dsa ? "glTextureSubImage" :
"glTexSubImage")) {
return GL_TRUE;
commit 4952a376972bcb29be0c15a33d1d5fc23f35cae5
Author: Vivek Kasireddy <vivek.kasireddy at intel.com>
Date: Tue Feb 10 19:15:31 2015 -0800
egl, wayland: RGB565 format support on Back-buffer
In current code, color format is always hardcoded to
__DRI_IMAGE_FORMAT_ARGB8888 when buffer or DRI image is
allocated in function calls, get_back_bo and dri2_get_buffers,
regardless of current target's color format. This problem
may leads to incorrect render pitch calculation, which
eventually ends up with wrong offset of pixels in
the frame buffer when the image is in different color format
from dri surf's, especially with different bpp. (e.g. RGB565-16bpp)
Attached code patch simply adds RGB565 and XRGB8888 cases to two
functions noted above to resolve the issue.
v2: added a case of XRGB8888, format and bpp selection is done
via switch-case (not "if-else" anymore)
Signed-off-by: Vivek Kasireddy <vivek.kasireddy at intel.com>
Signed-off-by: Dongwon Kim <dongwon.kim at intel.com>
Reviewed-by: Kristian Høgsberg <krh at bitplanet.net>
Cc: "10.5" <mesa-stable at lists.freedesktop.org>
(cherry picked from commit 1e96eece300bbd2dd621a4941a4418222bb4c8e5)
diff --git a/src/egl/drivers/dri2/platform_wayland.c b/src/egl/drivers/dri2/platform_wayland.c
index 3c34e07..07f68a2 100644
--- a/src/egl/drivers/dri2/platform_wayland.c
+++ b/src/egl/drivers/dri2/platform_wayland.c
@@ -292,6 +292,26 @@ get_back_bo(struct dri2_egl_surface *dri2_surf)
struct dri2_egl_display *dri2_dpy =
dri2_egl_display(dri2_surf->base.Resource.Display);
int i;
+ unsigned int dri_image_format;
+
+ /* currently supports three WL DRM formats,
+ * WL_DRM_FORMAT_ARGB8888, WL_DRM_FORMAT_XRGB8888,
+ * and WL_DRM_FORMAT_RGB565
+ */
+ switch (dri2_surf->format) {
+ case WL_DRM_FORMAT_ARGB8888:
+ dri_image_format = __DRI_IMAGE_FORMAT_ARGB8888;
+ break;
+ case WL_DRM_FORMAT_XRGB8888:
+ dri_image_format = __DRI_IMAGE_FORMAT_XRGB8888;
+ break;
+ case WL_DRM_FORMAT_RGB565:
+ dri_image_format = __DRI_IMAGE_FORMAT_RGB565;
+ break;
+ default:
+ /* format is not supported */
+ return -1;
+ }
/* We always want to throttle to some event (either a frame callback or
* a sync request) after the commit so that we can be sure the
@@ -322,7 +342,7 @@ get_back_bo(struct dri2_egl_surface *dri2_surf)
dri2_dpy->image->createImage(dri2_dpy->dri_screen,
dri2_surf->base.Width,
dri2_surf->base.Height,
- __DRI_IMAGE_FORMAT_ARGB8888,
+ dri_image_format,
__DRI_IMAGE_USE_SHARE,
NULL);
dri2_surf->back->age = 0;
@@ -462,11 +482,26 @@ dri2_wl_get_buffers(__DRIdrawable * driDrawable,
unsigned int *attachments, int count,
int *out_count, void *loaderPrivate)
{
+ struct dri2_egl_surface *dri2_surf = loaderPrivate;
unsigned int *attachments_with_format;
__DRIbuffer *buffer;
- const unsigned int format = 32;
+ unsigned int bpp;
+
int i;
+ switch (dri2_surf->format) {
+ case WL_DRM_FORMAT_ARGB8888:
+ case WL_DRM_FORMAT_XRGB8888:
+ bpp = 32;
+ break;
+ case WL_DRM_FORMAT_RGB565:
+ bpp = 16;
+ break;
+ default:
+ /* format is not supported */
+ return NULL;
+ }
+
attachments_with_format = calloc(count, 2 * sizeof(unsigned int));
if (!attachments_with_format) {
*out_count = 0;
@@ -475,7 +510,7 @@ dri2_wl_get_buffers(__DRIdrawable * driDrawable,
for (i = 0; i < count; ++i) {
attachments_with_format[2*i] = attachments[i];
- attachments_with_format[2*i + 1] = format;
+ attachments_with_format[2*i + 1] = bpp;
}
buffer =
commit aac12f4542d667215772088a0e67c80838e783da
Author: Matt Turner <mattst88 at gmail.com>
Date: Sat Feb 21 22:41:24 2015 -0800
i965: Link test programs with gtest before pthreads.
Cc: "10.5" <mesa-stable at lists.freedesktop.org>
Bugzilla: https://bugs.gentoo.org/show_bug.cgi?id=540962
(cherry picked from commit 0b6d43e329d194b01ab5cd554617f79a13f6669a)
diff --git a/src/mesa/drivers/dri/i965/Makefile.am b/src/mesa/drivers/dri/i965/Makefile.am
index 53e91fe..a675b95 100644
--- a/src/mesa/drivers/dri/i965/Makefile.am
+++ b/src/mesa/drivers/dri/i965/Makefile.am
@@ -65,32 +65,32 @@ check_PROGRAMS = $(TESTS)
test_fs_cmod_propagation_SOURCES = \
test_fs_cmod_propagation.cpp
test_fs_cmod_propagation_LDADD = \
- $(TEST_LIBS) \
- $(top_builddir)/src/gtest/libgtest.la
+ $(top_builddir)/src/gtest/libgtest.la \
+ $(TEST_LIBS)
test_fs_saturate_propagation_SOURCES = \
test_fs_saturate_propagation.cpp
test_fs_saturate_propagation_LDADD = \
- $(TEST_LIBS) \
- $(top_builddir)/src/gtest/libgtest.la
+ $(top_builddir)/src/gtest/libgtest.la \
+ $(TEST_LIBS)
test_vf_float_conversions_SOURCES = \
test_vf_float_conversions.cpp
test_vf_float_conversions_LDADD = \
- $(TEST_LIBS) \
- $(top_builddir)/src/gtest/libgtest.la
+ $(top_builddir)/src/gtest/libgtest.la \
+ $(TEST_LIBS)
test_vec4_register_coalesce_SOURCES = \
test_vec4_register_coalesce.cpp
test_vec4_register_coalesce_LDADD = \
- $(TEST_LIBS) \
- $(top_builddir)/src/gtest/libgtest.la
+ $(top_builddir)/src/gtest/libgtest.la \
+ $(TEST_LIBS)
test_vec4_copy_propagation_SOURCES = \
test_vec4_copy_propagation.cpp
test_vec4_copy_propagation_LDADD = \
- $(TEST_LIBS) \
- $(top_builddir)/src/gtest/libgtest.la
+ $(top_builddir)/src/gtest/libgtest.la \
+ $(TEST_LIBS)
test_eu_compact_SOURCES = \
test_eu_compact.c
commit 760407ff9e10c12895cb3c5006b314baf83d4c62
Author: Marek Olšák <marek.olsak at amd.com>
Date: Mon Feb 23 11:39:53 2015 +0100
radeonsi: fix point sprites
Broken by a27b74819ad375e8c0bc88e13f42c951d2b5cd6a.
This fix is critical and should be ported to stable ASAP.
Cc: 10.5 10.4 <mesa-stable at lists.freedesktop.org>
(cherry picked from commit 7820a11e3dea2aca8e2b9b4ed9faf94ff5696990)
Squashed with commit
radeonsi: fix a warning caused by previous commit
Cc: 10.5 10.4 <mesa-stable at lists.freedesktop.org>
(cherry picked from commit 050bf75c8bbaa7cad537aabaf8612129edfee3a4)
diff --git a/src/gallium/drivers/radeonsi/si_state_shaders.c b/src/gallium/drivers/radeonsi/si_state_shaders.c
index dea99ea..5b46336 100644
--- a/src/gallium/drivers/radeonsi/si_state_shaders.c
+++ b/src/gallium/drivers/radeonsi/si_state_shaders.c
@@ -661,7 +661,7 @@ bcolor:
}
}
- if (j == vsinfo->num_outputs) {
+ if (j == vsinfo->num_outputs && !G_028644_PT_SPRITE_TEX(tmp)) {
/* No corresponding output found, load defaults into input.
* Don't set any other bits.
* (FLAT_SHADE=1 completely changes behavior) */
commit 3cb2120088643a6cf9cd28bb09da8481f60350b7
Author: Marek Olšák <marek.olsak at amd.com>
Date: Fri Feb 20 20:17:39 2015 +0100
vbo: fix an unitialized-variable warning
It looks like a bug to me.
Cc: 10.5 10.4 10.3 <mesa-stable at lists.freedesktop.org>
Reviewed-by: Brian Paul <brianp at vmware.com>
(cherry picked from commit 0feb0b73731cebd1513dd7f4e6cdf6de81edb802)
diff --git a/src/mesa/vbo/vbo_attrib_tmp.h b/src/mesa/vbo/vbo_attrib_tmp.h
index ec66934..0c44540 100644
--- a/src/mesa/vbo/vbo_attrib_tmp.h
+++ b/src/mesa/vbo/vbo_attrib_tmp.h
@@ -210,6 +210,7 @@ static inline float conv_i2_to_norm_float(const struct gl_context *ctx, int i2)
} \
} else if ((type) == GL_UNSIGNED_INT_10F_11F_11F_REV) { \
float res[4]; \
+ res[3] = 1; \
r11g11b10f_to_float3((arg), res); \
ATTR##val##FV((attr), res); \
} else \
commit b97e7ad355d43129883a9372ead01e85bfac7cf6
Author: Marek Olšák <marek.olsak at amd.com>
Date: Thu Feb 19 13:03:54 2015 +0100
radeonsi: don't use SQC_CACHES to flush ICACHE and KCACHE on SI
This reverts 73c2b0d18c51459697d8ec194ecfc4438c98c139.
It doesn't seem to be reliable. It's probably missing a wait packet or
something, because it's just a register write and doesn't wait for anything.
SURFACE_SYNC at least seems to wait until the flush is done. Just guessing.
Let's not complicate things and revert this.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=88561
Cc: 10.5 <mesa-stable at lists.freedesktop.org>
Reviewed-by: Alex Deucher <alexander.deucher at amd.com>
(cherry picked from commit 7692704b144b2aa9a57767a43212ceb5aad6638a)
diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c b/src/gallium/drivers/radeonsi/si_state_draw.c
index 128ea04..511bea2 100644
--- a/src/gallium/drivers/radeonsi/si_state_draw.c
+++ b/src/gallium/drivers/radeonsi/si_state_draw.c
@@ -367,24 +367,21 @@ void si_emit_cache_flush(struct r600_common_context *sctx, struct r600_atom *ato
{
struct radeon_winsys_cs *cs = sctx->rings.gfx.cs;
uint32_t cp_coher_cntl = 0;
- uint32_t sqc_caches = 0;
uint32_t compute =
PKT3_SHADER_TYPE_S(!!(sctx->flags & SI_CONTEXT_FLAG_COMPUTE));
/* SI has a bug that it always flushes ICACHE and KCACHE if either
- * bit is set. An alternative way is to write SQC_CACHES. */
- if (sctx->chip_class == SI &&
- sctx->flags & BOTH_ICACHE_KCACHE &&
- (sctx->flags & BOTH_ICACHE_KCACHE) != BOTH_ICACHE_KCACHE) {
- sqc_caches =
- S_008C08_INST_INVALIDATE(!!(sctx->flags & SI_CONTEXT_INV_ICACHE)) |
- S_008C08_DATA_INVALIDATE(!!(sctx->flags & SI_CONTEXT_INV_KCACHE));
- } else {
- if (sctx->flags & SI_CONTEXT_INV_ICACHE)
- cp_coher_cntl |= S_0085F0_SH_ICACHE_ACTION_ENA(1);
- if (sctx->flags & SI_CONTEXT_INV_KCACHE)
- cp_coher_cntl |= S_0085F0_SH_KCACHE_ACTION_ENA(1);
- }
+ * bit is set. An alternative way is to write SQC_CACHES, but that
+ * doesn't seem to work reliably. Since the bug doesn't affect
+ * correctness (it only does more work than necessary) and
+ * the performance impact is likely negligible, there is no plan
+ * to fix it.
+ */
+
+ if (sctx->flags & SI_CONTEXT_INV_ICACHE)
+ cp_coher_cntl |= S_0085F0_SH_ICACHE_ACTION_ENA(1);
+ if (sctx->flags & SI_CONTEXT_INV_KCACHE)
+ cp_coher_cntl |= S_0085F0_SH_KCACHE_ACTION_ENA(1);
if (sctx->flags & SI_CONTEXT_INV_TC_L1)
cp_coher_cntl |= S_0085F0_TCL1_ACTION_ENA(1);
@@ -451,10 +448,6 @@ void si_emit_cache_flush(struct r600_common_context *sctx, struct r600_atom *ato
* It looks like SURFACE_SYNC flushes caches immediately and doesn't
* wait for any engines. This should be last.
*/
- if (sqc_caches) {
- r600_write_config_reg(cs, R_008C08_SQC_CACHES, sqc_caches);
- cs->buf[cs->cdw-3] |= compute; /* set the compute bit in the header */
- }
if (cp_coher_cntl) {
if (sctx->chip_class >= CIK) {
radeon_emit(cs, PKT3(PKT3_ACQUIRE_MEM, 5, 0) | compute);
commit bf563d59b255c1eb1a42c5ef54ba704c6e1ec4bd
Author: Matt Turner <mattst88 at gmail.com>
Date: Thu Feb 12 01:42:43 2015 +0000
i965/vec4: Add and use byte-MOV instruction for unpack 4x8.
Previously we were using a B/UB source in an Align16 instruction, which
is illegal. It for some reason works on all platforms, except Broadwell.
Cc: "10.5" <mesa-stable at lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=86811
Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
(cherry picked from commit e0137fd6f720e4977466b1760ac02a72c5abceb8)
diff --git a/src/mesa/drivers/dri/i965/brw_defines.h b/src/mesa/drivers/dri/i965/brw_defines.h
index a597d6b..17c27dd 100644
--- a/src/mesa/drivers/dri/i965/brw_defines.h
+++ b/src/mesa/drivers/dri/i965/brw_defines.h
@@ -911,6 +911,7 @@ enum opcode {
SHADER_OPCODE_URB_WRITE_SIMD8,
+ VEC4_OPCODE_MOV_BYTES,
VEC4_OPCODE_PACK_BYTES,
VEC4_OPCODE_UNPACK_UNIFORM,
diff --git a/src/mesa/drivers/dri/i965/brw_shader.cpp b/src/mesa/drivers/dri/i965/brw_shader.cpp
index 807b81d..31ce3db 100644
--- a/src/mesa/drivers/dri/i965/brw_shader.cpp
+++ b/src/mesa/drivers/dri/i965/brw_shader.cpp
@@ -470,6 +470,8 @@ brw_instruction_name(enum opcode op)
case SHADER_OPCODE_URB_WRITE_SIMD8:
return "gen8_urb_write_simd8";
+ case VEC4_OPCODE_MOV_BYTES:
+ return "mov_bytes";
case VEC4_OPCODE_PACK_BYTES:
return "pack_bytes";
case VEC4_OPCODE_UNPACK_UNIFORM:
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp b/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
index 898a6db..98881c9 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
@@ -1512,6 +1512,22 @@ vec4_generator::generate_code(const cfg_t *cfg)
generate_unpack_flags(inst, dst);
break;
+ case VEC4_OPCODE_MOV_BYTES: {
+ /* Moves the low byte from each channel, using an Align1 access mode
+ * and a <4,1,0> source region.
+ */
+ assert(src[0].type == BRW_REGISTER_TYPE_UB ||
+ src[0].type == BRW_REGISTER_TYPE_B);
+
+ brw_set_default_access_mode(p, BRW_ALIGN_1);
+ src[0].vstride = BRW_VERTICAL_STRIDE_4;
+ src[0].width = BRW_WIDTH_1;
+ src[0].hstride = BRW_HORIZONTAL_STRIDE_0;
+ brw_MOV(p, dst, src[0]);
+ brw_set_default_access_mode(p, BRW_ALIGN_16);
+ break;
+ }
+
case VEC4_OPCODE_PACK_BYTES: {
/* Is effectively:
*
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
index e6a7ed0..7fa75b1 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
@@ -485,7 +485,7 @@ vec4_visitor::emit_unpack_unorm_4x8(const dst_reg &dst, src_reg src0)
shifted.type = BRW_REGISTER_TYPE_UB;
dst_reg f(this, glsl_type::vec4_type);
- emit(MOV(f, src_reg(shifted)));
+ emit(VEC4_OPCODE_MOV_BYTES, f, src_reg(shifted));
emit(MUL(dst, src_reg(f), src_reg(1.0f / 255.0f)));
}
@@ -507,7 +507,7 @@ vec4_visitor::emit_unpack_snorm_4x8(const dst_reg &dst, src_reg src0)
shifted.type = BRW_REGISTER_TYPE_B;
dst_reg f(this, glsl_type::vec4_type);
- emit(MOV(f, src_reg(shifted)));
+ emit(VEC4_OPCODE_MOV_BYTES, f, src_reg(shifted));
dst_reg scaled(this, glsl_type::vec4_type);
emit(MUL(scaled, src_reg(f), src_reg(1.0f / 127.0f)));
commit 7f7c35e85400696c165bf94ed8051eb5f7381376
Author: Matt Turner <mattst88 at gmail.com>
Date: Tue Feb 10 16:25:47 2015 -0800
i965/fs: Consider MOV.SAT to interfere if it has a source modifier.
The saturate propagation pass recognizes that the second instruction
below does not interfere with an attempt to propagate the saturate
modifier from instruction 3 to 1.
1: add(8) dst0 src0 src1
2: mov.sat(8) dst1 dst0
3: mov.sat(8) dst2 dst0
Unfortunately, we did not consider the case of instruction 2 having a
source modifier on dst0. Take for instance:
1: add(8) dst0 src0 src1
2: mov.sat(8) dst1 -dst0
3: mov.sat(8) dst2 dst0
Consider such an instruction to interfere. Increase instruction counts
in Anomaly 2, which could be a bug fix depending on the values the first
instruction produces.
instructions in affected programs: 53228 -> 53934 (1.33%)
HURT: 360
Cc: <mesa-stable at lists.freedesktop.org>
Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
(cherry picked from commit 7f8dd91d166e49d7da98f90d6428dc2705fb96d0)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_saturate_propagation.cpp b/src/mesa/drivers/dri/i965/brw_fs_saturate_propagation.cpp
index bc51661..e406c28 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_saturate_propagation.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_saturate_propagation.cpp
@@ -81,12 +81,16 @@ opt_saturate_propagation_local(fs_visitor *v, bblock_t *block)
break;
}
for (int i = 0; i < scan_inst->sources; i++) {
- if ((scan_inst->opcode != BRW_OPCODE_MOV || !scan_inst->saturate) &&
- scan_inst->src[i].file == GRF &&
+ if (scan_inst->src[i].file == GRF &&
scan_inst->src[i].reg == inst->src[0].reg &&
scan_inst->src[i].reg_offset == inst->src[0].reg_offset) {
- interfered = true;
- break;
+ if (scan_inst->opcode != BRW_OPCODE_MOV ||
+ !scan_inst->saturate ||
+ scan_inst->src[0].abs ||
+ scan_inst->src[0].negate) {
+ interfered = true;
+ break;
+ }
}
}
diff --git a/src/mesa/drivers/dri/i965/test_fs_saturate_propagation.cpp b/src/mesa/drivers/dri/i965/test_fs_saturate_propagation.cpp
index f897bdd..6f762bc 100644
--- a/src/mesa/drivers/dri/i965/test_fs_saturate_propagation.cpp
+++ b/src/mesa/drivers/dri/i965/test_fs_saturate_propagation.cpp
@@ -393,3 +393,47 @@ TEST_F(saturate_propagation_test, intervening_dest_write)
EXPECT_EQ(BRW_OPCODE_MOV, instruction(block0, 2)->opcode);
EXPECT_TRUE(instruction(block0, 2)->saturate);
}
+
+TEST_F(saturate_propagation_test, mul_neg_mov_sat_mov_sat)
+{
+ fs_reg dst0 = v->vgrf(glsl_type::float_type);
+ fs_reg dst1 = v->vgrf(glsl_type::float_type);
+ fs_reg dst2 = v->vgrf(glsl_type::float_type);
+ fs_reg src0 = v->vgrf(glsl_type::float_type);
+ fs_reg src1 = v->vgrf(glsl_type::float_type);
+ v->emit(BRW_OPCODE_MUL, dst0, src0, src1);
+ dst0.negate = true;
+ v->emit(BRW_OPCODE_MOV, dst1, dst0)
+ ->saturate = true;
+ dst0.negate = false;
+ v->emit(BRW_OPCODE_MOV, dst2, dst0)
+ ->saturate = true;
+
+ /* = Before =
+ *
+ * 0: mul(8) dst0 src0 src1
+ * 1: mov.sat(8) dst1 -dst0
+ * 2: mov.sat(8) dst2 dst0
+ *
+ * = After =
+ * (no changes)
+ */
+
+ v->calculate_cfg();
+ bblock_t *block0 = v->cfg->blocks[0];
+
+ EXPECT_EQ(0, block0->start_ip);
+ EXPECT_EQ(2, block0->end_ip);
+
+ EXPECT_FALSE(saturate_propagation(v));
+ EXPECT_EQ(0, block0->start_ip);
+ EXPECT_EQ(2, block0->end_ip);
+ EXPECT_EQ(BRW_OPCODE_MUL, instruction(block0, 0)->opcode);
+ EXPECT_FALSE(instruction(block0, 0)->saturate);
+ EXPECT_FALSE(instruction(block0, 0)->src[1].negate);
+ EXPECT_EQ(BRW_OPCODE_MOV, instruction(block0, 1)->opcode);
+ EXPECT_TRUE(instruction(block0, 1)->saturate);
+ EXPECT_TRUE(instruction(block0, 1)->src[0].negate);
+ EXPECT_EQ(BRW_OPCODE_MOV, instruction(block0, 2)->opcode);
+ EXPECT_TRUE(instruction(block0, 2)->saturate);
+}
commit b554a10e8297150b8bae0338dbdbfdb6d99b3c5d
Author: Matt Turner <mattst88 at gmail.com>
Date: Tue Jan 27 22:43:28 2015 -0800
i965/fs: Use fs_inst::overwrites_reg() in saturate propagation.
This is safer and matches the conditional_mod propagation pass.
Cc: <mesa-stable at lists.freedesktop.org>
Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
(cherry picked from commit 871ad3f08bc34e16fdd728e9a4821b9a83e509f0)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_saturate_propagation.cpp b/src/mesa/drivers/dri/i965/brw_fs_saturate_propagation.cpp
index a9966a4..bc51661 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_saturate_propagation.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_saturate_propagation.cpp
@@ -64,10 +64,10 @@ opt_saturate_propagation_local(fs_visitor *v, bblock_t *block)
bool interfered = false;
foreach_inst_in_block_reverse_starting_from(fs_inst, scan_inst, inst, block) {
- if (scan_inst->dst.file == GRF &&
- scan_inst->dst.reg == inst->src[0].reg &&
- scan_inst->dst.reg_offset == inst->src[0].reg_offset &&
- !scan_inst->is_partial_write()) {
+ if (scan_inst->overwrites_reg(inst->src[0])) {
+ if (scan_inst->is_partial_write())
+ break;
+
if (scan_inst->saturate) {
inst->saturate = false;
progress = true;
diff --git a/src/mesa/drivers/dri/i965/test_fs_saturate_propagation.cpp b/src/mesa/drivers/dri/i965/test_fs_saturate_propagation.cpp
index 2000830..f897bdd 100644
--- a/src/mesa/drivers/dri/i965/test_fs_saturate_propagation.cpp
+++ b/src/mesa/drivers/dri/i965/test_fs_saturate_propagation.cpp
@@ -353,3 +353,43 @@ TEST_F(saturate_propagation_test, intervening_saturating_copy)
EXPECT_EQ(BRW_OPCODE_MOV, instruction(block0, 2)->opcode);
EXPECT_FALSE(instruction(block0, 2)->saturate);
}
+
+TEST_F(saturate_propagation_test, intervening_dest_write)
+{
+ fs_reg dst0 = v->vgrf(glsl_type::vec4_type);
+ fs_reg dst1 = v->vgrf(glsl_type::float_type);
+ fs_reg src0 = v->vgrf(glsl_type::float_type);
+ fs_reg src1 = v->vgrf(glsl_type::float_type);
+ fs_reg src2 = v->vgrf(glsl_type::vec2_type);
+ v->emit(BRW_OPCODE_ADD, offset(dst0, 2), src0, src1);
+ v->emit(SHADER_OPCODE_TEX, dst0, src2)
+ ->regs_written = 4;
+ v->emit(BRW_OPCODE_MOV, dst1, offset(dst0, 2))
+ ->saturate = true;
+
+ /* = Before =
+ *
+ * 0: add(8) dst0+2 src0 src1
+ * 1: tex(8) rlen 4 dst0+0 src2
+ * 2: mov.sat(8) dst1 dst0+2
+ *
+ * = After =
+ * (no changes)
+ */
+
+ v->calculate_cfg();
+ bblock_t *block0 = v->cfg->blocks[0];
+
+ EXPECT_EQ(0, block0->start_ip);
+ EXPECT_EQ(2, block0->end_ip);
+
+ EXPECT_FALSE(saturate_propagation(v));
+ EXPECT_EQ(0, block0->start_ip);
+ EXPECT_EQ(2, block0->end_ip);
+ EXPECT_EQ(BRW_OPCODE_ADD, instruction(block0, 0)->opcode);
+ EXPECT_FALSE(instruction(block0, 0)->saturate);
+ EXPECT_EQ(SHADER_OPCODE_TEX, instruction(block0, 1)->opcode);
+ EXPECT_FALSE(instruction(block0, 0)->saturate);
+ EXPECT_EQ(BRW_OPCODE_MOV, instruction(block0, 2)->opcode);
+ EXPECT_TRUE(instruction(block0, 2)->saturate);
+}
commit 11cab7b36a9736bf9feb78ad1dfdabb1850998f7
Author: Matt Turner <mattst88 at gmail.com>
Date: Tue Feb 10 13:38:07 2015 -0800
i965/fs: Add unit tests for saturate propagation pass.
Cc: <mesa-stable at lists.freedesktop.org>
Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
(cherry picked from commit bf3389ec49a158e0b66db8e038d801eacabd20f1)
diff --git a/src/mesa/drivers/dri/i965/Makefile.am b/src/mesa/drivers/dri/i965/Makefile.am
index 07eefce..53e91fe 100644
--- a/src/mesa/drivers/dri/i965/Makefile.am
+++ b/src/mesa/drivers/dri/i965/Makefile.am
@@ -54,6 +54,7 @@ TEST_LIBS = \
TESTS = \
test_fs_cmod_propagation \
+ test_fs_saturate_propagation \
test_eu_compact \
test_vf_float_conversions \
test_vec4_copy_propagation \
@@ -67,6 +68,12 @@ test_fs_cmod_propagation_LDADD = \
$(TEST_LIBS) \
$(top_builddir)/src/gtest/libgtest.la
+test_fs_saturate_propagation_SOURCES = \
+ test_fs_saturate_propagation.cpp
+test_fs_saturate_propagation_LDADD = \
+ $(TEST_LIBS) \
+ $(top_builddir)/src/gtest/libgtest.la
+
test_vf_float_conversions_SOURCES = \
test_vf_float_conversions.cpp
test_vf_float_conversions_LDADD = \
diff --git a/src/mesa/drivers/dri/i965/test_fs_saturate_propagation.cpp b/src/mesa/drivers/dri/i965/test_fs_saturate_propagation.cpp
new file mode 100644
index 0000000..2000830
--- /dev/null
+++ b/src/mesa/drivers/dri/i965/test_fs_saturate_propagation.cpp
@@ -0,0 +1,355 @@
+/*
+ * Copyright © 2015 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ */
+
+#include <gtest/gtest.h>
+#include "brw_fs.h"
+#include "brw_cfg.h"
+#include "program/program.h"
+
+class saturate_propagation_test : public ::testing::Test {
+ virtual void SetUp();
+
+public:
+ struct brw_context *brw;
+ struct gl_context *ctx;
+ struct brw_wm_prog_data *prog_data;
+ struct gl_shader_program *shader_prog;
+ struct brw_fragment_program *fp;
+ fs_visitor *v;
+};
+
+class saturate_propagation_fs_visitor : public fs_visitor
+{
+public:
+ saturate_propagation_fs_visitor(struct brw_context *brw,
+ struct brw_wm_prog_data *prog_data,
+ struct gl_shader_program *shader_prog)
+ : fs_visitor(brw, NULL, NULL, prog_data, shader_prog, NULL, 8) {}
+};
+
+
+void saturate_propagation_test::SetUp()
+{
+ brw = (struct brw_context *)calloc(1, sizeof(*brw));
+ ctx = &brw->ctx;
+
+ fp = ralloc(NULL, struct brw_fragment_program);
+ prog_data = ralloc(NULL, struct brw_wm_prog_data);
+ shader_prog = ralloc(NULL, struct gl_shader_program);
+
+ v = new saturate_propagation_fs_visitor(brw, prog_data, shader_prog);
+
+ _mesa_init_fragment_program(ctx, &fp->program, GL_FRAGMENT_SHADER, 0);
+
+ brw->gen = 4;
+}
+
+static fs_inst *
+instruction(bblock_t *block, int num)
+{
+ fs_inst *inst = (fs_inst *)block->start();
+ for (int i = 0; i < num; i++) {
+ inst = (fs_inst *)inst->next;
+ }
+ return inst;
+}
+
+static bool
+saturate_propagation(fs_visitor *v)
+{
+ const bool print = false;
+
+ if (print) {
+ fprintf(stderr, "= Before =\n");
+ v->cfg->dump(v);
+ }
+
+ bool ret = v->opt_saturate_propagation();
+
+ if (print) {
+ fprintf(stderr, "\n= After =\n");
+ v->cfg->dump(v);
+ }
+
+ return ret;
+}
+
+TEST_F(saturate_propagation_test, basic)
+{
+ fs_reg dst0 = v->vgrf(glsl_type::float_type);
+ fs_reg dst1 = v->vgrf(glsl_type::float_type);
+ fs_reg src0 = v->vgrf(glsl_type::float_type);
+ fs_reg src1 = v->vgrf(glsl_type::float_type);
+ v->emit(BRW_OPCODE_ADD, dst0, src0, src1);
+ v->emit(BRW_OPCODE_MOV, dst1, dst0)
+ ->saturate = true;
+
+ /* = Before =
+ *
+ * 0: add(8) dst0 src0 src1
+ * 1: mov.sat(8) dst1 dst0
+ *
+ * = After =
+ * 0: add.sat(8) dst0 src0 src1
+ * 1: mov(8) dst1 dst0
+ */
+
+ v->calculate_cfg();
+ bblock_t *block0 = v->cfg->blocks[0];
+
+ EXPECT_EQ(0, block0->start_ip);
+ EXPECT_EQ(1, block0->end_ip);
+
+ EXPECT_TRUE(saturate_propagation(v));
+ EXPECT_EQ(0, block0->start_ip);
+ EXPECT_EQ(1, block0->end_ip);
+ EXPECT_EQ(BRW_OPCODE_ADD, instruction(block0, 0)->opcode);
+ EXPECT_TRUE(instruction(block0, 0)->saturate);
+ EXPECT_EQ(BRW_OPCODE_MOV, instruction(block0, 1)->opcode);
+ EXPECT_FALSE(instruction(block0, 1)->saturate);
+}
+
+TEST_F(saturate_propagation_test, other_non_saturated_use)
+{
+ fs_reg dst0 = v->vgrf(glsl_type::float_type);
+ fs_reg dst1 = v->vgrf(glsl_type::float_type);
+ fs_reg dst2 = v->vgrf(glsl_type::float_type);
+ fs_reg src0 = v->vgrf(glsl_type::float_type);
+ fs_reg src1 = v->vgrf(glsl_type::float_type);
+ v->emit(BRW_OPCODE_ADD, dst0, src0, src1);
+ v->emit(BRW_OPCODE_MOV, dst1, dst0)
+ ->saturate = true;
+ v->emit(BRW_OPCODE_ADD, dst2, dst0, src0);
+
+ /* = Before =
+ *
+ * 0: add(8) dst0 src0 src1
+ * 1: mov.sat(8) dst1 dst0
+ * 2: add(8) dst2 dst0 src0
+ *
+ * = After =
+ * (no changes)
+ */
+
+ v->calculate_cfg();
+ bblock_t *block0 = v->cfg->blocks[0];
+
+ EXPECT_EQ(0, block0->start_ip);
+ EXPECT_EQ(2, block0->end_ip);
+
+ EXPECT_FALSE(saturate_propagation(v));
+ EXPECT_EQ(0, block0->start_ip);
+ EXPECT_EQ(2, block0->end_ip);
+ EXPECT_EQ(BRW_OPCODE_ADD, instruction(block0, 0)->opcode);
+ EXPECT_FALSE(instruction(block0, 0)->saturate);
+ EXPECT_EQ(BRW_OPCODE_MOV, instruction(block0, 1)->opcode);
+ EXPECT_TRUE(instruction(block0, 1)->saturate);
+ EXPECT_EQ(BRW_OPCODE_ADD, instruction(block0, 2)->opcode);
+}
+
+TEST_F(saturate_propagation_test, predicated_instruction)
+{
+ fs_reg dst0 = v->vgrf(glsl_type::float_type);
+ fs_reg dst1 = v->vgrf(glsl_type::float_type);
+ fs_reg src0 = v->vgrf(glsl_type::float_type);
+ fs_reg src1 = v->vgrf(glsl_type::float_type);
+ v->emit(BRW_OPCODE_ADD, dst0, src0, src1)
+ ->predicate = BRW_PREDICATE_NORMAL;
+ v->emit(BRW_OPCODE_MOV, dst1, dst0)
+ ->saturate = true;
+
+ /* = Before =
+ *
+ * 0: (+f0) add(8) dst0 src0 src1
+ * 1: mov.sat(8) dst1 dst0
+ *
+ * = After =
+ * (no changes)
+ */
+
+ v->calculate_cfg();
+ bblock_t *block0 = v->cfg->blocks[0];
+
+ EXPECT_EQ(0, block0->start_ip);
+ EXPECT_EQ(1, block0->end_ip);
+
+ EXPECT_FALSE(saturate_propagation(v));
+ EXPECT_EQ(0, block0->start_ip);
+ EXPECT_EQ(1, block0->end_ip);
+ EXPECT_EQ(BRW_OPCODE_ADD, instruction(block0, 0)->opcode);
+ EXPECT_FALSE(instruction(block0, 0)->saturate);
+ EXPECT_EQ(BRW_OPCODE_MOV, instruction(block0, 1)->opcode);
+ EXPECT_TRUE(instruction(block0, 1)->saturate);
+}
+
+TEST_F(saturate_propagation_test, neg_mov_sat)
+{
+ fs_reg dst0 = v->vgrf(glsl_type::float_type);
+ fs_reg dst1 = v->vgrf(glsl_type::float_type);
+ fs_reg src0 = v->vgrf(glsl_type::float_type);
+ fs_reg src1 = v->vgrf(glsl_type::float_type);
+ v->emit(BRW_OPCODE_ADD, dst0, src0, src1);
+ dst0.negate = true;
+ v->emit(BRW_OPCODE_MOV, dst1, dst0)
+ ->saturate = true;
+
+ /* = Before =
+ *
+ * 0: add(8) dst0 src0 src1
+ * 1: mov.sat(8) dst1 -dst0
+ *
+ * = After =
+ * (no changes)
+ */
+
+ v->calculate_cfg();
+ bblock_t *block0 = v->cfg->blocks[0];
+
+ EXPECT_EQ(0, block0->start_ip);
+ EXPECT_EQ(1, block0->end_ip);
+
+ EXPECT_FALSE(saturate_propagation(v));
+ EXPECT_EQ(0, block0->start_ip);
+ EXPECT_EQ(1, block0->end_ip);
+ EXPECT_EQ(BRW_OPCODE_ADD, instruction(block0, 0)->opcode);
+ EXPECT_FALSE(instruction(block0, 0)->saturate);
+ EXPECT_EQ(BRW_OPCODE_MOV, instruction(block0, 1)->opcode);
+ EXPECT_TRUE(instruction(block0, 1)->saturate);
+}
+
+TEST_F(saturate_propagation_test, abs_mov_sat)
+{
+ fs_reg dst0 = v->vgrf(glsl_type::float_type);
+ fs_reg dst1 = v->vgrf(glsl_type::float_type);
+ fs_reg src0 = v->vgrf(glsl_type::float_type);
+ fs_reg src1 = v->vgrf(glsl_type::float_type);
+ v->emit(BRW_OPCODE_ADD, dst0, src0, src1);
+ dst0.abs = true;
+ v->emit(BRW_OPCODE_MOV, dst1, dst0)
+ ->saturate = true;
+
+ /* = Before =
+ *
+ * 0: add(8) dst0 src0 src1
+ * 1: mov.sat(8) dst1 (abs)dst0
+ *
+ * = After =
+ * (no changes)
+ */
+
+ v->calculate_cfg();
+ bblock_t *block0 = v->cfg->blocks[0];
+
+ EXPECT_EQ(0, block0->start_ip);
+ EXPECT_EQ(1, block0->end_ip);
+
+ EXPECT_FALSE(saturate_propagation(v));
+ EXPECT_EQ(0, block0->start_ip);
+ EXPECT_EQ(1, block0->end_ip);
+ EXPECT_EQ(BRW_OPCODE_ADD, instruction(block0, 0)->opcode);
+ EXPECT_FALSE(instruction(block0, 0)->saturate);
+ EXPECT_EQ(BRW_OPCODE_MOV, instruction(block0, 1)->opcode);
+ EXPECT_TRUE(instruction(block0, 1)->saturate);
+}
+
+TEST_F(saturate_propagation_test, producer_saturates)
+{
+ fs_reg dst0 = v->vgrf(glsl_type::float_type);
+ fs_reg dst1 = v->vgrf(glsl_type::float_type);
+ fs_reg dst2 = v->vgrf(glsl_type::float_type);
+ fs_reg src0 = v->vgrf(glsl_type::float_type);
+ fs_reg src1 = v->vgrf(glsl_type::float_type);
+ v->emit(BRW_OPCODE_ADD, dst0, src0, src1)
+ ->saturate = true;
+ v->emit(BRW_OPCODE_MOV, dst1, dst0)
+ ->saturate = true;
+ v->emit(BRW_OPCODE_MOV, dst2, dst0);
+
+ /* = Before =
+ *
+ * 0: add.sat(8) dst0 src0 src1
+ * 1: mov.sat(8) dst1 dst0
+ * 2: mov(8) dst2 dst0
+ *
+ * = After =
+ * 0: add.sat(8) dst0 src0 src1
+ * 1: mov(8) dst1 dst0
+ * 2: mov(8) dst2 dst0
+ */
+
+ v->calculate_cfg();
+ bblock_t *block0 = v->cfg->blocks[0];
+
+ EXPECT_EQ(0, block0->start_ip);
+ EXPECT_EQ(2, block0->end_ip);
+
+ EXPECT_TRUE(saturate_propagation(v));
+ EXPECT_EQ(0, block0->start_ip);
+ EXPECT_EQ(2, block0->end_ip);
+ EXPECT_EQ(BRW_OPCODE_ADD, instruction(block0, 0)->opcode);
+ EXPECT_TRUE(instruction(block0, 0)->saturate);
+ EXPECT_EQ(BRW_OPCODE_MOV, instruction(block0, 1)->opcode);
+ EXPECT_FALSE(instruction(block0, 1)->saturate);
+}
+
+TEST_F(saturate_propagation_test, intervening_saturating_copy)
+{
+ fs_reg dst0 = v->vgrf(glsl_type::float_type);
+ fs_reg dst1 = v->vgrf(glsl_type::float_type);
+ fs_reg dst2 = v->vgrf(glsl_type::float_type);
+ fs_reg src0 = v->vgrf(glsl_type::float_type);
+ fs_reg src1 = v->vgrf(glsl_type::float_type);
+ v->emit(BRW_OPCODE_ADD, dst0, src0, src1);
+ v->emit(BRW_OPCODE_MOV, dst1, dst0)
+ ->saturate = true;
+ v->emit(BRW_OPCODE_MOV, dst2, dst0)
+ ->saturate = true;
+
+ /* = Before =
+ *
+ * 0: add(8) dst0 src0 src1
+ * 1: mov.sat(8) dst1 dst0
+ * 2: mov.sat(8) dst2 dst0
+ *
+ * = After =
+ * 0: add.sat(8) dst0 src0 src1
+ * 1: mov(8) dst1 dst0
+ * 2: mov(8) dst2 dst0
+ */
+
+ v->calculate_cfg();
+ bblock_t *block0 = v->cfg->blocks[0];
+
+ EXPECT_EQ(0, block0->start_ip);
+ EXPECT_EQ(2, block0->end_ip);
+
+ EXPECT_TRUE(saturate_propagation(v));
+ EXPECT_EQ(0, block0->start_ip);
+ EXPECT_EQ(2, block0->end_ip);
+ EXPECT_EQ(BRW_OPCODE_ADD, instruction(block0, 0)->opcode);
+ EXPECT_TRUE(instruction(block0, 0)->saturate);
+ EXPECT_EQ(BRW_OPCODE_MOV, instruction(block0, 1)->opcode);
+ EXPECT_FALSE(instruction(block0, 1)->saturate);
+ EXPECT_EQ(BRW_OPCODE_MOV, instruction(block0, 2)->opcode);
+ EXPECT_FALSE(instruction(block0, 2)->saturate);
+}
commit 80ec8ee3a1839be9b647c6aae90b5a2648e899da
Author: Brian Paul <brianp at vmware.com>
Date: Wed Feb 18 11:16:55 2015 -0700
st/mesa: fix sampler view reference counting bug in glDraw/CopyPixels
Use pipe_sampler_view_reference() instead of ordinary assignment.
Also add a new sanity check assertion.
Fixes piglit gl-1.0-drawpixels-color-index test crash. But note
that the test still fails.
Cc: "10.4, 10.5" <mesa-stable at lists.freedesktop.org>
Reviewed-by: Ilia Mirkin <imirkin at alum.mit.edu>
(cherry picked from commit 62a8883f32f8a4c8c7d85390d4b17986e4018edf)
diff --git a/src/mesa/state_tracker/st_cb_drawpixels.c b/src/mesa/state_tracker/st_cb_drawpixels.c
index 939fc20..14fc139 100644
--- a/src/mesa/state_tracker/st_cb_drawpixels.c
+++ b/src/mesa/state_tracker/st_cb_drawpixels.c
@@ -1100,7 +1100,7 @@ st_DrawPixels(struct gl_context *ctx, GLint x, GLint y,
const GLfloat *color;
struct pipe_context *pipe = st->pipe;
GLboolean write_stencil = GL_FALSE, write_depth = GL_FALSE;
- struct pipe_sampler_view *sv[2];
+ struct pipe_sampler_view *sv[2] = { NULL };
int num_sampler_view = 1;
struct st_fp_variant *fpv;
struct gl_pixelstore_attrib clippedUnpack;
@@ -1154,8 +1154,9 @@ st_DrawPixels(struct gl_context *ctx, GLint x, GLint y,
color = NULL;
if (st->pixel_xfer.pixelmap_enabled) {
- sv[1] = st->pixel_xfer.pixelmap_sampler_view;
- num_sampler_view++;
+ pipe_sampler_view_reference(&sv[1],
+ st->pixel_xfer.pixelmap_sampler_view);
+ num_sampler_view++;
}
}
@@ -1176,7 +1177,8 @@ st_DrawPixels(struct gl_context *ctx, GLint x, GLint y,
if (write_stencil) {
enum pipe_format stencil_format =
util_format_stencil_only(pt->format);
-
+ /* we should not be doing pixel map/transfer (see above) */
+ assert(num_sampler_view == 1);
sv[1] = st_create_texture_sampler_view_format(st->pipe, pt,
stencil_format);
num_sampler_view++;
@@ -1467,7 +1469,7 @@ st_CopyPixels(struct gl_context *ctx, GLint srcx, GLint srcy,
struct st_renderbuffer *rbRead;
void *driver_vp, *driver_fp;
struct pipe_resource *pt;
- struct pipe_sampler_view *sv[2];
+ struct pipe_sampler_view *sv[2] = { NULL };
int num_sampler_view = 1;
GLfloat *color;
enum pipe_format srcFormat;
@@ -1516,7 +1518,8 @@ st_CopyPixels(struct gl_context *ctx, GLint srcx, GLint srcy,
driver_vp = make_passthrough_vertex_shader(st, GL_FALSE);
if (st->pixel_xfer.pixelmap_enabled) {
- sv[1] = st->pixel_xfer.pixelmap_sampler_view;
+ pipe_sampler_view_reference(&sv[1],
+ st->pixel_xfer.pixelmap_sampler_view);
num_sampler_view++;
}
}
commit d7fe0d9ce77daf4b982cc523bbeab83c562be51f
Author: Brian Paul <brianp at vmware.com>
Date: Mon Feb 16 11:23:06 2015 -0700
swrast: fix multiple color buffer writing
If a fragment program wrote to more than one color buffer, the
first fragment color got replicated to all dest buffers. This
fixes 5 piglit FBO tests, including fbo-drawbuffers-arbfp.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=45348
Cc: "10.4, 10.5" <mesa-stable at lists.freedesktop.org>
Reviewed-by: Eric Anholt <eric at anholt.net>
(cherry picked from commit 89c96afe3c0acf8f2fccaf02da02945afe8ba5f3)
diff --git a/src/mesa/swrast/s_span.c b/src/mesa/swrast/s_span.c
index caea673..321959d 100644
--- a/src/mesa/swrast/s_span.c
+++ b/src/mesa/swrast/s_span.c
@@ -933,19 +933,19 @@ clamp_colors(SWspan *span)
* \param output which fragment program color output is being processed
*/
static inline void
-convert_color_type(SWspan *span, GLenum newType, GLuint output)
+convert_color_type(SWspan *span, GLenum srcType, GLenum newType, GLuint output)
{
GLvoid *src, *dst;
- if (output > 0 || span->array->ChanType == GL_FLOAT) {
+ if (output > 0 || srcType == GL_FLOAT) {
src = span->array->attribs[VARYING_SLOT_COL0 + output];
span->array->ChanType = GL_FLOAT;
}
- else if (span->array->ChanType == GL_UNSIGNED_BYTE) {
+ else if (srcType == GL_UNSIGNED_BYTE) {
src = span->array->rgba8;
}
else {
- ASSERT(span->array->ChanType == GL_UNSIGNED_SHORT);
+ ASSERT(srcType == GL_UNSIGNED_SHORT);
src = span->array->rgba16;
}
@@ -979,7 +979,7 @@ shade_texture_span(struct gl_context *ctx, SWspan *span)
ctx->ATIFragmentShader._Enabled) {
/* programmable shading */
if (span->primitive == GL_BITMAP && span->array->ChanType != GL_FLOAT) {
- convert_color_type(span, GL_FLOAT, 0);
+ convert_color_type(span, span->array->ChanType, GL_FLOAT, 0);
}
else {
span->array->rgba = (void *) span->array->attribs[VARYING_SLOT_COL0];
@@ -1314,6 +1314,8 @@ _swrast_write_rgba_span( struct gl_context *ctx, SWspan *span)
const GLboolean multiFragOutputs =
_swrast_use_fragment_program(ctx)
&& fp->Base.OutputsWritten >= (1 << FRAG_RESULT_DATA0);
+ /* Save srcColorType because convert_color_type() can change it */
+ const GLenum srcColorType = span->array->ChanType;
GLuint buf;
for (buf = 0; buf < numBuffers; buf++) {
@@ -1325,17 +1327,18 @@ _swrast_write_rgba_span( struct gl_context *ctx, SWspan *span)
/* re-use one of the attribute array buffers for rgbaSave */
GLchan (*rgbaSave)[4] = (GLchan (*)[4]) span->array->attribs[0];
struct swrast_renderbuffer *srb = swrast_renderbuffer(rb);
- GLenum colorType = srb->ColorType;
+ const GLenum dstColorType = srb->ColorType;
- assert(colorType == GL_UNSIGNED_BYTE ||
- colorType == GL_FLOAT);
+ assert(dstColorType == GL_UNSIGNED_BYTE ||
+ dstColorType == GL_FLOAT);
/* set span->array->rgba to colors for renderbuffer's datatype */
- if (span->array->ChanType != colorType) {
- convert_color_type(span, colorType, 0);
+ if (srcColorType != dstColorType) {
+ convert_color_type(span, srcColorType, dstColorType,
+ multiFragOutputs ? buf : 0);
}
else {
- if (span->array->ChanType == GL_UNSIGNED_BYTE) {
+ if (srcColorType == GL_UNSIGNED_BYTE) {
span->array->rgba = span->array->rgba8;
}
else {
commit afe00ddc204e01c0038fbe186cbc06e4b02feadc
Author: Lucas Stach <l.stach at pengutronix.de>
Date: Thu Feb 19 14:52:49 2015 +0100
install-lib-links: don't depend on .libs directory
This snippet can be included in Makefiles that may, depending on the
project configuration, not actually build any installable libraries.
In that case we don't have anything to depend on and this part of
the makefile may be executed before the .libs directory is created,
so do not depend on it being there.
Cc: "10.3 10.4 10.5" <mesa-stable at lists.freedesktop.org>
Reviewed-by: Matt Turner <mattst88 at gmail.com>
Signed-off-by: Lucas Stach <l.stach at pengutronix.de>
(cherry picked from commit 5c1aac17adffeef9bb6171d83cc7ddd94c61c5f2)
diff --git a/install-lib-links.mk b/install-lib-links.mk
index 6976ca4..3545b26 100644
--- a/install-lib-links.mk
+++ b/install-lib-links.mk
@@ -3,9 +3,9 @@
if BUILD_SHARED
if HAVE_COMPAT_SYMLINKS
-all-local : .libs/install-mesa-links
+all-local : .install-mesa-links
-.libs/install-mesa-links : $(lib_LTLIBRARIES)
+.install-mesa-links : $(lib_LTLIBRARIES)
$(AM_V_GEN)$(MKDIR_P) $(top_builddir)/$(LIB_DIR); \
for f in $(join $(addsuffix .libs/,$(dir $(lib_LTLIBRARIES))),$(notdir $(lib_LTLIBRARIES:%.la=%.$(LIB_EXT)*))); do \
if test -h .libs/$$f; then \
commit b9b8c10273a9bf877fb9de4141a740f8a60e78df
Author: Emil Velikov <emil.l.velikov at gmail.com>
Date: Mon Feb 16 19:11:33 2015 +0000
auxiliary/vl: honour the DRI2PROTO_CFLAGS
Otherwise for non-default installations the build will fail to find the
headers and error out.
Cc: "10.5" <mesa-stable at lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov at gmail.com>
(cherry picked from commit 8a71fd8d49c6a086f9b7697bca3b1f3ae035121a)
diff --git a/src/gallium/auxiliary/Makefile.am b/src/gallium/auxiliary/Makefile.am
index 6a628e9..4b62057 100644
--- a/src/gallium/auxiliary/Makefile.am
+++ b/src/gallium/auxiliary/Makefile.am
@@ -56,6 +56,7 @@ if NEED_GALLIUM_VL
COMMON_VL_CFLAGS = \
$(AM_CFLAGS) \
$(VL_CFLAGS) \
+ $(DRI2PROTO_CFLAGS) \
$(LIBDRM_CFLAGS) \
$(GALLIUM_PIPE_LOADER_DEFINES) \
-DPIPE_SEARCH_DIR=\"$(libdir)/gallium-pipe\"
commit 7f72b69c6274d317f3babb1181a587ac4523f27b
Author: Emil Velikov <emil.l.velikov at gmail.com>
Date: Mon Feb 16 18:22:16 2015 +0000
auxiliary/vl: Build vl_winsys_dri.c only when needed.
With commit c39dbfdd0f7(auxiliary/vl: bring back the VL code for the dri
targets) we did not fully consider users of dri-swrast alone. Thus we
ended up trying to compile the dri2 specific code on platform which lack
it - Cygwin for example.
Cc: "10.5" <mesa-stable at lists.freedesktop.org>
Reported-by: Jon TURNEY <jon.turney at dronecode.org.uk>
Signed-off-by: Emil Velikov <emil.l.velikov at gmail.com>
Reviewed-by: Jon TURNEY <jon.turney at dronecode.org.uk>
(cherry picked from commit dd7b6670a29ff3ed48ba44a9fecd1890363d914f)
diff --git a/configure.ac b/configure.ac
index 21e396e..beb7a7d 100644
--- a/configure.ac
+++ b/configure.ac
@@ -1577,11 +1577,19 @@ if test "x$enable_dri" = xyes -o \
"x$enable_vdpau" = xyes -o \
"x$enable_omx" = xyes -o \
"x$enable_va" = xyes; then
- PKG_CHECK_MODULES([VL], [x11-xcb xcb xcb-dri2 >= $XCBDRI2_REQUIRED])
need_gallium_vl=yes
fi
AM_CONDITIONAL(NEED_GALLIUM_VL, test "x$need_gallium_vl" = xyes)
+if test "x$enable_xvmc" = xyes -o \
+ "x$enable_vdpau" = xyes -o \
+ "x$enable_omx" = xyes -o \
+ "x$enable_va" = xyes; then
+ PKG_CHECK_MODULES([VL], [x11-xcb xcb xcb-dri2 >= $XCBDRI2_REQUIRED])
+ need_gallium_vl_winsys=yes
+fi
+AM_CONDITIONAL(NEED_GALLIUM_VL_WINSYS, test "x$need_gallium_vl_winsys" = xyes)
+
if test "x$enable_xvmc" = xyes; then
PKG_CHECK_MODULES([XVMC], [xvmc >= $XVMC_REQUIRED])
enable_gallium_loader=$enable_shared_pipe_drivers
diff --git a/src/gallium/auxiliary/Makefile.am b/src/gallium/auxiliary/Makefile.am
index 453282a..6a628e9 100644
--- a/src/gallium/auxiliary/Makefile.am
+++ b/src/gallium/auxiliary/Makefile.am
@@ -74,6 +74,8 @@ libgalliumvl_la_CFLAGS = \
libgalliumvl_la_SOURCES = \
$(VL_SOURCES)
+if NEED_GALLIUM_VL_WINSYS
+
noinst_LTLIBRARIES += libgalliumvlwinsys.la
libgalliumvlwinsys_la_CFLAGS = \
@@ -84,6 +86,8 @@ libgalliumvlwinsys_la_SOURCES = \
endif
+endif
+
EXTRA_DIST = \
SConscript \
indices/u_indices.c \
commit 9bd832c24c38ca1268a7e73656dc20ff8ab26254
Author: Emil Velikov <emil.l.velikov at gmail.com>
Date: Thu Feb 12 15:27:28 2015 +0000
automake: Use AM_DISTCHECK_CONFIGURE_FLAGS
Currently we use DISTCHECK_CONFIGURE_FLAGS, which is reserved for
the user. As with other variables, one should use the AM_ variable
within the makefile.
Cc: "10.5" <mesa-stable at lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov at gmail.com>
Reviewed-by: Matt Turner <mattst88 at gmail.com>
(cherry picked from commit 3018c4a56aab2ac1d8d5b228e6cbf13eea68b790)
diff --git a/Makefile.am b/Makefile.am
index ccf9ac9..f4f0912 100644
--- a/Makefile.am
+++ b/Makefile.am
@@ -21,7 +21,7 @@
SUBDIRS = src
-DISTCHECK_CONFIGURE_FLAGS = \
+AM_DISTCHECK_CONFIGURE_FLAGS = \
--enable-dri3 \
--enable-gallium-tests \
--enable-gbm \
commit ae275a653aa3400332e4877a46f3b9f7cc2dcf74
Author: Michel Dänzer <michel.daenzer at amd.com>
Date: Tue Feb 17 17:03:35 2015 +0900
Revert "radeon/llvm: enable unsafe math for graphics shaders"
This reverts commit 0e9cdedd2e3943bdb7f3543a3508b883b167e427.
It caused the grass to disappear in The Talos Principle.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89069
Cc: "10.5 10.4" <mesa-stable at lists.freedesktop.org>
Reviewed-by: Tom Stellard <thomas.stellard at amd.com>
Reviewed-by: Marek Olšák <marek.olsak at amd.com>
(cherry picked from commit 4db985a5fa9ea985616a726b1770727309502d81)
diff --git a/src/gallium/drivers/radeon/radeon_llvm_emit.c b/src/gallium/drivers/radeon/radeon_llvm_emit.c
index 0f9dbab..624077c 100644
--- a/src/gallium/drivers/radeon/radeon_llvm_emit.c
+++ b/src/gallium/drivers/radeon/radeon_llvm_emit.c
@@ -80,10 +80,6 @@ void radeon_llvm_shader_type(LLVMValueRef F, unsigned type)
sprintf(Str, "%1d", llvm_type);
LLVMAddTargetDependentFunctionAttr(F, "ShaderType", Str);
-
- if (type != TGSI_PROCESSOR_COMPUTE) {
- LLVMAddTargetDependentFunctionAttr(F, "unsafe-fp-math", "true");
- }
}
static void init_r600_target()
commit 86aaa10ce7bd8e919ba5c7517a4b6b975229f83c
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Thu Jan 15 01:41:14 2015 -0800
i965: Prefer Meta over the BLT for BlitFramebuffer.
There's some debate about whether we should use Meta or BLORP,
but either should run circles around the BLT engine.
In particular, this means that Gen8+ will use the 3D engine for blits,
like we do on Gen6-7.
Improves performance in "copypixrate -blit -back" (from Mesa demos)
by 232.037% +/- 3.15795% (n=10) on Broadwell GT3e.
v2: Rebase on Laura's changes.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Matt Turner <mattst88 at gmail.com>
Cc: "10.5" <mesa-stable at lists.freedesktop.org>
(cherry picked from commit d523fefa756eef9c7a2c0d91cf4c2df10b89ed2a)
diff --git a/src/mesa/drivers/dri/i965/intel_fbo.c b/src/mesa/drivers/dri/i965/intel_fbo.c
index 3ee1a55..174cea0 100644
--- a/src/mesa/drivers/dri/i965/intel_fbo.c
+++ b/src/mesa/drivers/dri/i965/intel_fbo.c
@@ -885,6 +885,13 @@ intel_blit_framebuffer(struct gl_context *ctx,
if (mask == 0x0)
return;
+ mask = _mesa_meta_BlitFramebuffer(ctx, readFb, drawFb,
+ srcX0, srcY0, srcX1, srcY1,
+ dstX0, dstY0, dstX1, dstY1,
+ mask, filter);
+ if (mask == 0x0)
+ return;
+
if (brw->gen >= 8 && (mask & GL_STENCIL_BUFFER_BIT)) {
brw_meta_fbo_stencil_blit(brw_context(ctx), readFb, drawFb,
srcX0, srcY0, srcX1, srcY1,
@@ -902,13 +909,6 @@ intel_blit_framebuffer(struct gl_context *ctx,
if (mask == 0x0)
return;
- mask = _mesa_meta_BlitFramebuffer(ctx, readFb, drawFb,
- srcX0, srcY0, srcX1, srcY1,
- dstX0, dstY0, dstX1, dstY1,
- mask, filter);
- if (mask == 0x0)
- return;
-
_swrast_BlitFramebuffer(ctx, readFb, drawFb,
srcX0, srcY0, srcX1, srcY1,
dstX0, dstY0, dstX1, dstY1,
commit 3e513ea65c72ee08416ac8b82c6403b4c0c4096f
Author: Alan Coopersmith <alan.coopersmith at oracle.com>
Date: Sun Feb 15 16:20:25 2015 -0800
Make _mesa_swizzle_and_convert argument types in .c match those in .h
Caused Solaris Studio compilers to fail to build with errors about
incompatible function redefinitions.
Signed-off-by: Alan Coopersmith <alan.coopersmith at oracle.com>
Cc: "10.5" <mesa-stable at lists.freedesktop.org>
Reviewed-by: Emil Velikov <emil.l.velikov at gmail.com>
Reviewed-by: Brian Paul <brianp at vmware.com>
(cherry picked from commit b7ce7c00e35ceb3518d932359ed52cacd6679acb)
diff --git a/src/mesa/main/format_utils.c b/src/mesa/main/format_utils.c
index 00061de..810bb16 100644
--- a/src/mesa/main/format_utils.c
+++ b/src/mesa/main/format_utils.c
@@ -1423,8 +1423,8 @@ convert_int(void *void_dst, int num_dst_channels,
* \param[in] count the number of pixels to convert
*/
void
-_mesa_swizzle_and_convert(void *void_dst, GLenum dst_type, int num_dst_channels,
- const void *void_src, GLenum src_type, int num_src_channels,
+_mesa_swizzle_and_convert(void *void_dst, enum mesa_array_format_datatype dst_type, int num_dst_channels,
+ const void *void_src, enum mesa_array_format_datatype src_type, int num_src_channels,
const uint8_t swizzle[4], bool normalized, int count)
{
if (swizzle_convert_try_memcpy(void_dst, dst_type, num_dst_channels,
commit 2f8e96f71d038c9bde49549a3cb812d63cad9384
Author: Alan Coopersmith <alan.coopersmith at oracle.com>
Date: Sun Feb 15 16:19:06 2015 -0800
Use __typeof instead of typeof with Solaris Studio compilers
While the C compiler accepts typeof, C++ requires __typeof.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=86944
Signed-off-by: Alan Coopersmith <alan.coopersmith at oracle.com>
Cc: "10.5" <mesa-stable at lists.freedesktop.org>
Reviewed-by: Emil Velikov <emil.l.velikov at gmail.com>
Reviewed-by: Brian Paul <brianp at vmware.com>
(cherry picked from commit 4671dca0eecf7dbf3e0d0a13111813756722d57d)
diff --git a/src/util/u_atomic.h b/src/util/u_atomic.h
index cf7fff3..9f9ee2c 100644
--- a/src/util/u_atomic.h
+++ b/src/util/u_atomic.h
@@ -177,7 +177,7 @@ char _InterlockedCompareExchange8(char volatile *Destination8, char Exchange8, c
sizeof(*v) == sizeof(uint64_t) ? atomic_inc_64((uint64_t *)(v)) : \
(assert(!"should not get here"), 0))
-#define p_atomic_inc_return(v) ((typeof(*v)) \
+#define p_atomic_inc_return(v) ((__typeof(*v)) \
sizeof(*v) == sizeof(uint8_t) ? atomic_inc_8_nv ((uint8_t *)(v)) : \
sizeof(*v) == sizeof(uint16_t) ? atomic_inc_16_nv((uint16_t *)(v)) : \
sizeof(*v) == sizeof(uint32_t) ? atomic_inc_32_nv((uint32_t *)(v)) : \
@@ -191,14 +191,14 @@ char _InterlockedCompareExchange8(char volatile *Destination8, char Exchange8, c
sizeof(*v) == sizeof(uint64_t) ? atomic_dec_64((uint64_t *)(v)) : \
(assert(!"should not get here"), 0))
-#define p_atomic_dec_return(v) ((typeof(*v)) \
+#define p_atomic_dec_return(v) ((__typeof(*v)) \
sizeof(*v) == sizeof(uint8_t) ? atomic_dec_8_nv ((uint8_t *)(v)) : \
sizeof(*v) == sizeof(uint16_t) ? atomic_dec_16_nv((uint16_t *)(v)) : \
sizeof(*v) == sizeof(uint32_t) ? atomic_dec_32_nv((uint32_t *)(v)) : \
sizeof(*v) == sizeof(uint64_t) ? atomic_dec_64_nv((uint64_t *)(v)) : \
(assert(!"should not get here"), 0))
-#define p_atomic_cmpxchg(v, old, _new) ((typeof(*v)) \
+#define p_atomic_cmpxchg(v, old, _new) ((__typeof(*v)) \
sizeof(*v) == sizeof(uint8_t) ? atomic_cas_8 ((uint8_t *)(v), (uint8_t )(old), (uint8_t )(_new)) : \
sizeof(*v) == sizeof(uint16_t) ? atomic_cas_16((uint16_t *)(v), (uint16_t)(old), (uint16_t)(_new)) : \
sizeof(*v) == sizeof(uint32_t) ? atomic_cas_32((uint32_t *)(v), (uint32_t)(old), (uint32_t)(_new)) : \
commit c65ca6c815aa6dade922e29bb77977749669041d
Author: Alan Coopersmith <alan.coopersmith at oracle.com>
Date: Sun Feb 15 16:16:15 2015 -0800
Avoid fighting with Solaris headers over isnormal()
When compiling in C99 or C++11 modes, Solaris defines isnormal() as
a macro via <math.h>, which causes the function definition to become
too mangled to compile.
Signed-off-by: Alan Coopersmith <alan.coopersmith at oracle.com>
Cc: "10.5" <mesa-stable at lists.freedesktop.org>
Reviewed-by: Emil Velikov <emil.l.velikov at gmail.com>
Reviewed-by: Brian Paul <brianp at vmware.com>
(cherry picked from commit d602fbd861e2c3c5570b55f0839361a6f8bd32c7)
diff --git a/src/glsl/ir_constant_expression.cpp b/src/glsl/ir_constant_expression.cpp
index 1e8b3a3..864cb80 100644
--- a/src/glsl/ir_constant_expression.cpp
+++ b/src/glsl/ir_constant_expression.cpp
@@ -44,7 +44,7 @@ static int isnormal(double x)
{
return _fpclass(x) == _FPCLASS_NN || _fpclass(x) == _FPCLASS_PN;
}
-#elif defined(__SUNPRO_CC)
+#elif defined(__SUNPRO_CC) && !defined(isnormal)
#include <ieeefp.h>
static int isnormal(double x)
{
commit 4fa129cd9bd2ebff618fcda7c742af6c55e462ae
Author: Alan Coopersmith <alan.coopersmith at oracle.com>
Date: Sun Feb 15 14:46:29 2015 -0800
Remove extraneous ; after DECL_TYPE usage
The macro is defined to provide a trailing ; so this caused the expansion
to end in ";;" which made the Solaris Studio compilers issue warnings for
every line of:
"builtin_type_macros.h", line 113: Warning: extra ";" ignored.
for every file that included the header, filling build logs with thousands
of useless warnings.
Signed-off-by: Alan Coopersmith <alan.coopersmith at oracle.com>
Cc: "10.5" <mesa-stable at lists.freedesktop.org>
Reviewed-by: Emil Velikov <emil.l.velikov at gmail.com>
Reviewed-by: Brian Paul <brianp at vmware.com>
(cherry picked from commit 815b3bd096a3eab9f00f9270d45a6885d73180e9)
diff --git a/src/glsl/builtin_type_macros.h b/src/glsl/builtin_type_macros.h
index 236e1ce..7a21801 100644
--- a/src/glsl/builtin_type_macros.h
+++ b/src/glsl/builtin_type_macros.h
@@ -110,39 +110,39 @@ DECL_TYPE(sampler2DRectShadow, GL_SAMPLER_2D_RECT_SHADOW, GLSL_TYPE_SA
DECL_TYPE(samplerExternalOES, GL_SAMPLER_EXTERNAL_OES, GLSL_TYPE_SAMPLER, GLSL_SAMPLER_DIM_EXTERNAL, 0, 0, GLSL_TYPE_FLOAT)
-DECL_TYPE(image1D, GL_IMAGE_1D, GLSL_TYPE_IMAGE, GLSL_SAMPLER_DIM_1D, 0, 0, GLSL_TYPE_FLOAT);
-DECL_TYPE(image2D, GL_IMAGE_2D, GLSL_TYPE_IMAGE, GLSL_SAMPLER_DIM_2D, 0, 0, GLSL_TYPE_FLOAT);
-DECL_TYPE(image3D, GL_IMAGE_3D, GLSL_TYPE_IMAGE, GLSL_SAMPLER_DIM_3D, 0, 0, GLSL_TYPE_FLOAT);
-DECL_TYPE(image2DRect, GL_IMAGE_2D_RECT, GLSL_TYPE_IMAGE, GLSL_SAMPLER_DIM_RECT, 0, 0, GLSL_TYPE_FLOAT);
-DECL_TYPE(imageCube, GL_IMAGE_CUBE, GLSL_TYPE_IMAGE, GLSL_SAMPLER_DIM_CUBE, 0, 0, GLSL_TYPE_FLOAT);
-DECL_TYPE(imageBuffer, GL_IMAGE_BUFFER, GLSL_TYPE_IMAGE, GLSL_SAMPLER_DIM_BUF, 0, 0, GLSL_TYPE_FLOAT);
-DECL_TYPE(image1DArray, GL_IMAGE_1D_ARRAY, GLSL_TYPE_IMAGE, GLSL_SAMPLER_DIM_1D, 0, 1, GLSL_TYPE_FLOAT);
-DECL_TYPE(image2DArray, GL_IMAGE_2D_ARRAY, GLSL_TYPE_IMAGE, GLSL_SAMPLER_DIM_2D, 0, 1, GLSL_TYPE_FLOAT);
-DECL_TYPE(imageCubeArray, GL_IMAGE_CUBE_MAP_ARRAY, GLSL_TYPE_IMAGE, GLSL_SAMPLER_DIM_CUBE, 0, 1, GLSL_TYPE_FLOAT);
-DECL_TYPE(image2DMS, GL_IMAGE_2D_MULTISAMPLE, GLSL_TYPE_IMAGE, GLSL_SAMPLER_DIM_MS, 0, 0, GLSL_TYPE_FLOAT);
-DECL_TYPE(image2DMSArray, GL_IMAGE_2D_MULTISAMPLE_ARRAY, GLSL_TYPE_IMAGE, GLSL_SAMPLER_DIM_MS, 0, 1, GLSL_TYPE_FLOAT);
-DECL_TYPE(iimage1D, GL_INT_IMAGE_1D, GLSL_TYPE_IMAGE, GLSL_SAMPLER_DIM_1D, 0, 0, GLSL_TYPE_INT);
-DECL_TYPE(iimage2D, GL_INT_IMAGE_2D, GLSL_TYPE_IMAGE, GLSL_SAMPLER_DIM_2D, 0, 0, GLSL_TYPE_INT);
-DECL_TYPE(iimage3D, GL_INT_IMAGE_3D, GLSL_TYPE_IMAGE, GLSL_SAMPLER_DIM_3D, 0, 0, GLSL_TYPE_INT);
-DECL_TYPE(iimage2DRect, GL_INT_IMAGE_2D_RECT, GLSL_TYPE_IMAGE, GLSL_SAMPLER_DIM_RECT, 0, 0, GLSL_TYPE_INT);
-DECL_TYPE(iimageCube, GL_INT_IMAGE_CUBE, GLSL_TYPE_IMAGE, GLSL_SAMPLER_DIM_CUBE, 0, 0, GLSL_TYPE_INT);
-DECL_TYPE(iimageBuffer, GL_INT_IMAGE_BUFFER, GLSL_TYPE_IMAGE, GLSL_SAMPLER_DIM_BUF, 0, 0, GLSL_TYPE_INT);
-DECL_TYPE(iimage1DArray, GL_INT_IMAGE_1D_ARRAY, GLSL_TYPE_IMAGE, GLSL_SAMPLER_DIM_1D, 0, 1, GLSL_TYPE_INT);
-DECL_TYPE(iimage2DArray, GL_INT_IMAGE_2D_ARRAY, GLSL_TYPE_IMAGE, GLSL_SAMPLER_DIM_2D, 0, 1, GLSL_TYPE_INT);
-DECL_TYPE(iimageCubeArray, GL_INT_IMAGE_CUBE_MAP_ARRAY, GLSL_TYPE_IMAGE, GLSL_SAMPLER_DIM_CUBE, 0, 1, GLSL_TYPE_INT);
-DECL_TYPE(iimage2DMS, GL_INT_IMAGE_2D_MULTISAMPLE, GLSL_TYPE_IMAGE, GLSL_SAMPLER_DIM_MS, 0, 0, GLSL_TYPE_INT);
-DECL_TYPE(iimage2DMSArray, GL_INT_IMAGE_2D_MULTISAMPLE_ARRAY, GLSL_TYPE_IMAGE, GLSL_SAMPLER_DIM_MS, 0, 1, GLSL_TYPE_INT);
-DECL_TYPE(uimage1D, GL_UNSIGNED_INT_IMAGE_1D, GLSL_TYPE_IMAGE, GLSL_SAMPLER_DIM_1D, 0, 0, GLSL_TYPE_UINT);
-DECL_TYPE(uimage2D, GL_UNSIGNED_INT_IMAGE_2D, GLSL_TYPE_IMAGE, GLSL_SAMPLER_DIM_2D, 0, 0, GLSL_TYPE_UINT);
-DECL_TYPE(uimage3D, GL_UNSIGNED_INT_IMAGE_3D, GLSL_TYPE_IMAGE, GLSL_SAMPLER_DIM_3D, 0, 0, GLSL_TYPE_UINT);
-DECL_TYPE(uimage2DRect, GL_UNSIGNED_INT_IMAGE_2D_RECT, GLSL_TYPE_IMAGE, GLSL_SAMPLER_DIM_RECT, 0, 0, GLSL_TYPE_UINT);
-DECL_TYPE(uimageCube, GL_UNSIGNED_INT_IMAGE_CUBE, GLSL_TYPE_IMAGE, GLSL_SAMPLER_DIM_CUBE, 0, 0, GLSL_TYPE_UINT);
-DECL_TYPE(uimageBuffer, GL_UNSIGNED_INT_IMAGE_BUFFER, GLSL_TYPE_IMAGE, GLSL_SAMPLER_DIM_BUF, 0, 0, GLSL_TYPE_UINT);
-DECL_TYPE(uimage1DArray, GL_UNSIGNED_INT_IMAGE_1D_ARRAY, GLSL_TYPE_IMAGE, GLSL_SAMPLER_DIM_1D, 0, 1, GLSL_TYPE_UINT);
-DECL_TYPE(uimage2DArray, GL_UNSIGNED_INT_IMAGE_2D_ARRAY, GLSL_TYPE_IMAGE, GLSL_SAMPLER_DIM_2D, 0, 1, GLSL_TYPE_UINT);
-DECL_TYPE(uimageCubeArray, GL_UNSIGNED_INT_IMAGE_CUBE_MAP_ARRAY, GLSL_TYPE_IMAGE, GLSL_SAMPLER_DIM_CUBE, 0, 1, GLSL_TYPE_UINT);
-DECL_TYPE(uimage2DMS, GL_UNSIGNED_INT_IMAGE_2D_MULTISAMPLE, GLSL_TYPE_IMAGE, GLSL_SAMPLER_DIM_MS, 0, 0, GLSL_TYPE_UINT);
-DECL_TYPE(uimage2DMSArray, GL_UNSIGNED_INT_IMAGE_2D_MULTISAMPLE_ARRAY, GLSL_TYPE_IMAGE, GLSL_SAMPLER_DIM_MS, 0, 1, GLSL_TYPE_UINT);
+DECL_TYPE(image1D, GL_IMAGE_1D, GLSL_TYPE_IMAGE, GLSL_SAMPLER_DIM_1D, 0, 0, GLSL_TYPE_FLOAT)
+DECL_TYPE(image2D, GL_IMAGE_2D, GLSL_TYPE_IMAGE, GLSL_SAMPLER_DIM_2D, 0, 0, GLSL_TYPE_FLOAT)
+DECL_TYPE(image3D, GL_IMAGE_3D, GLSL_TYPE_IMAGE, GLSL_SAMPLER_DIM_3D, 0, 0, GLSL_TYPE_FLOAT)
+DECL_TYPE(image2DRect, GL_IMAGE_2D_RECT, GLSL_TYPE_IMAGE, GLSL_SAMPLER_DIM_RECT, 0, 0, GLSL_TYPE_FLOAT)
+DECL_TYPE(imageCube, GL_IMAGE_CUBE, GLSL_TYPE_IMAGE, GLSL_SAMPLER_DIM_CUBE, 0, 0, GLSL_TYPE_FLOAT)
+DECL_TYPE(imageBuffer, GL_IMAGE_BUFFER, GLSL_TYPE_IMAGE, GLSL_SAMPLER_DIM_BUF, 0, 0, GLSL_TYPE_FLOAT)
+DECL_TYPE(image1DArray, GL_IMAGE_1D_ARRAY, GLSL_TYPE_IMAGE, GLSL_SAMPLER_DIM_1D, 0, 1, GLSL_TYPE_FLOAT)
+DECL_TYPE(image2DArray, GL_IMAGE_2D_ARRAY, GLSL_TYPE_IMAGE, GLSL_SAMPLER_DIM_2D, 0, 1, GLSL_TYPE_FLOAT)
+DECL_TYPE(imageCubeArray, GL_IMAGE_CUBE_MAP_ARRAY, GLSL_TYPE_IMAGE, GLSL_SAMPLER_DIM_CUBE, 0, 1, GLSL_TYPE_FLOAT)
+DECL_TYPE(image2DMS, GL_IMAGE_2D_MULTISAMPLE, GLSL_TYPE_IMAGE, GLSL_SAMPLER_DIM_MS, 0, 0, GLSL_TYPE_FLOAT)
+DECL_TYPE(image2DMSArray, GL_IMAGE_2D_MULTISAMPLE_ARRAY, GLSL_TYPE_IMAGE, GLSL_SAMPLER_DIM_MS, 0, 1, GLSL_TYPE_FLOAT)
+DECL_TYPE(iimage1D, GL_INT_IMAGE_1D, GLSL_TYPE_IMAGE, GLSL_SAMPLER_DIM_1D, 0, 0, GLSL_TYPE_INT)
+DECL_TYPE(iimage2D, GL_INT_IMAGE_2D, GLSL_TYPE_IMAGE, GLSL_SAMPLER_DIM_2D, 0, 0, GLSL_TYPE_INT)
+DECL_TYPE(iimage3D, GL_INT_IMAGE_3D, GLSL_TYPE_IMAGE, GLSL_SAMPLER_DIM_3D, 0, 0, GLSL_TYPE_INT)
+DECL_TYPE(iimage2DRect, GL_INT_IMAGE_2D_RECT, GLSL_TYPE_IMAGE, GLSL_SAMPLER_DIM_RECT, 0, 0, GLSL_TYPE_INT)
+DECL_TYPE(iimageCube, GL_INT_IMAGE_CUBE, GLSL_TYPE_IMAGE, GLSL_SAMPLER_DIM_CUBE, 0, 0, GLSL_TYPE_INT)
+DECL_TYPE(iimageBuffer, GL_INT_IMAGE_BUFFER, GLSL_TYPE_IMAGE, GLSL_SAMPLER_DIM_BUF, 0, 0, GLSL_TYPE_INT)
+DECL_TYPE(iimage1DArray, GL_INT_IMAGE_1D_ARRAY, GLSL_TYPE_IMAGE, GLSL_SAMPLER_DIM_1D, 0, 1, GLSL_TYPE_INT)
+DECL_TYPE(iimage2DArray, GL_INT_IMAGE_2D_ARRAY, GLSL_TYPE_IMAGE, GLSL_SAMPLER_DIM_2D, 0, 1, GLSL_TYPE_INT)
+DECL_TYPE(iimageCubeArray, GL_INT_IMAGE_CUBE_MAP_ARRAY, GLSL_TYPE_IMAGE, GLSL_SAMPLER_DIM_CUBE, 0, 1, GLSL_TYPE_INT)
+DECL_TYPE(iimage2DMS, GL_INT_IMAGE_2D_MULTISAMPLE, GLSL_TYPE_IMAGE, GLSL_SAMPLER_DIM_MS, 0, 0, GLSL_TYPE_INT)
+DECL_TYPE(iimage2DMSArray, GL_INT_IMAGE_2D_MULTISAMPLE_ARRAY, GLSL_TYPE_IMAGE, GLSL_SAMPLER_DIM_MS, 0, 1, GLSL_TYPE_INT)
+DECL_TYPE(uimage1D, GL_UNSIGNED_INT_IMAGE_1D, GLSL_TYPE_IMAGE, GLSL_SAMPLER_DIM_1D, 0, 0, GLSL_TYPE_UINT)
+DECL_TYPE(uimage2D, GL_UNSIGNED_INT_IMAGE_2D, GLSL_TYPE_IMAGE, GLSL_SAMPLER_DIM_2D, 0, 0, GLSL_TYPE_UINT)
+DECL_TYPE(uimage3D, GL_UNSIGNED_INT_IMAGE_3D, GLSL_TYPE_IMAGE, GLSL_SAMPLER_DIM_3D, 0, 0, GLSL_TYPE_UINT)
+DECL_TYPE(uimage2DRect, GL_UNSIGNED_INT_IMAGE_2D_RECT, GLSL_TYPE_IMAGE, GLSL_SAMPLER_DIM_RECT, 0, 0, GLSL_TYPE_UINT)
+DECL_TYPE(uimageCube, GL_UNSIGNED_INT_IMAGE_CUBE, GLSL_TYPE_IMAGE, GLSL_SAMPLER_DIM_CUBE, 0, 0, GLSL_TYPE_UINT)
+DECL_TYPE(uimageBuffer, GL_UNSIGNED_INT_IMAGE_BUFFER, GLSL_TYPE_IMAGE, GLSL_SAMPLER_DIM_BUF, 0, 0, GLSL_TYPE_UINT)
+DECL_TYPE(uimage1DArray, GL_UNSIGNED_INT_IMAGE_1D_ARRAY, GLSL_TYPE_IMAGE, GLSL_SAMPLER_DIM_1D, 0, 1, GLSL_TYPE_UINT)
+DECL_TYPE(uimage2DArray, GL_UNSIGNED_INT_IMAGE_2D_ARRAY, GLSL_TYPE_IMAGE, GLSL_SAMPLER_DIM_2D, 0, 1, GLSL_TYPE_UINT)
+DECL_TYPE(uimageCubeArray, GL_UNSIGNED_INT_IMAGE_CUBE_MAP_ARRAY, GLSL_TYPE_IMAGE, GLSL_SAMPLER_DIM_CUBE, 0, 1, GLSL_TYPE_UINT)
+DECL_TYPE(uimage2DMS, GL_UNSIGNED_INT_IMAGE_2D_MULTISAMPLE, GLSL_TYPE_IMAGE, GLSL_SAMPLER_DIM_MS, 0, 0, GLSL_TYPE_UINT)
+DECL_TYPE(uimage2DMSArray, GL_UNSIGNED_INT_IMAGE_2D_MULTISAMPLE_ARRAY, GLSL_TYPE_IMAGE, GLSL_SAMPLER_DIM_MS, 0, 1, GLSL_TYPE_UINT)
DECL_TYPE(atomic_uint, GL_UNSIGNED_INT_ATOMIC_COUNTER, GLSL_TYPE_ATOMIC_UINT, 1, 1)
commit 4c2e35e0aadc6945a8f6317ec2988875fbb63f41
Author: Alan Coopersmith <alan.coopersmith at oracle.com>
Date: Thu Jan 1 12:55:27 2015 -0800
Bracket arguments to tr so they work with Solaris tr
https://www.gnu.org/savannah-checkouts/gnu/autoconf/manual/autoconf-2.69/html_node/Limitations-of-Usual-Tools.html#index-g_t_0040command_007btr_007d-1842
Without this fix, egl fails to build on Solaris, with the error:
<command-line>:0:22: error: '_EGL_PLATFORM_x11' undeclared (first use in this function)
egldisplay.c:207:31: note: in expansion of macro '_EGL_NATIVE_PLATFORM'
native_platform = _EGL_NATIVE_PLATFORM;
^
Signed-off-by: Alan Coopersmith <alan.coopersmith at oracle.com>
Reviewed-by: Matt Turner <mattst88 at gmail.com>
Reviewed-by: Emil Velikov <emil.l.velikov at gmail.com>
Cc: "10.5" <mesa-stable at lists.freedesktop.org>
(cherry picked from commit 60ad5103b9c85cbb0921082fba9401f117424f25)
diff --git a/configure.ac b/configure.ac
index 351027b..21e396e 100644
--- a/configure.ac
+++ b/configure.ac
@@ -1778,7 +1778,7 @@ done
# libEGL wants to default to the first platform specified in
# ./configure. parse that here.
if test "x$egl_platforms" != "x"; then
- FIRST_PLATFORM_CAPS=`echo $egl_platforms | sed 's| .*||' | tr 'a-z' 'A-Z'`
+ FIRST_PLATFORM_CAPS=`echo $egl_platforms | sed 's| .*||' | tr '[[a-z]]' '[[A-Z]]'`
EGL_NATIVE_PLATFORM="_EGL_PLATFORM_$FIRST_PLATFORM_CAPS"
else
EGL_NATIVE_PLATFORM="_EGL_INVALID_PLATFORM"
commit 474f33e6906de642c9635126745189e5ccbdbff1
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Tue Dec 16 18:33:39 2014 -0800
glsl: Reduce memory consumption of copy propagation passes.
opt_copy_propagation and opt_copy_propagation_elements create new ACP
and Kill sets each time they enter a new control flow block. For if
blocks, they also copy the entire existing ACP set contents into the
new set.
When we exit the control flow block, we discard the new sets. However,
we weren't freeing them - so they lived on until the pass finished.
This can waste a lot of memory (57MB on one pessimal shader).
This patch makes the pass allocate ACP entries using this->acp as the
memory context, and Kill entries out of this->kill. It also steals
kill entries when moving them from the inner kill list to the parent.
It then frees the lists, including their contents.
v2: Move ralloc_free(this->acp) just before this->acp = orig_acp
(suggested by Eric Anholt).
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Eric Anholt <eric at anholt.net>
Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
Cc: "10.5 10.4" <mesa-stable at lists.freedesktop.org>
(cherry picked from commit 76960a55e6656bb0022e9c31ae7542010da130e3)
diff --git a/src/glsl/opt_copy_propagation.cpp b/src/glsl/opt_copy_propagation.cpp
index 5c65af6..806027b 100644
--- a/src/glsl/opt_copy_propagation.cpp
+++ b/src/glsl/opt_copy_propagation.cpp
@@ -128,6 +128,9 @@ ir_copy_propagation_visitor::visit_enter(ir_function_signature *ir)
visit_list_elements(this, &ir->body);
+ ralloc_free(this->acp);
+ ralloc_free(this->kills);
+
this->kills = orig_kills;
this->acp = orig_acp;
this->killed_all = orig_killed_all;
@@ -215,7 +218,7 @@ ir_copy_propagation_visitor::handle_if_block(exec_list *instructions)
/* Populate the initial acp with a copy of the original */
foreach_in_list(acp_entry, a, orig_acp) {
- this->acp->push_tail(new(this->mem_ctx) acp_entry(a->lhs, a->rhs));
+ this->acp->push_tail(new(this->acp) acp_entry(a->lhs, a->rhs));
}
visit_list_elements(this, instructions);
@@ -226,12 +229,15 @@ ir_copy_propagation_visitor::handle_if_block(exec_list *instructions)
exec_list *new_kills = this->kills;
this->kills = orig_kills;
+ ralloc_free(this->acp);
this->acp = orig_acp;
this->killed_all = this->killed_all || orig_killed_all;
foreach_in_list(kill_entry, k, new_kills) {
kill(k->var);
}
+
+ ralloc_free(new_kills);
}
ir_visitor_status
@@ -269,6 +275,7 @@ ir_copy_propagation_visitor::visit_enter(ir_loop *ir)
exec_list *new_kills = this->kills;
this->kills = orig_kills;
+ ralloc_free(this->acp);
this->acp = orig_acp;
this->killed_all = this->killed_all || orig_killed_all;
@@ -276,6 +283,8 @@ ir_copy_propagation_visitor::visit_enter(ir_loop *ir)
kill(k->var);
}
+ ralloc_free(new_kills);
+
/* already descended into the children. */
return visit_continue_with_parent;
}
@@ -294,7 +303,7 @@ ir_copy_propagation_visitor::kill(ir_variable *var)
/* Add the LHS variable to the list of killed variables in this block.
*/
- this->kills->push_tail(new(this->mem_ctx) kill_entry(var));
+ this->kills->push_tail(new(this->kills) kill_entry(var));
}
/**
@@ -322,7 +331,7 @@ ir_copy_propagation_visitor::add_copy(ir_assignment *ir)
ir->condition = new(ralloc_parent(ir)) ir_constant(false);
this->progress = true;
} else {
- entry = new(this->mem_ctx) acp_entry(lhs_var, rhs_var);
+ entry = new(this->acp) acp_entry(lhs_var, rhs_var);
this->acp->push_tail(entry);
}
}
diff --git a/src/glsl/opt_copy_propagation_elements.cpp b/src/glsl/opt_copy_propagation_elements.cpp
index c3e55bc..353a5c6 100644
--- a/src/glsl/opt_copy_propagation_elements.cpp
+++ b/src/glsl/opt_copy_propagation_elements.cpp
@@ -156,6 +156,9 @@ ir_copy_propagation_elements_visitor::visit_enter(ir_function_signature *ir)
visit_list_elements(this, &ir->body);
+ ralloc_free(this->acp);
+ ralloc_free(this->kills);
+
this->kills = orig_kills;
this->acp = orig_acp;
this->killed_all = orig_killed_all;
@@ -173,9 +176,9 @@ ir_copy_propagation_elements_visitor::visit_leave(ir_assignment *ir)
kill_entry *k;
if (lhs)
- k = new(mem_ctx) kill_entry(var, ir->write_mask);
+ k = new(this->kills) kill_entry(var, ir->write_mask);
else
- k = new(mem_ctx) kill_entry(var, ~0);
+ k = new(this->kills) kill_entry(var, ~0);
kill(k);
}
@@ -334,7 +337,7 @@ ir_copy_propagation_elements_visitor::handle_if_block(exec_list *instructions)
/* Populate the initial acp with a copy of the original */
foreach_in_list(acp_entry, a, orig_acp) {
- this->acp->push_tail(new(this->mem_ctx) acp_entry(a));
+ this->acp->push_tail(new(this->acp) acp_entry(a));
}
visit_list_elements(this, instructions);
@@ -345,6 +348,7 @@ ir_copy_propagation_elements_visitor::handle_if_block(exec_list *instructions)
exec_list *new_kills = this->kills;
this->kills = orig_kills;
+ ralloc_free(this->acp);
this->acp = orig_acp;
this->killed_all = this->killed_all || orig_killed_all;
@@ -354,6 +358,8 @@ ir_copy_propagation_elements_visitor::handle_if_block(exec_list *instructions)
foreach_in_list_safe(kill_entry, k, new_kills) {
kill(k);
}
+
+ ralloc_free(new_kills);
}
ir_visitor_status
@@ -391,6 +397,7 @@ ir_copy_propagation_elements_visitor::visit_enter(ir_loop *ir)
exec_list *new_kills = this->kills;
this->kills = orig_kills;
+ ralloc_free(this->acp);
this->acp = orig_acp;
this->killed_all = this->killed_all || orig_killed_all;
@@ -398,6 +405,8 @@ ir_copy_propagation_elements_visitor::visit_enter(ir_loop *ir)
kill(k);
}
+ ralloc_free(new_kills);
+
/* already descended into the children. */
return visit_continue_with_parent;
}
@@ -423,6 +432,7 @@ ir_copy_propagation_elements_visitor::kill(kill_entry *k)
if (k->next)
k->remove();
+ ralloc_steal(this->kills, k);
this->kills->push_tail(k);
}
commit 20471e9423a06af8cfbd0d9bc6ccf838afa668bb
Author: Laura Ekstrand <laura at jlekstrand.net>
Date: Mon Feb 16 14:29:57 2015 -0800
main: Fixed _mesa_GetCompressedTexImage_sw to copy slices correctly.
Previously array textures were not working with GetCompressedTextureImage,
leading to failures in the test
arb_direct_state_access/getcompressedtextureimage.c.
Tested-by: Laura Ekstrand <laura at jlekstrand.net>
Reviewed-by: Brian Paul <brianp at vmware.com>
Cc: "10.4, 10.5" <mesa-stable at lists.freedesktop.org>
(cherry picked from commit 92163482bda87216764edc0beca3ca090678038d)
diff --git a/src/mesa/main/texgetimage.c b/src/mesa/main/texgetimage.c
index 405f085..7cebe62 100644
--- a/src/mesa/main/texgetimage.c
+++ b/src/mesa/main/texgetimage.c
@@ -743,7 +743,7 @@ _mesa_GetCompressedTexImage_sw(struct gl_context *ctx,
GLubyte *src;
/* map src texture buffer */
- ctx->Driver.MapTextureImage(ctx, texImage, 0,
+ ctx->Driver.MapTextureImage(ctx, texImage, slice,
0, 0, texImage->Width, texImage->Height,
GL_MAP_READ_BIT, &src, &srcRowStride);
@@ -755,7 +755,7 @@ _mesa_GetCompressedTexImage_sw(struct gl_context *ctx,
src += srcRowStride;
}
- ctx->Driver.UnmapTextureImage(ctx, texImage, 0);
+ ctx->Driver.UnmapTextureImage(ctx, texImage, slice);
/* Advance to next slice */
dest += store.TotalBytesPerRow * (store.TotalRowsPerSlice - store.CopyRowsPerSlice);
commit f0a736160b7c690d1a4aa0b0e8a634821ada7795
Author: Marek Olšák <marek.olsak at amd.com>
Date: Sun Feb 15 18:12:06 2015 +0100
radeonsi: fix a crash if a stencil ref state is set before a DSA state
+ minor indentation fixes
Discovered by Axel Davy.
This can't be reproduced with any app, because all state trackers set a DSA
state first.
Cc: 10.5 10.4 10.3 <mesa-stable at lists.freedesktop.org>
Reviewed-by: Axel Davy <axel.davy at ens.fr>
(cherry picked from commit 2ead74888a70481aa40b5b6ede42279e1917e66c)
diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c
index fb353ad..3eea0b6 100644
--- a/src/gallium/drivers/radeonsi/si_state.c
+++ b/src/gallium/drivers/radeonsi/si_state.c
@@ -735,12 +735,16 @@ static void si_delete_rs_state(struct pipe_context *ctx, void *state)
*/
static void si_update_dsa_stencil_ref(struct si_context *sctx)
{
- struct si_pm4_state *pm4 = CALLOC_STRUCT(si_pm4_state);
+ struct si_pm4_state *pm4;
struct pipe_stencil_ref *ref = &sctx->stencil_ref;
- struct si_state_dsa *dsa = sctx->queued.named.dsa;
+ struct si_state_dsa *dsa = sctx->queued.named.dsa;
- if (pm4 == NULL)
- return;
+ if (!dsa)
+ return;
+
+ pm4 = CALLOC_STRUCT(si_pm4_state);
+ if (pm4 == NULL)
+ return;
si_pm4_set_reg(pm4, R_028430_DB_STENCILREFMASK,
S_028430_STENCILTESTVAL(ref->ref_value[0]) |
commit 3a2043fddda722999a6d5fa5dbff7234c51c8df1
Author: Marek Olšák <marek.olsak at amd.com>
Date: Tue Feb 10 01:35:23 2015 +0100
mesa: fix AtomicBuffer typo in _mesa_DeleteBuffers
Cc: 10.5 10.4 10.3 <mesa-stable at lists.freedesktop.org>
Reviewed-by: Brian Paul <brianp at vmware.com>
(cherry picked from commit e8625a29fe0942af2876f0684b06c6ed01939227)
diff --git a/src/mesa/main/bufferobj.c b/src/mesa/main/bufferobj.c
index 0c1ce98..0c23b42 100644
--- a/src/mesa/main/bufferobj.c
+++ b/src/mesa/main/bufferobj.c
@@ -1226,7 +1226,7 @@ _mesa_DeleteBuffers(GLsizei n, const GLuint *ids)
}
}
- if (ctx->UniformBuffer == bufObj) {
+ if (ctx->AtomicBuffer == bufObj) {
_mesa_BindBuffer( GL_ATOMIC_COUNTER_BUFFER, 0 );
}
commit 39d823fa583dadb11edd87ab1362a8b62cc0abf3
Author: Marek Olšák <marek.olsak at amd.com>
Date: Fri Feb 6 18:00:50 2015 +0100
radeonsi: small fix in SPI state
Cc: 10.5 10.4 <mesa-stable at lists.freedesktop.org>
Reviewed-by: Michel Dänzer <michel.daenzer at amd.com>
(cherry picked from commit a27b74819ad375e8c0bc88e13f42c951d2b5cd6a)
diff --git a/src/gallium/drivers/radeonsi/si_state_shaders.c b/src/gallium/drivers/radeonsi/si_state_shaders.c
index 27ccc8e..dea99ea 100644
--- a/src/gallium/drivers/radeonsi/si_state_shaders.c
+++ b/src/gallium/drivers/radeonsi/si_state_shaders.c
@@ -662,8 +662,10 @@ bcolor:
}
if (j == vsinfo->num_outputs) {
- /* No corresponding output found, load defaults into input */
- tmp |= S_028644_OFFSET(0x20);
+ /* No corresponding output found, load defaults into input.
+ * Don't set any other bits.
+ * (FLAT_SHADE=1 completely changes behavior) */
+ tmp = S_028644_OFFSET(0x20);
}
si_pm4_set_reg(pm4,
commit 7bcdde5174b80c6a4bddf13daae6c7934c995661
Author: Neil Roberts <neil at linux.intel.com>
Date: Tue Nov 25 17:52:27 2014 +0000
meta: Fix saving the results of the current occlusion query
When restoring the current state in _mesa_meta_end it was previously trying to
copy the on-going sample count of the current occlusion query into the new
query after restarting it so that the driver will continue adding to the
previous value. This wouldn't work for two reasons. Firstly, the query might
not be ready yet so the Result member will usually be zero. Secondly the saved
query is stored as a pointer to the query object, not a copy of the struct, so
it is actually restarting the exact same object. Copying the result value is
just copying between identical addresses with no effect. The call to
_mesa_BeginQuery will have always reset it back to zero.
This patch fixes it by making it actually wait for the query object to be
ready before grabbing the previous result. The downside of doing this is that
it could introduce a stall but I think this situation is unlikely so it might
not matter too much. A better solution might be to introduce a real
suspend/resume mechanism to the driver interface. This could be implemented in
the i965 driver by saving the depth count multiple times like it does in the
i945 driver.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=88248
Reviewed-by: Carl Worth <cworth at cworth.org>
Cc: "10.5" <mesa-stable at lists.freedesktop.org>
(cherry picked from commit bb77745681e179b53ea64da7bc1987b57643b7b0)
diff --git a/src/mesa/drivers/common/meta.c b/src/mesa/drivers/common/meta.c
index bb00730..3636ee8 100644
--- a/src/mesa/drivers/common/meta.c
+++ b/src/mesa/drivers/common/meta.c
@@ -827,15 +827,18 @@ _mesa_meta_end(struct gl_context *ctx)
const GLbitfield state = save->SavedState;
int i;
- /* After starting a new occlusion query, initialize the results to the
- * values saved previously. The driver will then continue to increment
- * these values.
- */
+ /* Grab the result of the old occlusion query before starting it again. The
+ * old result is added to the result of the new query so the driver will
+ * continue adding where it left off. */
if (state & MESA_META_OCCLUSION_QUERY) {
if (save->CurrentOcclusionObject) {
- _mesa_BeginQuery(save->CurrentOcclusionObject->Target,
- save->CurrentOcclusionObject->Id);
- ctx->Query.CurrentOcclusionObject->Result = save->CurrentOcclusionObject->Result;
+ struct gl_query_object *q = save->CurrentOcclusionObject;
+ GLuint64EXT result;
+ if (!q->Ready)
+ ctx->Driver.WaitQuery(ctx, q);
+ result = q->Result;
+ _mesa_BeginQuery(q->Target, q->Id);
+ ctx->Query.CurrentOcclusionObject->Result += result;
}
}
commit f2e513b2c0abfde2c5c91930714f0b58d46ec3df
Author: Iago Toral Quiroga <itoral at igalia.com>
Date: Fri Feb 13 12:56:26 2015 +0100
mesa: Fix element count for byte-swaps in texstore, readpix and texgetimage
Some old format conversion code in pack.c implemented byte-swapping like this:
GLint comps = _mesa_components_in_format(dstFormat);
GLint swapSize = _mesa_sizeof_packed_type(dstType);
if (swapSize == 2)
_mesa_swap2((GLushort *) dstAddr, n * comps);
else if (swapSize == 4)
_mesa_swap4((GLuint *) dstAddr, n * comps);
where n is the pixel count. But this is incorrect for packed formats,
where _mesa_sizeof_packed_type is already returning the size of a pixel
instead of the size of a single component, so multiplying this by the
number of components in the format results in a larger element count
for _mesa_swap than we want.
Unfortunately, we followed the same implementation for byte-swapping
in the rewrite of the format conversion code for texstore, readpixels
and texgetimage.
This patch computes the correct element counts for _mesa_swap calls
by computing the bytes per pixel in the image and dividing that by the
swap size to obtain the number of swaps required per pixel. Then multiplies
that by the number of pixels in the image to obtain the swap count that
we need to use.
Also, when handling byte-swapping in texstore_rgba, we were ignoring
the image's depth. This patch fixes this too.
Reviewed-by: Jason Ekstrand <jason.ekstrand at intel.com>
Cc: "10.5" <mesa-stable at lists.freedesktop.org>
(cherry picked from commit ba426522dddf0860f59dedfe9953dbd509160c7d)
diff --git a/src/mesa/main/readpix.c b/src/mesa/main/readpix.c
index 85f900d..ca4b943 100644
--- a/src/mesa/main/readpix.c
+++ b/src/mesa/main/readpix.c
@@ -605,12 +605,15 @@ read_rgba_pixels( struct gl_context *ctx,
done_swap:
/* Handle byte swapping if required */
if (packing->SwapBytes) {
- int components = _mesa_components_in_format(format);
GLint swapSize = _mesa_sizeof_packed_type(type);
- if (swapSize == 2)
- _mesa_swap2((GLushort *) dst, width * height * components);
- else if (swapSize == 4)
- _mesa_swap4((GLuint *) dst, width * height * components);
+ if (swapSize == 2 || swapSize == 4) {
+ int swapsPerPixel = _mesa_bytes_per_pixel(format, type) / swapSize;
+ assert(_mesa_bytes_per_pixel(format, type) % swapSize == 0);
+ if (swapSize == 2)
+ _mesa_swap2((GLushort *) dst, width * height * swapsPerPixel);
+ else if (swapSize == 4)
+ _mesa_swap4((GLuint *) dst, width * height * swapsPerPixel);
+ }
}
done_unmap:
diff --git a/src/mesa/main/texgetimage.c b/src/mesa/main/texgetimage.c
index ee465e6..405f085 100644
--- a/src/mesa/main/texgetimage.c
+++ b/src/mesa/main/texgetimage.c
@@ -511,12 +511,15 @@ get_tex_rgba_uncompressed(struct gl_context *ctx, GLuint dimensions,
do_swap:
/* Handle byte swapping if required */
if (ctx->Pack.SwapBytes) {
- int components = _mesa_components_in_format(format);
GLint swapSize = _mesa_sizeof_packed_type(type);
- if (swapSize == 2)
- _mesa_swap2((GLushort *) dest, width * height * components);
- else if (swapSize == 4)
- _mesa_swap4((GLuint *) dest, width * height * components);
+ if (swapSize == 2 || swapSize == 4) {
+ int swapsPerPixel = _mesa_bytes_per_pixel(format, type) / swapSize;
+ assert(_mesa_bytes_per_pixel(format, type) % swapSize == 0);
+ if (swapSize == 2)
+ _mesa_swap2((GLushort *) dest, width * height * swapsPerPixel);
+ else if (swapSize == 4)
+ _mesa_swap4((GLuint *) dest, width * height * swapsPerPixel);
+ }
}
/* Unmap the src texture buffer */
diff --git a/src/mesa/main/texstore.c b/src/mesa/main/texstore.c
index 9c7080a..f25c0d7 100644
--- a/src/mesa/main/texstore.c
+++ b/src/mesa/main/texstore.c
@@ -728,15 +728,19 @@ texstore_rgba(TEXSTORE_PARAMS)
*/
GLint swapSize = _mesa_sizeof_packed_type(srcType);
if (swapSize == 2 || swapSize == 4) {
- int components = _mesa_components_in_format(srcFormat);
- int elementCount = srcWidth * srcHeight * components;
- tempImage = malloc(elementCount * swapSize);
+ int bytesPerPixel = _mesa_bytes_per_pixel(srcFormat, srcType);
+ assert(bytesPerPixel % swapSize == 0);
+ int swapsPerPixel = bytesPerPixel / swapSize;
+ int elementCount = srcWidth * srcHeight * srcDepth;
+ tempImage = malloc(elementCount * bytesPerPixel);
if (!tempImage)
return GL_FALSE;
if (swapSize == 2)
- _mesa_swap2_copy(tempImage, (GLushort *) srcAddr, elementCount);
+ _mesa_swap2_copy(tempImage, (GLushort *) srcAddr,
+ elementCount * swapsPerPixel);
else
- _mesa_swap4_copy(tempImage, (GLuint *) srcAddr, elementCount);
+ _mesa_swap4_copy(tempImage, (GLuint *) srcAddr,
+ elementCount * swapsPerPixel);
srcAddr = tempImage;
}
}
commit c6b0a1638c025a4a1ef730987d9d51459a948631
Author: Iago Toral Quiroga <itoral at igalia.com>
Date: Fri Feb 13 10:23:26 2015 +0100
mesa: Handle transferOps in texstore_rgba
In the recent rewrite of the format conversion code we did not handle this.
This patch adds the missing support.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89068
Reviewed-by: Jason Ekstrand <jason.ekstrand at intel.com>
Cc: "10.5" <mesa-stable at lists.freedesktop.org>
(cherry picked from commit 4b249d2eed686384d6d7c36f3232360891d5eeda)
diff --git a/src/mesa/main/texstore.c b/src/mesa/main/texstore.c
index 4d32659..9c7080a 100644
--- a/src/mesa/main/texstore.c
+++ b/src/mesa/main/texstore.c
@@ -73,6 +73,7 @@
#include "texstore.h"
#include "enums.h"
#include "glformats.h"
+#include "pixeltransfer.h"
#include "../../gallium/auxiliary/util/u_format_rgb9e5.h"
#include "../../gallium/auxiliary/util/u_format_r11g11b10f.h"
@@ -675,12 +676,13 @@ texstore_compressed(TEXSTORE_PARAMS)
static GLboolean
texstore_rgba(TEXSTORE_PARAMS)
{
- void *tempImage = NULL;
+ void *tempImage = NULL, *tempRGBA = NULL;
int srcRowStride, img;
- GLubyte *src;
+ GLubyte *src, *dst;
uint32_t srcMesaFormat;
uint8_t rebaseSwizzle[4];
bool needRebase;
+ bool transferOpsDone = false;
/* We have to handle MESA_FORMAT_YCBCR manually because it is a special case
* and _mesa_format_convert does not support it. In this case the we only
@@ -709,6 +711,11 @@ texstore_rgba(TEXSTORE_PARAMS)
if (!tempImage)
return GL_FALSE;
+ /* _mesa_unpack_color_index_to_rgba_ubyte has handled transferops
+ * if needed.
+ */
+ transferOpsDone = true;
+
/* Now we only have to adjust our src info for a conversion from
* the RGBA ubyte and then we continue as usual.
*/
@@ -737,13 +744,52 @@ texstore_rgba(TEXSTORE_PARAMS)
srcRowStride =
_mesa_image_row_stride(srcPacking, srcWidth, srcFormat, srcType);
+ srcMesaFormat = _mesa_format_from_format_and_type(srcFormat, srcType);
+ dstFormat = _mesa_get_srgb_format_linear(dstFormat);
+
+ /* If we have transferOps then we need to convert to RGBA float first,
+ then apply transferOps, then do the conversion to dst
+ */
+ if (!transferOpsDone &&
+ _mesa_texstore_needs_transfer_ops(ctx, baseInternalFormat, dstFormat)) {
+ /* Allocate RGBA float image */
+ int elementCount = srcWidth * srcHeight * srcDepth;
+ tempRGBA = malloc(4 * elementCount * sizeof(float));
+ if (!tempRGBA) {
+ free(tempImage);
+ free(tempRGBA);
+ return GL_FALSE;
+ }
+
+ /* Convert from src to RGBA float */
+ src = (GLubyte *) srcAddr;
+ dst = (GLubyte *) tempRGBA;
+ for (img = 0; img < srcDepth; img++) {
+ _mesa_format_convert(dst, RGBA32_FLOAT, 4 * srcWidth * sizeof(float),
+ src, srcMesaFormat, srcRowStride,
+ srcWidth, srcHeight, NULL);
+ src += srcHeight * srcRowStride;
+ dst += srcHeight * 4 * srcWidth * sizeof(float);
+ }
+
+ /* Apply transferOps */
+ _mesa_apply_rgba_transfer_ops(ctx, ctx->_ImageTransferState, elementCount,
+ (float(*)[4]) tempRGBA);
+
+ /* Now we have to adjust our src info for a conversion from
+ * the RGBA float image and then we continue as usual.
+ */
+ srcAddr = tempRGBA;
+ srcFormat = GL_RGBA;
+ srcType = GL_FLOAT;
+ srcRowStride = srcWidth * 4 * sizeof(float);
+ srcMesaFormat = RGBA32_FLOAT;
+ }
+
src = (GLubyte *)
_mesa_image_address(dims, srcPacking, srcAddr, srcWidth, srcHeight,
srcFormat, srcType, 0, 0, 0);
- srcMesaFormat = _mesa_format_from_format_and_type(srcFormat, srcType);
- dstFormat = _mesa_get_srgb_format_linear(dstFormat);
-
if (_mesa_get_format_base_format(dstFormat) != baseInternalFormat) {
needRebase =
_mesa_compute_rgba2base2rgba_component_mapping(baseInternalFormat,
@@ -761,6 +807,7 @@ texstore_rgba(TEXSTORE_PARAMS)
}
free(tempImage);
+ free(tempRGBA);
return GL_TRUE;
}
commit 694d65655151582df64adaf05c6bc4c09539050f
Author: Matt Turner <mattst88 at gmail.com>
Date: Thu Feb 12 02:01:49 2015 +0000
i965/vec4/vp: Use vec4_visitor::CMP.
... instead of emit(BRW_OPCODE_CMP, ...). In commit 6b3a301f I changed
vec4_visitor::CMP to set the destination's type to that of src0. In the
following commit (2335153f) I removed an apparently now unnecessary work
around for Gen8 that did the same thing.
But there was a single place that emitted a CMP instruction without
using the vec4_visitor::CMP function. Use it there.
And change dst_null_d to dst_null_f for good measure, since ARB vp
doesn't have integers.
Cc: "10.5" <mesa-stable at lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89032
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
(cherry picked from commit 72b9f8db2a035b52dbd59af0d2a6441cbde11a4c)
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_vp.cpp b/src/mesa/drivers/dri/i965/brw_vec4_vp.cpp
index 85f2de5..27b0f9b 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_vp.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_vp.cpp
@@ -43,8 +43,7 @@ vec4_visitor::emit_vp_sop(enum brw_conditional_mod conditional_mod,
{
vec4_instruction *inst;
- inst = emit(BRW_OPCODE_CMP, dst_null_d(), src0, src1);
- inst->conditional_mod = conditional_mod;
+ inst = emit(CMP(dst_null_f(), src0, src1, conditional_mod));
inst = emit(BRW_OPCODE_SEL, dst, one, src_reg(0.0f));
inst->predicate = BRW_PREDICATE_NORMAL;
commit c38068f5c14ab45df49b4711376ddd80ac8a6f99
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date: Sat Feb 14 01:43:31 2015 -0500
nvc0: allow holes in xfb target lists
Tested with a modified xfb-streams test which outputs to streams 0, 2,
and 3.
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
Cc: "10.4 10.5" <mesa-stable at lists.freedesktop.org>
(cherry picked from commit 854eb06bee7d266fc739f984c1b4ebb54dac3b87)
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_shader_state.c b/src/gallium/drivers/nouveau/nvc0/nvc0_shader_state.c
index 1000d82..516b33b 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_shader_state.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_shader_state.c
@@ -252,7 +252,12 @@ nvc0_tfb_validate(struct nvc0_context *nvc0)
for (b = 0; b < nvc0->num_tfbbufs; ++b) {
struct nvc0_so_target *targ = nvc0_so_target(nvc0->tfbbuf[b]);
- struct nv04_resource *buf = nv04_resource(targ->pipe.buffer);
+ struct nv04_resource *buf;
+
+ if (!targ) {
+ IMMED_NVC0(push, NVC0_3D(TFB_BUFFER_ENABLE(b)), 0);
+ continue;
+ }
if (tfb)
targ->stride = tfb->stride[b];
@@ -260,6 +265,8 @@ nvc0_tfb_validate(struct nvc0_context *nvc0)
if (!(nvc0->tfbbuf_dirty & (1 << b)))
continue;
+ buf = nv04_resource(targ->pipe.buffer);
+
if (!targ->clean)
nvc0_query_fifo_wait(push, targ->pq);
BEGIN_NVC0(push, NVC0_3D(TFB_BUFFER_ENABLE(b)), 5);
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_state.c b/src/gallium/drivers/nouveau/nvc0/nvc0_state.c
index b6666ca..dca06f4 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_state.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_state.c
@@ -1089,9 +1089,11 @@ nvc0_set_transform_feedback_targets(struct pipe_context *pipe,
pipe_so_target_reference(&nvc0->tfbbuf[i], targets[i]);
}
for (; i < nvc0->num_tfbbufs; ++i) {
- nvc0->tfbbuf_dirty |= 1 << i;
- nvc0_so_target_save_offset(pipe, nvc0->tfbbuf[i], i, &serialize);
- pipe_so_target_reference(&nvc0->tfbbuf[i], NULL);
+ if (nvc0->tfbbuf[i]) {
+ nvc0->tfbbuf_dirty |= 1 << i;
+ nvc0_so_target_save_offset(pipe, nvc0->tfbbuf[i], i, &serialize);
+ pipe_so_target_reference(&nvc0->tfbbuf[i], NULL);
+ }
}
nvc0->num_tfbbufs = num_targets;
commit 88d47387b89995519e9010c42939b5ee7b5bcc8d
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date: Sat Feb 14 01:27:19 2015 -0500
st/mesa: treat resource-less xfb buffers as if they weren't there
If a transform feedback buffer's size is 0, st_bufferobj_data doesn't
end up creating a buffer for it. There's no point in trying to write to
such a buffer, so just pretend as if it's not really there.
This fixes arb_gpu_shader5-xfb-streams-without-invocations on nvc0.
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak at amd.com>
Cc: "10.4 10.5" <mesa-stable at lists.freedesktop.org>
(cherry picked from commit 80d373ed5b1d90a5e71747ee5b8951baac62f750)
diff --git a/src/mesa/state_tracker/st_cb_xformfb.c b/src/mesa/state_tracker/st_cb_xformfb.c
index 8f75eda..a2bd86a 100644
--- a/src/mesa/state_tracker/st_cb_xformfb.c
+++ b/src/mesa/state_tracker/st_cb_xformfb.c
@@ -122,7 +122,7 @@ st_begin_transform_feedback(struct gl_context *ctx, GLenum mode,
for (i = 0; i < max_num_targets; i++) {
struct st_buffer_object *bo = st_buffer_object(sobj->base.Buffers[i]);
- if (bo) {
+ if (bo && bo->buffer) {
/* Check whether we need to recreate the target. */
if (!sobj->targets[i] ||
sobj->targets[i] == sobj->draw_count ||
commit c08e9605c2a71003359004c97392149267758a46
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date: Fri Feb 13 23:21:36 2015 -0500
nvc0: bail out of 2d blits with non-A8_UNORM alpha formats
This fixes the teximage-colors uploads with GL_ALPHA format and
non-GL_UNSIGNED_BYTE type.
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
Cc: "10.4 10.5" <mesa-stable at lists.freedesktop.org>
(cherry picked from commit 68e4f3f572b1e629f32a73ae618dc0b016f631b1)
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_surface.c b/src/gallium/drivers/nouveau/nvc0/nvc0_surface.c
index 4130d36..4404d8c 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_surface.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_surface.c
@@ -1401,11 +1401,14 @@ nvc0_blit(struct pipe_context *pipe, const struct pipe_blit_info *info)
} else
if (!nv50_2d_src_format_faithful(info->src.format)) {
if (!util_format_is_luminance(info->src.format)) {
+ if (!nv50_2d_dst_format_ops_supported(info->dst.format))
+ eng3d = TRUE;
+ else
if (util_format_is_intensity(info->src.format))
eng3d = info->src.format != PIPE_FORMAT_I8_UNORM;
else
- if (!nv50_2d_dst_format_ops_supported(info->dst.format))
- eng3d = TRUE;
+ if (util_format_is_alpha(info->src.format))
+ eng3d = info->src.format != PIPE_FORMAT_A8_UNORM;
else
eng3d = !nv50_2d_format_supported(info->src.format);
}
commit fe98850c5f4fed83dbe5e7b5633bef0459293c91
Author: Tapani Pälli <tapani.palli at intel.com>
Date: Thu Feb 12 14:33:53 2015 +0200
mesa: fix OES_texture_float texture render target behavior
Current implementation allowed usage of unsized type texture GL_FLOAT
and GL_HALF_FLOAT as a render target as this was 'expected behavior' by
WEBGL_oes_texture_float and is also allowed by the oes-texture-float
WebGL test. However this broke some ES3 conformance tests that do not
accept such behavior. Patch sets such an fbo incomplete as expected by
the ES3 conformance tests. Textures with sized types like RGBA32F will
still continue to work as render targets.
v2: code style cleanups (Ian Romanick, Matt Turner)
Signed-off-by: Tapani Pälli <tapani.palli at intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=88905
Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
Cc: "10.5" <mesa-stable at lists.freedesktop.org>
(cherry picked from commit e333035c47a6a4cc88f0f9ca2bced500538bebae)
diff --git a/src/mesa/main/fbobject.c b/src/mesa/main/fbobject.c
index 3305151..79390ab 100644
--- a/src/mesa/main/fbobject.c
+++ b/src/mesa/main/fbobject.c
@@ -780,6 +780,18 @@ test_attachment_completeness(const struct gl_context *ctx, GLenum format,
att->Complete = GL_FALSE;
return;
}
+
+ /* OES_texture_float allows creation and use of floating point
+ * textures with GL_FLOAT, GL_HALF_FLOAT but it does not allow
+ * these textures to be used as a render target, this is done via
+ * GL_EXT_color_buffer(_half)_float with set of new sized types.
+ */
+ if (_mesa_is_gles(ctx) && (texImage->TexObject->_IsFloat ||
+ texImage->TexObject->_IsHalfFloat)) {
+ att_incomplete("bad internal format");
+ att->Complete = GL_FALSE;
+ return;
+ }
}
else if (format == GL_DEPTH) {
if (baseFormat == GL_DEPTH_COMPONENT) {
commit 6f14955b71ba3571049cd4004b1e8381fa6f3b90
Author: Carl Worth <cworth at cworth.org>
Date: Thu Feb 12 10:14:24 2015 -0800
Revert use of Mesa IR optimizer for ARB_fragment_programs
Commit f82f2fb3dc770902f1657ab1c22e6004faa3afab added use of the Mesa
IR optimizer for both ARB_fragment_program and ARB_vertex_program, but
only justified the vertex-program portions with measured performance
improvements.
Meanwhile, the optimizer was seen to generate hundreds of unused
immediates without discarding them, causing failures.
Discard the use of the optimizer for now to fix the regression. (In
the future, we anticpate things moving from Mesa IR to NIR for better
optimization anyway.)
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=82477
Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
CC: "10.3 10.4 10.5" <mesa-stable at lists.freedesktop.org>
(cherry picked from commit 55a57834bf912916a5e07486b32f1778b35657f6)
diff --git a/src/mesa/program/arbprogparse.c b/src/mesa/program/arbprogparse.c
index 7dec399..53a6f37 100644
--- a/src/mesa/program/arbprogparse.c
+++ b/src/mesa/program/arbprogparse.c
@@ -85,9 +85,6 @@ _mesa_parse_arb_fragment_program(struct gl_context* ctx, GLenum target,
return;
}
- if ((ctx->_Shader->Flags & GLSL_NO_OPT) == 0)
- _mesa_optimize_program(ctx, &prog);
-
free(program->Base.String);
/* Copy the relevant contents of the arb_program struct into the
commit 8ab5a28bd6ce4d73237ea68859f2643a2ba72186
Author: Emil Velikov <emil.l.velikov at gmail.com>
Date: Tue Feb 24 12:14:20 2015 +0000
cherry-ignore: ignore commits picked without -x
Signed-off-by: Emil Velikov <emil.l.velikov at gmail.com>
diff --git a/bin/.cherry-ignore b/bin/.cherry-ignore
new file mode 100644
index 0000000..e784b19
--- /dev/null
+++ b/bin/.cherry-ignore
@@ -0,0 +1,12 @@
+# Cherry-picked without -x
+# nir: resolve nir.h dependency list (fix make distcheck)
+556fc4b84df99a1cd4b18c11fb16f7854a948b2a
+
+# nir: add missing header to the sources list
+72e602905dd9d86450a936d5a22bf21758844b38
+
+# configure: rework wayland_scanner handling(fix make distcheck)
+153539bd9d4445b504110958306f00632222f840
+
+# auxiliary/vl: bring back the VL code for the dri targets
+c39dbfdd0f764b1aaa7319b4694e7335692993dd
commit 4d6bc2c0ff4279501423e631eedc08013c1f9f26
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Fri Feb 6 03:39:20 2015 -0800
i965: Fix integer border color on Haswell.
+82 Piglits - 100% of border color tests now pass on Haswell.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand at intel.com>
Reviewed-by: Chris Forbes <chrisf at ijw.co.nz>
Cc: mesa-stable at lists.freedesktop.org
(cherry picked from commit 08a06b6b891df456902f5e170f1d82236d0c73d2)
diff --git a/src/mesa/drivers/dri/i965/brw_defines.h b/src/mesa/drivers/dri/i965/brw_defines.h
index f02a0b8..a597d6b 100644
--- a/src/mesa/drivers/dri/i965/brw_defines.h
+++ b/src/mesa/drivers/dri/i965/brw_defines.h
@@ -551,6 +551,7 @@
#define BRW_SURFACE_PITCH_MASK INTEL_MASK(19, 3)
#define BRW_SURFACE_TILED (1 << 1)
#define BRW_SURFACE_TILED_Y (1 << 0)
+#define HSW_SURFACE_IS_INTEGER_FORMAT (1 << 18)
/* Surface state DW4 */
#define BRW_SURFACE_MIN_LOD_SHIFT 28
diff --git a/src/mesa/drivers/dri/i965/brw_sampler_state.c b/src/mesa/drivers/dri/i965/brw_sampler_state.c
index d9a8eea..c532850 100644
--- a/src/mesa/drivers/dri/i965/brw_sampler_state.c
+++ b/src/mesa/drivers/dri/i965/brw_sampler_state.c
@@ -269,6 +269,68 @@ upload_default_color(struct brw_context *brw,
uint32_t *sdc = brw_state_batch(brw, AUB_TRACE_SAMPLER_DEFAULT_COLOR,
4 * 4, 64, sdc_offset);
memcpy(sdc, color.ui, 4 * 4);
+ } else if (brw->is_haswell && texObj->_IsIntegerFormat) {
+ /* Haswell's integer border color support is completely insane:
+ * SAMPLER_BORDER_COLOR_STATE is 20 DWords. The first four are
+ * for float colors. The next 12 DWords are MBZ and only exist to
+ * pad it out to a 64 byte cacheline boundary. DWords 16-19 then
+ * contain integer colors; these are only used if SURFACE_STATE
+ * has the "Integer Surface Format" bit set. Even then, the
+ * arrangement of the RGBA data devolves into madness.
+ */
+ uint32_t *sdc = brw_state_batch(brw, AUB_TRACE_SAMPLER_DEFAULT_COLOR,
+ 20 * 4, 512, sdc_offset);
+ memset(sdc, 0, 20 * 4);
+ sdc = &sdc[16];
+
+ mesa_format format = firstImage->TexFormat;
+ int bits_per_channel = _mesa_get_format_bits(format, GL_RED_BITS);
+
+ /* From the Haswell PRM, "Command Reference: Structures", Page 36:
+ * "If any color channel is missing from the surface format,
+ * corresponding border color should be programmed as zero and if
+ * alpha channel is missing, corresponding Alpha border color should
+ * be programmed as 1."
+ */
+ unsigned c[4] = { 0, 0, 0, 1 };
+ for (int i = 0; i < 4; i++) {
+ if (_mesa_format_has_color_component(format, i))
+ c[i] = color.ui[i];
+ }
+
+ switch (bits_per_channel) {
+ case 8:
+ /* Copy RGBA in order. */
+ for (int i = 0; i < 4; i++)
+ ((uint8_t *) sdc)[i] = c[i];
+ break;
+ case 10:
+ /* R10G10B10A2_UINT is treated like a 16-bit format. */
+ case 16:
+ ((uint16_t *) sdc)[0] = c[0]; /* R -> DWord 0, bits 15:0 */
+ ((uint16_t *) sdc)[1] = c[1]; /* G -> DWord 0, bits 31:16 */
+ /* DWord 1 is Reserved/MBZ! */
+ ((uint16_t *) sdc)[4] = c[2]; /* B -> DWord 2, bits 15:0 */
+ ((uint16_t *) sdc)[5] = c[3]; /* A -> DWord 3, bits 31:16 */
+ break;
+ case 32:
+ if (firstImage->_BaseFormat == GL_RG) {
+ /* Careful inspection of the tables reveals that for RG32 formats,
+ * the green channel needs to go where blue normally belongs.
+ */
+ sdc[0] = c[0];
+ sdc[2] = c[1];
+ sdc[3] = 1;
+ } else {
+ /* Copy RGBA in order. */
+ for (int i = 0; i < 4; i++)
+ sdc[i] = c[i];
+ }
+ break;
+ default:
+ assert(!"Invalid number of bits per channel in integer format.");
+ break;
+ }
} else if (brw->gen == 5 || brw->gen == 6) {
struct gen5_sampler_default_color *sdc;
diff --git a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
index 07db678..29553cd 100644
--- a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
@@ -321,6 +321,9 @@ gen7_update_texture_surface(struct gl_context *ctx,
surf[3] = SET_FIELD(effective_depth - 1, BRW_SURFACE_DEPTH) |
(mt->pitch - 1);
+ if (brw->is_haswell && tObj->_IsIntegerFormat)
+ surf[3] |= HSW_SURFACE_IS_INTEGER_FORMAT;
+
surf[4] = gen7_surface_msaa_bits(mt->num_samples, mt->msaa_layout) |
SET_FIELD(tObj->MinLayer, GEN7_SURFACE_MIN_ARRAY_ELEMENT) |
SET_FIELD((effective_depth - 1),
commit 631e76500deb6ac5dde46a04a3d3735b96e679db
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Tue May 6 22:56:17 2014 -0700
i965: Use a gl_color_union for sampler border color.
This should have no effect, but will make it easier to implement other
bug fixes.
v2: Eliminate "unsigned one" local; just use the value where necessary.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
Cc: mesa-stable at lists.freedesktop.org
(cherry picked from commit e1e73443c572b5432ef66a923fe64b73467f411b)
diff --git a/src/mesa/drivers/dri/i965/brw_sampler_state.c b/src/mesa/drivers/dri/i965/brw_sampler_state.c
index 0fe0853..d9a8eea 100644
--- a/src/mesa/drivers/dri/i965/brw_sampler_state.c
+++ b/src/mesa/drivers/dri/i965/brw_sampler_state.c
@@ -208,7 +208,7 @@ upload_default_color(struct brw_context *brw,
struct gl_texture_unit *texUnit = &ctx->Texture.Unit[unit];
struct gl_texture_object *texObj = texUnit->_Current;
struct gl_texture_image *firstImage = texObj->Image[0][texObj->BaseLevel];
- float color[4];
+ union gl_color_union color;
switch (firstImage->_BaseFormat) {
case GL_DEPTH_COMPONENT:
@@ -216,40 +216,40 @@ upload_default_color(struct brw_context *brw,
* R channel, while the hardware uses A. Spam R into all the
* channels for safety.
*/
- color[0] = sampler->BorderColor.f[0];
- color[1] = sampler->BorderColor.f[0];
- color[2] = sampler->BorderColor.f[0];
- color[3] = sampler->BorderColor.f[0];
+ color.ui[0] = sampler->BorderColor.ui[0];
+ color.ui[1] = sampler->BorderColor.ui[0];
+ color.ui[2] = sampler->BorderColor.ui[0];
+ color.ui[3] = sampler->BorderColor.ui[0];
break;
case GL_ALPHA:
- color[0] = 0.0;
- color[1] = 0.0;
- color[2] = 0.0;
- color[3] = sampler->BorderColor.f[3];
+ color.ui[0] = 0u;
+ color.ui[1] = 0u;
+ color.ui[2] = 0u;
+ color.ui[3] = sampler->BorderColor.ui[3];
break;
case GL_INTENSITY:
- color[0] = sampler->BorderColor.f[0];
- color[1] = sampler->BorderColor.f[0];
- color[2] = sampler->BorderColor.f[0];
- color[3] = sampler->BorderColor.f[0];
+ color.ui[0] = sampler->BorderColor.ui[0];
+ color.ui[1] = sampler->BorderColor.ui[0];
+ color.ui[2] = sampler->BorderColor.ui[0];
+ color.ui[3] = sampler->BorderColor.ui[0];
break;
case GL_LUMINANCE:
- color[0] = sampler->BorderColor.f[0];
- color[1] = sampler->BorderColor.f[0];
- color[2] = sampler->BorderColor.f[0];
- color[3] = 1.0;
+ color.ui[0] = sampler->BorderColor.ui[0];
+ color.ui[1] = sampler->BorderColor.ui[0];
+ color.ui[2] = sampler->BorderColor.ui[0];
+ color.ui[3] = float_as_int(1.0);
break;
case GL_LUMINANCE_ALPHA:
- color[0] = sampler->BorderColor.f[0];
- color[1] = sampler->BorderColor.f[0];
- color[2] = sampler->BorderColor.f[0];
- color[3] = sampler->BorderColor.f[3];
+ color.ui[0] = sampler->BorderColor.ui[0];
+ color.ui[1] = sampler->BorderColor.ui[0];
+ color.ui[2] = sampler->BorderColor.ui[0];
+ color.ui[3] = sampler->BorderColor.ui[3];
break;
default:
- color[0] = sampler->BorderColor.f[0];
- color[1] = sampler->BorderColor.f[1];
- color[2] = sampler->BorderColor.f[2];
- color[3] = sampler->BorderColor.f[3];
+ color.ui[0] = sampler->BorderColor.ui[0];
+ color.ui[1] = sampler->BorderColor.ui[1];
+ color.ui[2] = sampler->BorderColor.ui[2];
+ color.ui[3] = sampler->BorderColor.ui[3];
break;
}
@@ -258,18 +258,17 @@ upload_default_color(struct brw_context *brw,
* the border color alpha to 1.0 in that case.
*/
if (firstImage->_BaseFormat == GL_RGB)
- color[3] = 1.0;
+ color.ui[3] = float_as_int(1.0);
if (brw->gen >= 8) {
/* On Broadwell, the border color is represented as four 32-bit floats,
* integers, or unsigned values, interpreted according to the surface
- * format. This matches the sampler->BorderColor union exactly. Since
- * we use floats both here and in the above reswizzling code, we preserve
- * the original bit pattern. So we actually handle all three formats.
+ * format. This matches the sampler->BorderColor union exactly; just
+ * memcpy the values.
*/
- float *sdc = brw_state_batch(brw, AUB_TRACE_SAMPLER_DEFAULT_COLOR,
- 4 * 4, 64, sdc_offset);
- COPY_4FV(sdc, color);
+ uint32_t *sdc = brw_state_batch(brw, AUB_TRACE_SAMPLER_DEFAULT_COLOR,
+ 4 * 4, 64, sdc_offset);
+ memcpy(sdc, color.ui, 4 * 4);
} else if (brw->gen == 5 || brw->gen == 6) {
struct gen5_sampler_default_color *sdc;
@@ -278,39 +277,39 @@ upload_default_color(struct brw_context *brw,
memset(sdc, 0, sizeof(*sdc));
- UNCLAMPED_FLOAT_TO_UBYTE(sdc->ub[0], color[0]);
- UNCLAMPED_FLOAT_TO_UBYTE(sdc->ub[1], color[1]);
- UNCLAMPED_FLOAT_TO_UBYTE(sdc->ub[2], color[2]);
- UNCLAMPED_FLOAT_TO_UBYTE(sdc->ub[3], color[3]);
+ UNCLAMPED_FLOAT_TO_UBYTE(sdc->ub[0], color.f[0]);
+ UNCLAMPED_FLOAT_TO_UBYTE(sdc->ub[1], color.f[1]);
+ UNCLAMPED_FLOAT_TO_UBYTE(sdc->ub[2], color.f[2]);
+ UNCLAMPED_FLOAT_TO_UBYTE(sdc->ub[3], color.f[3]);
- UNCLAMPED_FLOAT_TO_USHORT(sdc->us[0], color[0]);
- UNCLAMPED_FLOAT_TO_USHORT(sdc->us[1], color[1]);
- UNCLAMPED_FLOAT_TO_USHORT(sdc->us[2], color[2]);
- UNCLAMPED_FLOAT_TO_USHORT(sdc->us[3], color[3]);
+ UNCLAMPED_FLOAT_TO_USHORT(sdc->us[0], color.f[0]);
+ UNCLAMPED_FLOAT_TO_USHORT(sdc->us[1], color.f[1]);
+ UNCLAMPED_FLOAT_TO_USHORT(sdc->us[2], color.f[2]);
+ UNCLAMPED_FLOAT_TO_USHORT(sdc->us[3], color.f[3]);
- UNCLAMPED_FLOAT_TO_SHORT(sdc->s[0], color[0]);
- UNCLAMPED_FLOAT_TO_SHORT(sdc->s[1], color[1]);
- UNCLAMPED_FLOAT_TO_SHORT(sdc->s[2], color[2]);
- UNCLAMPED_FLOAT_TO_SHORT(sdc->s[3], color[3]);
+ UNCLAMPED_FLOAT_TO_SHORT(sdc->s[0], color.f[0]);
+ UNCLAMPED_FLOAT_TO_SHORT(sdc->s[1], color.f[1]);
+ UNCLAMPED_FLOAT_TO_SHORT(sdc->s[2], color.f[2]);
+ UNCLAMPED_FLOAT_TO_SHORT(sdc->s[3], color.f[3]);
- sdc->hf[0] = _mesa_float_to_half(color[0]);
- sdc->hf[1] = _mesa_float_to_half(color[1]);
- sdc->hf[2] = _mesa_float_to_half(color[2]);
- sdc->hf[3] = _mesa_float_to_half(color[3]);
+ sdc->hf[0] = _mesa_float_to_half(color.f[0]);
+ sdc->hf[1] = _mesa_float_to_half(color.f[1]);
+ sdc->hf[2] = _mesa_float_to_half(color.f[2]);
+ sdc->hf[3] = _mesa_float_to_half(color.f[3]);
sdc->b[0] = sdc->s[0] >> 8;
sdc->b[1] = sdc->s[1] >> 8;
sdc->b[2] = sdc->s[2] >> 8;
sdc->b[3] = sdc->s[3] >> 8;
- sdc->f[0] = color[0];
- sdc->f[1] = color[1];
- sdc->f[2] = color[2];
- sdc->f[3] = color[3];
+ sdc->f[0] = color.f[0];
+ sdc->f[1] = color.f[1];
+ sdc->f[2] = color.f[2];
+ sdc->f[3] = color.f[3];
} else {
float *sdc = brw_state_batch(brw, AUB_TRACE_SAMPLER_DEFAULT_COLOR,
4 * 4, 32, sdc_offset);
- memcpy(sdc, color, 4 * 4);
+ memcpy(sdc, color.f, 4 * 4);
}
}
commit 28650815ac909885e36476cecc03951217dfae59
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Fri Feb 6 02:06:27 2015 -0800
i965: Override swizzles for integer luminance formats.
The hardware's integer luminance formats are completely unusable;
currently we fall back to RGBA. This means we need to override
the texture swizzle to obtain the XXX1 values expected for luminance
formats.
Fixes spec/EXT_texture_integer/texwrap formats bordercolor [swizzled]
on Broadwell - 100% of border color tests now pass on Broadwell.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
Reviewed-by: Chris Forbes <chrisf at ijw.co.nz>
Cc: mesa-stable at lists.freedesktop.org
(cherry picked from commit 8cb18760cccf2c89d94c50ff14b330ec2d5c4a3c)
diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
index 6456a61..5f81402 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
@@ -199,6 +199,14 @@ brw_get_texture_swizzle(const struct gl_context *ctx,
swizzles[1] = SWIZZLE_ZERO;
swizzles[2] = SWIZZLE_ZERO;
break;
+ case GL_LUMINANCE:
+ if (t->_IsIntegerFormat) {
+ swizzles[0] = SWIZZLE_X;
+ swizzles[1] = SWIZZLE_X;
+ swizzles[2] = SWIZZLE_X;
+ swizzles[3] = SWIZZLE_ONE;
+ }
+ break;
case GL_RED:
case GL_RG:
case GL_RGB:
commit b9518a41d4103fb19337d51971de0f14e267b954
Author: Emil Velikov <emil.l.velikov at gmail.com>
Date: Thu Feb 12 14:00:41 2015 +0000
Increment version to 10.5.0-rc1
Signed-off-by: Emil Velikov <emil.l.velikov at gmail.com>
diff --git a/VERSION b/VERSION
index 093d8ba..49dab28 100644
--- a/VERSION
+++ b/VERSION
@@ -1 +1 @@
-10.5.0-devel
+10.5.0-rc1
commit 550d7c26e773bdfb71f51c53ad160caca68420e2
Author: Emil Velikov <emil.l.velikov at gmail.com>
Date: Tue Feb 10 15:11:09 2015 +0000
auxiliary/vl: bring back the VL code for the dri targets
With commit c642e87d9f4(auxiliary/vl: rework the build of the VL code)
we split out the VL code into a separate static library that was meant
to be used by the VL targets alone - va, vdpau, xvmc.
The commit failed to consider the way we handle vdpau-gl interop and
broke it. Bring back the functionality by keeping the vl <> vl_stub
separation as requrested by Christian.
v2: Update the omx target as well. Update mesa-stable email address.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=86837
Cc: "10.5" <mesa-stable at lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov at gmail.com>
Tested-by: Andy Furniss <adf.lists at gmail.com>
diff --git a/configure.ac b/configure.ac
index 155f496..351027b 100644
--- a/configure.ac
+++ b/configure.ac
@@ -1572,7 +1572,8 @@ if test -n "$with_gallium_drivers" -a "x$with_gallium_drivers" != xswrast; then
fi
fi
-if test "x$enable_xvmc" = xyes -o \
+if test "x$enable_dri" = xyes -o \
+ "x$enable_xvmc" = xyes -o \
"x$enable_vdpau" = xyes -o \
"x$enable_omx" = xyes -o \
"x$enable_va" = xyes; then
diff --git a/src/gallium/auxiliary/Makefile.am b/src/gallium/auxiliary/Makefile.am
index 1053ce4..453282a 100644
--- a/src/gallium/auxiliary/Makefile.am
+++ b/src/gallium/auxiliary/Makefile.am
@@ -53,9 +53,7 @@ libgalliumvl_stub_la_SOURCES = \
if NEED_GALLIUM_VL
-noinst_LTLIBRARIES += libgalliumvl.la
-
-libgalliumvl_la_CFLAGS = \
+COMMON_VL_CFLAGS = \
$(AM_CFLAGS) \
$(VL_CFLAGS) \
$(LIBDRM_CFLAGS) \
@@ -63,14 +61,27 @@ libgalliumvl_la_CFLAGS = \
-DPIPE_SEARCH_DIR=\"$(libdir)/gallium-pipe\"
if HAVE_GALLIUM_STATIC_TARGETS
-libgalliumvl_la_CFLAGS += \
+COMMON_VL_CFLAGS += \
-DGALLIUM_STATIC_TARGETS=1
endif # HAVE_GALLIUM_STATIC_TARGETS
+noinst_LTLIBRARIES += libgalliumvl.la
+
+libgalliumvl_la_CFLAGS = \
+ $(COMMON_VL_CFLAGS)
+
libgalliumvl_la_SOURCES = \
$(VL_SOURCES)
+noinst_LTLIBRARIES += libgalliumvlwinsys.la
+
+libgalliumvlwinsys_la_CFLAGS = \
+ $(COMMON_VL_CFLAGS)
+
+libgalliumvlwinsys_la_SOURCES = \
+ $(VL_WINSYS_SOURCES)
+
endif
EXTRA_DIST = \
diff --git a/src/gallium/auxiliary/Makefile.sources b/src/gallium/auxiliary/Makefile.sources
index c45dd18..d330935 100644
--- a/src/gallium/auxiliary/Makefile.sources
+++ b/src/gallium/auxiliary/Makefile.sources
@@ -334,10 +334,13 @@ VL_SOURCES := \
vl/vl_video_buffer.h \
vl/vl_vlc.h \
vl/vl_winsys.h \
- vl/vl_winsys_dri.c \
vl/vl_zscan.c \
vl/vl_zscan.h
+# XXX: Nuke this as our dri targets no longer depend on VL.
+VL_WINSYS_SOURCES := \
+ vl/vl_winsys_dri.c
+
VL_STUB_SOURCES := \
vl/vl_stubs.c
diff --git a/src/gallium/targets/dri/Makefile.am b/src/gallium/targets/dri/Makefile.am
index 7f2ce6a..aaeb950 100644
--- a/src/gallium/targets/dri/Makefile.am
+++ b/src/gallium/targets/dri/Makefile.am
@@ -44,7 +44,7 @@ gallium_dri_la_LIBADD = \
$(top_builddir)/src/mesa/drivers/dri/common/libdricommon.la \
$(top_builddir)/src/mesa/drivers/dri/common/libmegadriver_stub.la \
$(top_builddir)/src/gallium/state_trackers/dri/libdri.la \
- $(top_builddir)/src/gallium/auxiliary/libgalliumvl_stub.la \
+ $(top_builddir)/src/gallium/auxiliary/libgalliumvl.la \
$(top_builddir)/src/gallium/auxiliary/libgallium.la \
$(top_builddir)/src/gallium/drivers/galahad/libgalahad.la \
$(top_builddir)/src/gallium/drivers/noop/libnoop.la \
diff --git a/src/gallium/targets/omx/Makefile.am b/src/gallium/targets/omx/Makefile.am
index 0ae7c55..f52e669 100644
--- a/src/gallium/targets/omx/Makefile.am
+++ b/src/gallium/targets/omx/Makefile.am
@@ -24,6 +24,7 @@ endif # HAVE_LD_VERSION_SCRIPT
libomx_mesa_la_LIBADD = \
$(top_builddir)/src/gallium/state_trackers/omx/libomxtracker.la \
+ $(top_builddir)/src/gallium/auxiliary/libgalliumvlwinsys.la \
$(top_builddir)/src/gallium/auxiliary/libgalliumvl.la \
$(top_builddir)/src/gallium/auxiliary/libgallium.la \
$(top_builddir)/src/util/libmesautil.la \
diff --git a/src/gallium/targets/pipe-loader/Makefile.am b/src/gallium/targets/pipe-loader/Makefile.am
index 3d73a51..94658f8 100644
--- a/src/gallium/targets/pipe-loader/Makefile.am
+++ b/src/gallium/targets/pipe-loader/Makefile.am
@@ -40,6 +40,7 @@ PIPE_LIBS =
if NEED_GALLIUM_VL
PIPE_LIBS += \
+ $(top_builddir)/src/gallium/auxiliary/libgalliumvlwinsys.la \
$(top_builddir)/src/gallium/auxiliary/libgalliumvl.la
else
PIPE_LIBS += \
diff --git a/src/gallium/targets/va/Makefile.am b/src/gallium/targets/va/Makefile.am
index 11297e0..57c7e35 100644
--- a/src/gallium/targets/va/Makefile.am
+++ b/src/gallium/targets/va/Makefile.am
@@ -25,6 +25,7 @@ endif # HAVE_LD_VERSION_SCRIPT
# NOTE: gallium_drv_video does not use(link against) libva
gallium_drv_video_la_LIBADD = \
$(top_builddir)/src/gallium/state_trackers/va/libvatracker.la \
+ $(top_builddir)/src/gallium/auxiliary/libgalliumvlwinsys.la \
$(top_builddir)/src/gallium/auxiliary/libgalliumvl.la \
$(top_builddir)/src/gallium/auxiliary/libgallium.la \
$(top_builddir)/src/util/libmesautil.la \
diff --git a/src/gallium/targets/vdpau/Makefile.am b/src/gallium/targets/vdpau/Makefile.am
index 2980cc3..9455fc4 100644
--- a/src/gallium/targets/vdpau/Makefile.am
+++ b/src/gallium/targets/vdpau/Makefile.am
@@ -30,6 +30,7 @@ endif # HAVE_LD_DYNAMIC_LIST
# NOTE: libvdpau_gallium does not use(link against) libvdpau
libvdpau_gallium_la_LIBADD = \
$(top_builddir)/src/gallium/state_trackers/vdpau/libvdpautracker.la \
+ $(top_builddir)/src/gallium/auxiliary/libgalliumvlwinsys.la \
$(top_builddir)/src/gallium/auxiliary/libgalliumvl.la \
$(top_builddir)/src/gallium/auxiliary/libgallium.la \
$(top_builddir)/src/util/libmesautil.la \
diff --git a/src/gallium/targets/xvmc/Makefile.am b/src/gallium/targets/xvmc/Makefile.am
index 8aed969..3c16c8d 100644
--- a/src/gallium/targets/xvmc/Makefile.am
+++ b/src/gallium/targets/xvmc/Makefile.am
@@ -24,6 +24,7 @@ endif # HAVE_LD_VERSION_SCRIPT
libXvMCgallium_la_LIBADD = \
$(top_builddir)/src/gallium/state_trackers/xvmc/libxvmctracker.la \
+ $(top_builddir)/src/gallium/auxiliary/libgalliumvlwinsys.la \
$(top_builddir)/src/gallium/auxiliary/libgalliumvl.la \
$(top_builddir)/src/gallium/auxiliary/libgallium.la \
$(top_builddir)/src/util/libmesautil.la \
commit 716886c338ca10b4f9362d0309cc9f4bbcb3d654
Author: Emil Velikov <emil.l.velikov at gmail.com>
Date: Tue Feb 10 14:14:16 2015 +0000
configure: rework wayland_scanner handling(fix make distcheck)
Currently having the wayland-scanner is optional, which causes problems
when autotools parses through the makefiles, and tries to generate all
the BUILT_SOURCES.
As the config option --with-egl-platform=wayland is not the default, we
won't end up setting the WAYLAND_SCANNER variable, which in turn will
cause some files to not get generated.
There has been a wayland-scanner package as of wayland 1.2 which
provides a variable for the scanner binary, so let's use that one and
fall back to manually searching via AC_PATH_PROG when needed.
Cc: "10.5" <mesa-stable at lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov at gmail.com>
Reviewed-by: Kristian Høgsberg <krh at bitplanet.net>
Reviewed-by: Matt Turner <mattst88 at gmail.com>
diff --git a/configure.ac b/configure.ac
index c2d775e..155f496 100644
--- a/configure.ac
+++ b/configure.ac
@@ -1730,6 +1730,13 @@ if test "x$with_egl_platforms" != "x" -a "x$enable_egl" != xyes; then
AC_MSG_ERROR([cannot build egl state tracker without EGL library])
fi
+PKG_CHECK_MODULES([WAYLAND_SCANNER], [wayland_scanner],
+ WAYLAND_SCANNER=`$PKG_CONFIG --variable=wayland_scanner wayland_scanner`,
+ WAYLAND_SCANNER='')
+if test "x$WAYLAND_SCANNER" = x; then
+ AC_PATH_PROG([WAYLAND_SCANNER], [wayland-scanner])
+fi
+
# Do per-EGL platform setups and checks
egl_platforms=`IFS=', '; echo $with_egl_platforms`
for plat in $egl_platforms; do
@@ -1737,9 +1744,9 @@ for plat in $egl_platforms; do
wayland)
PKG_CHECK_MODULES([WAYLAND], [wayland-client >= $WAYLAND_REQUIRED wayland-server >= $WAYLAND_REQUIRED])
- WAYLAND_PREFIX=`$PKG_CONFIG --variable=prefix wayland-client`
- AC_PATH_PROG([WAYLAND_SCANNER], [wayland-scanner],,
- [${WAYLAND_PREFIX}/bin$PATH_SEPARATOR$PATH])
+ if test "x$WAYLAND_SCANNER" = x; then
+ AC_MSG_ERROR([wayland-scanner is needed to compile the wayland egl platform])
+ fi
;;
x11)
commit 8898b68a3f49330eba84ffd4651e97ae1aa2b897
Author: Emil Velikov <emil.l.velikov at gmail.com>
Date: Tue Feb 10 13:10:18 2015 +0000
nir: add missing header to the sources list
Cc: "10.5" <mesa-stable at lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov at gmail.com>
Reviewed-by: Connor Abbott <cwabbott0 at gmail.com>
Reviewed-by: Matt Turner <mattst88 at gmail.com>
diff --git a/src/glsl/Makefile.sources b/src/glsl/Makefile.sources
index a580b6e..7e66e91 100644
--- a/src/glsl/Makefile.sources
+++ b/src/glsl/Makefile.sources
@@ -21,6 +21,7 @@ NIR_FILES = \
nir/glsl_to_nir.h \
nir/nir.c \
nir/nir.h \
+ nir/nir_constant_expressions.h \
nir/nir_dominance.c \
nir/nir_from_ssa.c \
nir/nir_intrinsics.c \
commit 93675c7aac899306fe1e6d26c1f7812392c6c183
Author: Emil Velikov <emil.l.velikov at gmail.com>
Date: Sat Feb 7 19:20:16 2015 +0000
nir: resolve nir.h dependency list (fix make distcheck)
Use nir/nir_opcodes.h as is (w/o the absolute path), as it is the target
name used to generate the actual file. Otherwise the target is missing,
the file won't get generated and the build will fail.
Cc: "10.5" <mesa-stable at lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov at gmail.com>
Reviewed-by: Matt Turner <mattst88 at gmail.com>
diff --git a/src/glsl/Makefile.am b/src/glsl/Makefile.am
index e89a9ad..1e4d98f 100644
--- a/src/glsl/Makefile.am
+++ b/src/glsl/Makefile.am
@@ -240,7 +240,7 @@ nir/nir_opcodes.h: nir/nir_opcodes.py nir/nir_opcodes_h.py
$(MKDIR_P) nir; \
$(PYTHON2) $(PYTHON_FLAGS) $(srcdir)/nir/nir_opcodes_h.py > $@
-nir/nir.h: $(top_builddir)/src/glsl/nir/nir_opcodes.h
+nir/nir.h: nir/nir_opcodes.h
nir/nir_opcodes.c: nir/nir_opcodes.py nir/nir_opcodes_c.py
$(MKDIR_P) nir; \
commit 6555c00b19f5750f64f6726a9d45ae9c0b35a7d1
Author: Axel Davy <axel.davy at ens.fr>
Date: Wed Jan 14 20:36:04 2015 +0100
egl: Soften several HAVE_DRM_PLATFORM to HAVE_LIBDRM
To fix build when libdrm is not found,
commit a594cec7e3ef275c386054127a357110a19dd823 did put several
parts of egl code under #ifdef HAVE_DRM_PLATFORM.
HAVE_DRM_PLATFORM means the egl drm platform is being built.
What should have been used instead is HAVE_LIBDRM.
At a few locations, the HAVE_DRM_PLATFORM introduced
have already been replaced by HAVE_LIBDRM, this patch
replaces the remaining occurences.
This patch makes for example EGL_EXT_image_dma_buf_import
be advertised by egl under x11 when the drm egl platform
is not built, whereas previously it required the drm egl
platform to be built.
Signed-off-by: Axel Davy <axel.davy at ens.fr>
Reviewed-by: Emil Velikov <emil.l.velikov at gmail.com>
diff --git a/src/egl/drivers/dri2/egl_dri2.c b/src/egl/drivers/dri2/egl_dri2.c
index 86e5f24..6306483 100644
--- a/src/egl/drivers/dri2/egl_dri2.c
+++ b/src/egl/drivers/dri2/egl_dri2.c
@@ -534,7 +534,7 @@ dri2_setup_screen(_EGLDisplay *disp)
disp->Extensions.KHR_gl_texture_2D_image = EGL_TRUE;
disp->Extensions.KHR_gl_texture_cubemap_image = EGL_TRUE;
}
-#ifdef HAVE_DRM_PLATFORM
+#ifdef HAVE_LIBDRM
if (dri2_dpy->image->base.version >= 8 &&
dri2_dpy->image->createImageFromDmaBufs) {
disp->Extensions.EXT_image_dma_buf_import = EGL_TRUE;
@@ -1335,7 +1335,7 @@ dri2_create_image_khr_renderbuffer(_EGLDisplay *disp, _EGLContext *ctx,
return dri2_create_image_from_dri(disp, dri_image);
}
-#ifdef HAVE_DRM_PLATFORM
+#ifdef HAVE_LIBDRM
static _EGLImage *
dri2_create_image_mesa_drm_buffer(_EGLDisplay *disp, _EGLContext *ctx,
EGLClientBuffer buffer, const EGLint *attr_list)
@@ -1571,7 +1571,7 @@ dri2_create_wayland_buffer_from_image(_EGLDriver *drv, _EGLDisplay *dpy,
return dri2_dpy->vtbl->create_wayland_buffer_from_image(drv, dpy, img);
}
-#ifdef HAVE_DRM_PLATFORM
+#ifdef HAVE_LIBDRM
static EGLBoolean
dri2_check_dma_buf_attribs(const _EGLImageAttribs *attrs)
{
@@ -1821,7 +1821,7 @@ dri2_create_image_khr(_EGLDriver *drv, _EGLDisplay *disp,
return dri2_create_image_khr_texture(disp, ctx, target, buffer, attr_list);
case EGL_GL_RENDERBUFFER_KHR:
return dri2_create_image_khr_renderbuffer(disp, ctx, buffer, attr_list);
-#ifdef HAVE_DRM_PLATFORM
+#ifdef HAVE_LIBDRM
case EGL_DRM_BUFFER_MESA:
return dri2_create_image_mesa_drm_buffer(disp, ctx, buffer, attr_list);
#endif
@@ -1829,7 +1829,7 @@ dri2_create_image_khr(_EGLDriver *drv, _EGLDisplay *disp,
case EGL_WAYLAND_BUFFER_WL:
return dri2_create_image_wayland_wl_buffer(disp, ctx, buffer, attr_list);
#endif
-#ifdef HAVE_DRM_PLATFORM
+#ifdef HAVE_LIBDRM
case EGL_LINUX_DMA_BUF_EXT:
return dri2_create_image_dma_buf(disp, ctx, buffer, attr_list);
#endif
@@ -1853,7 +1853,7 @@ dri2_destroy_image_khr(_EGLDriver *drv, _EGLDisplay *disp, _EGLImage *image)
return EGL_TRUE;
}
-#ifdef HAVE_DRM_PLATFORM
+#ifdef HAVE_LIBDRM
static _EGLImage *
dri2_create_drm_image_mesa(_EGLDriver *drv, _EGLDisplay *disp,
const EGLint *attr_list)
@@ -2215,7 +2215,7 @@ _eglBuiltInDriverDRI2(const char *args)
dri2_drv->base.API.CreateImageKHR = dri2_create_image;
dri2_drv->base.API.DestroyImageKHR = dri2_destroy_image_khr;
dri2_drv->base.API.CreateWaylandBufferFromImageWL = dri2_create_wayland_buffer_from_image;
-#ifdef HAVE_DRM_PLATFORM
+#ifdef HAVE_LIBDRM
dri2_drv->base.API.CreateDRMImageMESA = dri2_create_drm_image_mesa;
dri2_drv->base.API.ExportDRMImageMESA = dri2_export_drm_image_mesa;
#endif
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